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GET /api/1.2/patches/2219876/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
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{
    "id": 2219876,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2219876/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/20260405035555.558396-2-wangrui@loongson.cn/",
    "project": {
        "id": 41,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/41/?format=api",
        "name": "GNU C Library",
        "link_name": "glibc",
        "list_id": "libc-alpha.sourceware.org",
        "list_email": "libc-alpha@sourceware.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260405035555.558396-2-wangrui@loongson.cn>",
    "list_archive_url": null,
    "date": "2026-04-05T03:55:55",
    "name": "[v8,6/6] loongarch: Enable THP-aligned load segments by default on 64-bit",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "63762563629e972f42b6e9895afc7581372fa4ef",
    "submitter": {
        "id": 85150,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/85150/?format=api",
        "name": "WANG Rui",
        "email": "wangrui@loongson.cn"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260405035555.558396-2-wangrui@loongson.cn/mbox/",
    "series": [
        {
            "id": 498763,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/498763/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/glibc/list/?series=498763",
            "date": "2026-04-05T03:53:16",
            "name": "elf: THP-aware load segment alignment",
            "version": 8,
            "mbox": "http://patchwork.ozlabs.org/series/498763/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2219876/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2219876/checks/",
    "tags": {},
    "related": [],
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        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1775361392; c=relaxed/simple;\n bh=eZHFaLBd7oXRxrYYGmvQftnnh8LTLsZDZfT/vdpUyeQ=;\n h=From:To:Subject:Date:Message-ID:MIME-Version;\n b=Pp6Nf4qf0owYyZG/wjCcJMsISVy74Atduk0lyxK/vpIWjrWwHXh7ELhqcWycRca6n0VWJoqPjGFKuu7JR45fAwM3lt2p/xOm4HoSgZ03WxVEAeUQnfLaTJF7xlLvKzFZUt/I/0CdVGS0uodifhUpTNt+YjqsYhHizHK6mGfYjZk=",
        "ARC-Authentication-Results": "i=1; server2.sourceware.org",
        "From": "WANG Rui <wangrui@loongson.cn>",
        "To": "libc-alpha@sourceware.org",
        "Cc": "Adhemerval Zanella <adhemerval.zanella@linaro.org>,\n Dev Jain <dev.jain@arm.com>, Florian Weimer <fweimer@redhat.com>,\n Wilco Dijkstra <Wilco.Dijkstra@arm.com>, Xi Ruoyao <xry111@xry111.site>,\n WANG Xuerui <git@xen0n.name>, caiyinyu <caiyinyu@loongson.cn>,\n mengqinggang <mengqinggang@loongson.cn>,\n Huacai Chen <chenhuacai@kernel.org>, hjl.tools@gmail.com,\n WANG Rui <wangrui@loongson.cn>",
        "Subject": "[PATCH v8 6/6] loongarch: Enable THP-aligned load segments by default\n on 64-bit",
        "Date": "Sun,  5 Apr 2026 11:55:55 +0800",
        "Message-ID": "<20260405035555.558396-2-wangrui@loongson.cn>",
        "X-Mailer": "git-send-email 2.53.0",
        "In-Reply-To": "<20260405035555.558396-1-wangrui@loongson.cn>",
        "References": "<20260405035323.558335-1-wangrui@loongson.cn>\n <20260405035555.558396-1-wangrui@loongson.cn>",
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        "X-BeenThere": "libc-alpha@sourceware.org",
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        "List-Id": "Libc-alpha mailing list <libc-alpha.sourceware.org>",
        "List-Unsubscribe": "<https://sourceware.org/mailman/options/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe>",
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        "Errors-To": "libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org"
    },
    "content": "On LoongArch64 Linux, aligning ELF load segments to Transparent Huge Page\n(THP) boundaries provides consistent performance benefits for large\nbinaries by reducing TLB pressure and improving instruction fetch\nefficiency.\n\nEnable THP-based load segment alignment by default on LoongArch64 by\nsetting `glibc.elf.thp=1` during startup. Define the default THP\npage size for load segment alignment on LoongArch64 as 32MB.\n\nThis allows the dynamic loader to apply THP-friendly alignment without\nrequiring the `glibc.elf.thp` tunable to be explicitly set.\n\nBenchmarks\n\nMachine: Loongson 3A6000 (LoongArch64)\nKernel: 6.18.13\n  CONFIG_READ_ONLY_THP_FOR_FS=y\n  CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y\n\nWorkload 1: building Cargo 1.93.0\nRustc: nightly-2026-02-26\n\n                Without patch        With patch\ninstructions    3,690,358,948,176    3,690,301,774,568\ncpu-cycles      4,233,025,766,760    4,035,866,635,741\nitlb-misses     9,708,829,532        2,700,014,717\ntime elapsed    302.40 s             289.68 s\n\nInstructions remain essentially unchanged. iTLB misses drop by about\n72%, reducing CPU cycles by about 4.7% and wall time by about 4.2%.\n\nWorkload 2: building Linux kernel v7.0-rc1\nLLVM: 21.1.8\n\n                Without patch        With patch\ninstructions    14,163,739,876,387   14,169,418,598,675\ncpu-cycles      19,231,890,317,741   16,851,494,928,181\nitlb-misses     91,142,010,440       90,779,245\ntime elapsed    1022.09 s            893.22 s\n\nInstructions remain roughly the same. iTLB misses drop from about 91B\nto about 90M (roughly 99.9% reduction), reducing CPU cycles by about\n12% and wall time by about 12.6%.\n\nReviewed-by: caiyinyu <caiyinyu@loongson.cn>\nSigned-off-by: WANG Rui <wangrui@loongson.cn>\n---\n .../unix/sysv/linux/loongarch/cpu-features.c  |  6 +++++\n .../loongarch/lp64/dl-map-segment-align.h     | 22 +++++++++++++++++++\n 2 files changed, 28 insertions(+)\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/lp64/dl-map-segment-align.h",
    "diff": "diff --git a/sysdeps/unix/sysv/linux/loongarch/cpu-features.c b/sysdeps/unix/sysv/linux/loongarch/cpu-features.c\nindex 0c125e64e2b..7ed54ff53e7 100644\n--- a/sysdeps/unix/sysv/linux/loongarch/cpu-features.c\n+++ b/sysdeps/unix/sysv/linux/loongarch/cpu-features.c\n@@ -27,4 +27,10 @@ init_cpu_features (struct cpu_features *cpu_features)\n   GLRO(dl_larch_cpu_features).hwcap = GLRO(dl_hwcap);\n   TUNABLE_GET (glibc, cpu, hwcaps, tunable_val_t *,\n \t       TUNABLE_CALLBACK (set_hwcaps));\n+\n+#ifdef __LP64__\n+  /* Enable THP-based load segment alignment by default on LoongArch64. */\n+  if (!TUNABLE_IS_INITIALIZED (glibc, elf, thp))\n+    TUNABLE_SET (glibc, elf, thp, 1);\n+#endif\n }\ndiff --git a/sysdeps/unix/sysv/linux/loongarch/lp64/dl-map-segment-align.h b/sysdeps/unix/sysv/linux/loongarch/lp64/dl-map-segment-align.h\nnew file mode 100644\nindex 00000000000..c51ee4ac47e\n--- /dev/null\n+++ b/sysdeps/unix/sysv/linux/loongarch/lp64/dl-map-segment-align.h\n@@ -0,0 +1,22 @@\n+/* _dl_map_segment_align.  LoongArch64 Linux version.\n+   Copyright (C) 2026 Free Software Foundation, Inc.\n+   Copyright The GNU Toolchain Authors.\n+   This file is part of the GNU C Library.\n+\n+   The GNU C Library is free software; you can redistribute it and/or\n+   modify it under the terms of the GNU Lesser General Public\n+   License as published by the Free Software Foundation; either\n+   version 2.1 of the License, or (at your option) any later version.\n+\n+   The GNU C Library is distributed in the hope that it will be useful,\n+   but WITHOUT ANY WARRANTY; without even the implied warranty of\n+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU\n+   Lesser General Public License for more details.\n+\n+   You should have received a copy of the GNU Lesser General Public\n+   License along with the GNU C Library; if not, see\n+   <https://www.gnu.org/licenses/>.  */\n+\n+#define DL_MAP_DEFAULT_THP_PAGESIZE (32 * 1024 * 1024)\n+\n+#include_next <dl-map-segment-align.h>\n",
    "prefixes": [
        "v8",
        "6/6"
    ]
}