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{ "id": 831136, "url": "http://patchwork.ozlabs.org/api/1.2/covers/831136/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20171027072612.26565-1-jeffy.chen@rock-chips.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.2/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20171027072612.26565-1-jeffy.chen@rock-chips.com>", "list_archive_url": null, "date": "2017-10-27T07:26:05", "name": "[RFC,v10,0/7] PCI: rockchip: Move PCIe WAKE# handling into pci core", "submitter": { "id": 67754, "url": "http://patchwork.ozlabs.org/api/1.2/people/67754/?format=api", "name": "Jeffy Chen", "email": "jeffy.chen@rock-chips.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/20171027072612.26565-1-jeffy.chen@rock-chips.com/mbox/", "series": [ { "id": 10523, "url": "http://patchwork.ozlabs.org/api/1.2/series/10523/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=10523", "date": "2017-10-27T07:26:06", "name": "PCI: rockchip: Move PCIe WAKE# handling into pci core", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/10523/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/831136/comments/", "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yNb8k2mffz9t2x\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 27 Oct 2017 18:28:54 +1100 (AEDT)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751070AbdJ0H0d (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 27 Oct 2017 03:26:33 -0400", "from regular1.263xmail.com ([211.150.99.133]:46451 \"EHLO\n\tregular1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750790AbdJ0H0c (ORCPT\n\t<rfc822; linux-pci@vger.kernel.org>); Fri, 27 Oct 2017 03:26:32 -0400", "from jeffy.chen?rock-chips.com (unknown [192.168.167.174])\n\tby regular1.263xmail.com (Postfix) with ESMTP id 5B9749003;\n\tFri, 27 Oct 2017 15:26:24 +0800 (CST)", "from localhost (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id D1FDA3AE;\n\tFri, 27 Oct 2017 15:26:14 +0800 (CST)", "from localhost (unknown [103.29.142.67])\n\tby smtp.263.net (Postfix) whith ESMTP id 84306YFJUK;\n\tFri, 27 Oct 2017 15:26:23 +0800 (CST)" ], "X-263anti-spam": "KSV:0;", "X-MAIL-GRAY": "0", "X-MAIL-DELIVERY": "1", "X-KSVirus-check": "0", "X-ABS-CHECKED": "4", "X-RL-SENDER": "jeffy.chen@rock-chips.com", "X-FST-TO": "linux-kernel@vger.kernel.org", "X-SENDER-IP": "103.29.142.67", "X-LOGIN-NAME": "jeffy.chen@rock-chips.com", "X-UNIQUE-TAG": "<4cf8ad196befe305a7c947531e72e096>", "X-ATTACHMENT-NUM": "0", "X-SENDER": "cjf@rock-chips.com", "X-DNS-TYPE": "0", "From": "Jeffy Chen <jeffy.chen@rock-chips.com>", "To": "linux-kernel@vger.kernel.org, bhelgaas@google.com", "Cc": "linux-pm@vger.kernel.org, tony@atomide.com,\n\tshawn.lin@rock-chips.com, briannorris@chromium.org,\n\trjw@rjwysocki.net, dianders@chromium.org,\n\tJeffy Chen <jeffy.chen@rock-chips.com>,\n\tXinming Hu <huxm@marvell.com>, linux-pci@vger.kernel.org,\n\tRob Herring <robh+dt@kernel.org>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tKalle Valo <kvalo@codeaurora.org>,\n\tHeiko Stuebner <heiko@sntech.de>, linux-acpi@vger.kernel.org,\n\tlinux-rockchip@lists.infradead.org,\n\tNishant Sarmukadam <nishants@marvell.com>,\n\tWill Deacon <will.deacon@arm.com>, Matthias Kaehlcke <mka@chromium.org>,\n\tdevicetree@vger.kernel.org, Ganapathi Bhat <gbhat@marvell.com>,\n\tFrank Rowand <frowand.list@gmail.com>, Len Brown <lenb@kernel.org>,\n\tAmitkumar Karwar <amitkarwar@gmail.com>,\n\tlinux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,\n\tlinux-wireless@vger.kernel.org, Caesar Wang <wxt@rock-chips.com>,\n\tKlaus Goger <klaus.goger@theobroma-systems.com>,\n\tMark Rutland <mark.rutland@arm.com>", "Subject": "[RFC PATCH v10 0/7] PCI: rockchip: Move PCIe WAKE# handling into\n\tpci core", "Date": "Fri, 27 Oct 2017 15:26:05 +0800", "Message-Id": "<20171027072612.26565-1-jeffy.chen@rock-chips.com>", "X-Mailer": "git-send-email 2.11.0", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "Currently we are handling wake irq in mrvl wifi driver. Move it into\npci core.\n\nTested on my chromebook bob(with cros 4.4 kernel and mrvl wifi).\n\n\nChanges in v10:\nUse device_set_wakeup_capable() instead of device_set_wakeup_enable(),\nsince dedicated wakeirq will be lost in device_set_wakeup_enable(false).\n\nChanges in v9:\nAdd section for PCI devices and rewrite the commit message.\nRewrite the commit message.\nFix check error in .cleanup().\nMove dedicated wakeirq setup to setup() callback and use\ndevice_set_wakeup_enable() to enable/disable.\n\nChanges in v8:\nAdd optional \"pci\", and rewrite commit message.\nRewrite the commit message.\nAdd pci-of.c and use platform_pm_ops to handle the PCIe WAKE# signal.\n\nChanges in v7:\nMove PCIE_WAKE handling into pci core.\n\nChanges in v6:\nFix device_init_wake error handling, and add some comments.\n\nChanges in v5:\nMove to pci.txt\nUse \"wakeup\" instead of \"wake\"\nRebase.\n\nChanges in v3:\nFix error handling.\n\nChanges in v2:\nUse dev_pm_set_dedicated_wake_irq.\n\nJeffy Chen (7):\n dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq\n of/irq: Adjust of_pci_irq parsing for multiple interrupts\n mwifiex: Disable wakeup irq handling for pcie\n arm64: dts: rockchip: Move PCIe WAKE# irq to pcie driver for Gru\n PCI: Make pci_platform_pm_ops's callbacks optional\n PCI / PM: Move acpi wakeup code to pci core\n PCI / PM: Add support for the PCIe WAKE# signal for OF\n\n Documentation/devicetree/bindings/pci/pci.txt | 8 ++\n arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 15 +--\n drivers/net/wireless/marvell/mwifiex/main.c | 4 +\n drivers/of/of_pci_irq.c | 13 ++-\n drivers/pci/Makefile | 2 +-\n drivers/pci/pci-acpi.c | 121 ++++++++++++------------\n drivers/pci/pci-driver.c | 9 ++\n drivers/pci/pci-of.c | 127 ++++++++++++++++++++++++++\n drivers/pci/pci.c | 112 +++++++++++++++++++----\n drivers/pci/pci.h | 31 +++++--\n drivers/pci/probe.c | 12 ++-\n drivers/pci/remove.c | 2 +\n include/linux/pci.h | 2 +\n 13 files changed, 361 insertions(+), 97 deletions(-)\n create mode 100644 drivers/pci/pci-of.c" }