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{ "id": 831035, "url": "http://patchwork.ozlabs.org/api/1.2/covers/831035/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1509073651-23730-1-git-send-email-shawnguo@kernel.org/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/1.2/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1509073651-23730-1-git-send-email-shawnguo@kernel.org>", "list_archive_url": null, "date": "2017-10-27T03:07:29", "name": "[v4,0/2] Add Combo PHY driver for HiSilicon STB SoCs", "submitter": { "id": 66396, "url": "http://patchwork.ozlabs.org/api/1.2/people/66396/?format=api", "name": "Shawn Guo", "email": "shawnguo@kernel.org" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1509073651-23730-1-git-send-email-shawnguo@kernel.org/mbox/", "series": [ { "id": 10481, "url": "http://patchwork.ozlabs.org/api/1.2/series/10481/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=10481", "date": "2017-10-27T03:07:29", "name": "Add Combo PHY driver for HiSilicon STB SoCs", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/10481/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/831035/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org", "mail.kernel.org;\n\tspf=none smtp.mailfrom=shawnguo@kernel.org" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yNTMZ4gXlz9t30\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri, 27 Oct 2017 14:07:54 +1100 (AEDT)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751399AbdJ0DHx (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tThu, 26 Oct 2017 23:07:53 -0400", "from mail.kernel.org ([198.145.29.99]:41026 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751483AbdJ0DHx (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tThu, 26 Oct 2017 23:07:53 -0400", "from localhost.localdomain (unknown [104.237.91.22])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 0CC8C21923;\n\tFri, 27 Oct 2017 03:07:49 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mail.kernel.org 0CC8C21923", "From": "Shawn Guo <shawnguo@kernel.org>", "To": "Kishon Vijay Abraham I <kishon@ti.com>", "Cc": "Rob Herring <robh+dt@kernel.org>, Jianguo Sun <sunjianguo1@huawei.com>, \n\tJiancheng Xue <xuejiancheng@hisilicon.com>,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tShawn Guo <shawn.guo@linaro.org>", "Subject": "[PATCH v4 0/2] Add Combo PHY driver for HiSilicon STB SoCs", "Date": "Fri, 27 Oct 2017 11:07:29 +0800", "Message-Id": "<1509073651-23730-1-git-send-email-shawnguo@kernel.org>", "X-Mailer": "git-send-email 1.9.1", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "From: Shawn Guo <shawn.guo@linaro.org>\n\nIt adds device tree bindings and driver support for Combo PHY device\nwhich can be found on HiSilicon STB SoCs.\n\nChanges for v4:\n - Instead of relying on device id, add a new property\n hisilicon,fixed-mode\n for combphy device that doesn't support mode select but a fixed phy\n mode.\n - Move combphy mode select register bits definition to device tree, as\n it may vary from one device to another.\n\nChanges for v3:\n - Make combphy device be child of peripheral controller and use 'reg'\n property for mapping combphy configuration registers.\n - Kill \"hisilicon,peripheral-syscon\" property, since parent node is\n just the syscon controller now.\n - Check combphy id to handle the quirk that combphy0 can not configure\n mode but always works in USB3 mode.\n - Unify phy .init and .exit hooks for different combphy instances and\n work modes, as the only quirk we need to handle is that combphy0 can\n only work in USB3 mode.\n - Better naming for clock and reset, 'ref' to 'ref_clk', 'por' to\n 'por_rst'.\n\nChanges for v2:\n - Move DT bindings into a separate patch.\n - Drop the spurious newline from drivers/phy/Makefile.\n - Use the phy type defines in dt-bindings/phy/phy.h.\n - Use PTR_ERR_OR_ZERO() for checking return from\n devm_of_phy_provider_register().\n - Add USB3 phy support.\n\nJianguo Sun (2):\n dt-bindings: add bindings doc for hi3798cv200 combphy\n phy: add combo phy driver for HiSilicon STB SoCs\n\n .../bindings/phy/phy-hi3798cv200-combphy.txt | 57 ++++\n drivers/phy/hisilicon/Kconfig | 9 +\n drivers/phy/hisilicon/Makefile | 1 +\n drivers/phy/hisilicon/phy-histb-combphy.c | 289 +++++++++++++++++++++\n 4 files changed, 356 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt\n create mode 100644 drivers/phy/hisilicon/phy-histb-combphy.c" }