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{ "id": 2234968, "url": "http://patchwork.ozlabs.org/api/1.2/covers/2234968/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260508113636.3561383-1-ajay.nandam@oss.qualcomm.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.2/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260508113636.3561383-1-ajay.nandam@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-05-08T11:36:34", "name": "[v3,0/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework", "submitter": { "id": 93131, "url": "http://patchwork.ozlabs.org/api/1.2/people/93131/?format=api", "name": "Ajay Kumar Nandam", "email": "ajay.nandam@oss.qualcomm.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260508113636.3561383-1-ajay.nandam@oss.qualcomm.com/mbox/", "series": [ { "id": 503374, "url": "http://patchwork.ozlabs.org/api/1.2/series/503374/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=503374", "date": "2026-05-08T11:36:36", "name": "pinctrl: qcom: lpass-lpi: Switch to PM clock framework", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/503374/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2234968/comments/", "headers": { "Return-Path": "\n <linux-gpio+bounces-36457-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=U7/f1to3;\n\tdkim=pass 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98e67ed59e1d1-366052d03femr5998986a91.4.1778240206964;\n Fri, 08 May 2026 04:36:46 -0700 (PDT)", "by 2002:a17:90b:590c:b0:35d:93c7:e386 with SMTP id\n 98e67ed59e1d1-366052d03femr5998952a91.4.1778240206437;\n Fri, 08 May 2026 04:36:46 -0700 (PDT)" ], "From": "Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>", "To": "Bjorn Andersson <andersson@kernel.org>, Linus Walleij <linusw@kernel.org>", "Cc": "linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n linux-kernel@vger.kernel.org", "Subject": "[PATCH v3 0/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework", "Date": "Fri, 8 May 2026 17:06:34 +0530", "Message-Id": "<20260508113636.3561383-1-ajay.nandam@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": 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a=VwQbUJbxAAAA:8\n a=EUspDBNiAAAA:8 a=GA15WUm4zoOJX-8LQ24A:9 a=rl5im9kqc5Lf4LNbBjHf:22", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n bulkscore=0 impostorscore=0 spamscore=0 clxscore=1015 malwarescore=0\n lowpriorityscore=0 phishscore=0 priorityscore=1501 suspectscore=0\n adultscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000\n definitions=main-2605080120" }, "content": "This series moves LPASS LPI pinctrl runtime clock control to the PM\nclock framework and ensures GPIO register accesses runtime-resume the\nblock before MMIO.\n\nThe common LPASS LPI core now uses PM clocks and autosuspend. Runtime PM\ncallbacks are wired for all LPASS LPI variant drivers sharing the common\ncore so behavior is consistent across SoCs using DT-provided clocks via\nof_pm_clk_add_clks().\n\n---\nv2: https://lore.kernel.org/all/20260420123135.350446-1-ajay.nandam@oss.qualcomm.com/\nv1: https://lore.kernel.org/r/20260413122233.375945-1-ajay.nandam@oss.qualcomm.com\n\nChanges since v2:\n- Reordered series for bisect safety:\n - patch 1 wires runtime PM ops for all LPASS LPI variants first\n - patch 2 converts the shared core to pm_clk + runtime PM access paths\n- Dropped the standalone \"Resume clocks for GPIO access\" patch and folded\n those changes into the core conversion patch\n- Added runtime PM ops wiring for milos/sdm660/sdm670 in the first patch\n so all variant drivers are covered before core conversion\n- Rebased on latest linux-next\n\nTesting:\n- Runtime behavior validated on Kodiak (sc7280)\n- Wider runtime testing on other LPASS LPI variants is welcome\n\nAjay Kumar Nandam (2):\n pinctrl: qcom: lpass-lpi: Enable runtime PM hooks on remaining SoCs\n pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM\n\n drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 109 +++++++++++++-----\n .../pinctrl/qcom/pinctrl-milos-lpass-lpi.c | 7 ++\n .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 7 ++\n .../pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c | 11 +-\n .../pinctrl/qcom/pinctrl-sdm660-lpass-lpi.c | 7 ++\n .../pinctrl/qcom/pinctrl-sdm670-lpass-lpi.c | 7 ++\n .../pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c | 7 ++\n .../pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c | 7 ++\n .../pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c | 11 +-\n .../pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c | 11 +-\n .../pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c | 11 +-\n .../pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c | 11 +-\n 12 files changed, 164 insertions(+), 42 deletions(-)" }