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{ "id": 2233276, "url": "http://patchwork.ozlabs.org/api/1.2/covers/2233276/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260506031942.251335-1-junjie.cao@intel.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260506031942.251335-1-junjie.cao@intel.com>", "list_archive_url": null, "date": "2026-05-06T03:19:40", "name": "[v3,0/2] intel_iommu: fix guest-triggerable assert in MMIO handlers", "submitter": { "id": 91537, "url": "http://patchwork.ozlabs.org/api/1.2/people/91537/?format=api", "name": "Junjie Cao", "email": "junjie.cao@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260506031942.251335-1-junjie.cao@intel.com/mbox/", "series": [ { "id": 502920, "url": "http://patchwork.ozlabs.org/api/1.2/series/502920/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502920", "date": "2026-05-06T03:19:40", "name": "intel_iommu: fix guest-triggerable assert in MMIO handlers", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/502920/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2233276/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=c2Vf/bwg;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=\"78783031\"", "E=Sophos;i=\"6.23,218,1770624000\"; d=\"scan'208\";a=\"78783031\"", "E=Sophos;i=\"6.23,218,1770624000\"; d=\"scan'208\";a=\"231416999\"" ], "X-ExtLoop1": "1", "From": "Junjie Cao <junjie.cao@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "junjie.cao@intel.com, zhenzhong.duan@intel.com, philmd@linaro.org,\n mst@redhat.com, jasowang@redhat.com, yi.l.liu@intel.com,\n clement.mathieu--drif@bull.com, marcel.apfelbaum@gmail.com,\n pbonzini@redhat.com, richard.henderson@linaro.org, farosas@suse.de,\n lvivier@redhat.com", "Subject": "[PATCH v3 0/2] intel_iommu: fix guest-triggerable assert in MMIO\n handlers", "Date": "Wed, 6 May 2026 11:19:40 +0800", "Message-ID": "<20260506031942.251335-1-junjie.cao@intel.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "\n <DS4PPF93A1BBECDC498B677FE8B259BCEAD92352@DS4PPF93A1BBECD.namprd11.prod.outlook.com>", "References": "\n <DS4PPF93A1BBECDC498B677FE8B259BCEAD92352@DS4PPF93A1BBECD.namprd11.prod.outlook.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=192.198.163.17;\n envelope-from=junjie.cao@intel.com;\n helo=mgamail.intel.com", "X-Spam_score_int": "-47", "X-Spam_score": "-4.8", "X-Spam_bar": "----", "X-Spam_report": "(-4.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.443,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001,\n SPF_NONE=0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "An 8-byte guest access to a 32-bit-only VT-d register hits\nassert(size == 4) and aborts QEMU. Found by generic-fuzz.\n\nv1: https://lore.kernel.org/all/20260420170523.17908-1-junjie.cao@intel.com/\nv2: https://lore.kernel.org/all/20260424201842.176953-1-junjie.cao@intel.com/\n\nChanges in v3:\n - Drop v2's min_access_size=8 approach: per Zhenzhong, it\n silently zero-extends 4-byte guest writes, wiping upper\n wmask bits of 64-bit registers and firing triggers gated\n on size==8.\n - Keep min_access_size=4. Remove the 25 assert(size == 4)\n sites: 21 are unreachable (non-8-aligned), the 4 reachable\n (FECTL 0x38, IECTL 0xa0, IEADDR 0xa8, PECTL 0xe0) fall\n through to vtd_set_long() and log a guest error.\n\nJunjie Cao (2):\n intel_iommu: fix guest-triggerable abort on oversized MMIO access\n tests/qtest: add 8-byte MMIO access sweep for intel-iommu\n\n hw/i386/intel_iommu.c | 41 +++++++++++++---------------------\n tests/qtest/intel-iommu-test.c | 30 +++++++++++++++++++++++++\n 2 files changed, 46 insertions(+), 25 deletions(-)\n\n\nbase-commit: da6c4fe60fee30dd77267764d55b38af9cb89d4b" }