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{ "id": 2221630, "url": "http://patchwork.ozlabs.org/api/1.2/covers/2221630/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260410023055.2439146-1-sherry.sun@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.2/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260410023055.2439146-1-sherry.sun@nxp.com>", "list_archive_url": null, "date": "2026-04-10T02:30:43", "name": "[V12,00/12] pci-imx6: Add support for parsing the reset property in new Root Port binding", "submitter": { "id": 77063, "url": "http://patchwork.ozlabs.org/api/1.2/people/77063/?format=api", "name": "Sherry Sun", "email": "sherry.sun@nxp.com" }, "mbox": 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], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=K7eMdwNpWEaI6jZq9E7pLihK/e00FZc2PVZBTDuWohI=;\n b=lZYXaDkEKc8XahR7y5V7XWrmk8581IRKaRfNK8iuweS0yR2cOE+yDUo+CQAiB5EYFddytWNf3H1JiWkFtlty3c/0PjVrz7ns3DvMmZyIRMjdCTXPAIqUHK2yT62grz+0s6GKU2Fny5GxSakAc1UmxD+k2E1rWv79vHpH4w1DWGDFc6NkDotCMx3dj1Qa6HKe+/Mc6QdLfs9yISbka75lipI8cwsAtUAU9DHtTK/gnH48qKuToumVji6fybTzi1o0fIhY2v0gyVw+gWIs0qRQONaAp6qlKpkpQG3pe49nEIVh6AfNfX7sc8R1lnm2HmNeu8OeV5FeXEj/RBTcE6s2Ng==", "From": "Sherry Sun <sherry.sun@nxp.com>", "To": "robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de", "Cc": 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"X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 81da5969-5359-410c-7f32-08de96a900f4", "X-MS-Exchange-CrossTenant-AuthSource": "VI0PR04MB12114.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "10 Apr 2026 02:29:34.4260\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n gzyJVdRUdJ8tCNv04WsSO50aFby4sHW6oDcFZBaXn1hB8tzQvzUKayoLUWhw7DrqSx6Al/URSrpMBSRTy6urgg==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AS5PR04MB9826" }, "content": "This patch set adds support for parsing the reset property in new Root Port\nbinding in pci-imx6 driver, similar to the implementation in the qcom pcie\ndriver[1].\n\nAlso introduce generic helper functions to parse Root Port device tree\nnodes and extract common properties like reset GPIOs. This allows multiple\nPCI host controller drivers to share the same parsing logic.\n\nDefine struct pci_host_port to hold common Root Port properties\n(currently only reset GPIO descriptor) and add\npci_host_common_parse_ports() to parse Root Port nodes from device tree.\nAlso add the 'ports' list to struct pci_host_bridge for better maintain\nparsed Root Port information.\n\nThe plan is to add the wake-gpio property to the root port in subsequent\npatches. Also, the vpcie-supply property will be moved to the root port\nnode later based on the refactoring patch set for the PCI pwrctrl\nframework[2]. \n\nThe initial idea is to adopt the Manivannan’s recent PCIe M.2 KeyE\nconnector support patch set[3] and PCI power control framework patches[2],\nand extend them to the pcie-imx6 driver. Since the new M.2/pwrctrl model is\nimplemented based on Root Ports and requires the pwrctrl driver to bind to\na Root Port device, we need to introduce a Root Port child node on i.MX\nboards that provide an M.2 connector.\n\nTo follow a more standardized DT structure, it also makes sense to move\nthe reset-gpios and wake-gpios properties into the Root Port node. These\nsignals logically belong to the Root Port rather than the host bridge,\nand placing them there aligns with the new M.2/pwrctrl model.\n\nRegarding backward compatibility, as Frank suggested, I will not remove\nthe old reset-gpio property from existing DTS files to avoid function\nbreak.\n\nFor new i.MX platforms — such as the upcoming i.MX952-evk will add\nvpcie-supply, reset-gpios, and wake-gpios directly under the Root Port\nnode.\nTherefore, driver updates are needed to support both the legacy\nproperties and the new standardized Root Port based layout.\n\n[1] https://lore.kernel.org/linux-pci/20250702-perst-v5-0-920b3d1f6ee1@qti.qualcomm.com/\n[2] https://lore.kernel.org/linux-pci/20260115-pci-pwrctrl-rework-v5-0-9d26da3ce903@oss.qualcomm.com/\n[3] https://lore.kernel.org/linux-pci/20260112-pci-m2-e-v4-0-eff84d2c6d26@oss.qualcomm.com/\n\nSigned-off-by: Sherry Sun <sherry.sun@nxp.com>\n---\nChanges in V12:\n1. Improve the pci_host_common_parse_port() to correctly handle three scenarios:\n PERST# found in Root Port node & PERST# not in Root Port but found in RC node\n & PERST# not found in either node.\n2. Add documentation noting for pci_host_common_parse_port().\n3. Add err_cleanup handle path for pci_host_common_parse_ports() to clean up any\n partially parsed Root Port resources.\n4. Optimize imx_pcie_assert_perst() to avoid the linearly increasing deassertion\n delay if controller has multiple Root Ports.\n5. Use mdelay instead of msleep in imx_pcie_assert_perst() for noirq context\n safety.\n6. Remove early return in imx_pcie_parse_legacy_binding() when reset is NULL to\n align with pci_host_common_parse_port(), allowing port creation even without\n PERST# GPIO.\n\nChanges in V11:\n1. Call pci_host_common_parse_ports() API from pci-imx6 driver instead of dwc\n common layer as Mani suggested.\n2. Improve the commit message of patch#3 to avoid confusion as Mani suggested.\n\nChanges in V10:\n1. Use gpiod_direction_output() instead of gpiod_set_value_cansleep() to\n ensure the reset GPIO is properly configured as output before setting\n its value in patch#5 as now the reset GPIO is obtained with\n GPIOD_ASIS flag.\n\nChanges in V9:\n1. Improve the error handling in pci_host_common_parse_ports() as Mani suggested. \n2. Move the list_empty check and the comment to imx_pcie_host_init() to make it\n clear that imx_pcie_parse_legacy_binding() is a fallback as Mani suggested.\n3. Export pci_host_common_delete_ports() so that it can be called by\n imx_pcie_parse_legacy_binding().\n\nChanges in V8:\n1. Add back the cleanup function pci_host_common_delete_ports() to properly\n handles the ports list instead of simply using pci_free_resource_list().\n2. Improve the patch#4 commit message.\n3. Remove the irrelevant code change in patch#4.\n\nChanges in V7:\n1. Change to use GPIOD_ASIS when requesting perst gpio as Mani suggested.\n using bridge->dev.\n2. Add a seperate patch to move vpcie3v3aux regulator enable from probe to\n imx_pcie_host_init() and move imx_pcie_assert_perst() before regulator and\n clock enable for pci-imx6.\n3. Add device pointer parameter for pci_host_common_parse_port() instead of\n\nChanges in V6:\n1. Drop the pre-allocate pci_host_bridge struct changes in dw_pcie_host_init()\n and imx_pcie_probe().\n2. Parse Root Port nodes in dw_pcie_host_init() as Frank and Mani suggested.\n3. Move the imx_pcie_parse_legacy_binding() from imx_pcie_probe() to\n imx_pcie_host_init(), so that dw_pcie_host_init() parse Root Port first, if\n no Root Port nodes were parsed(indicated by empty ports list), then parse\n legacy binding.\n4. Add device pointer parameter for pci_host_common_parse_ports().\n5. Add NULL pointer check for reset gpio in imx_pcie_parse_legacy_binding().\n\nChanges in V5:\n1. Add the Root Port list(pci_host_port) to struct pci_host_bridge for better\n maintain parsed Root Port information.\n2. Delete the pci_host_common_delete_ports() as now the Root Port list in\n pci_host_bridge can be cleared by pci_release_host_bridge_dev().\n3. Change the common API pci_host_common_parse_ports() pass down struct\n pci_host_bridge *. \n4. Modify dw_pcie_host_init() to allow drivers to pre-allocate pci_host_bridge\n struct when needed.\n5. Allocate bridge early in imx_pcie_probe() to parse Root Ports.\n\nChanges in V4:\n1. Add common helpers for parsing Root Port properties in pci-host-common.c in\n patch#2.\n2. Call common pci_host_common_parse_ports() and pci_host_common_delete_ports()\n in pci-imx6 driver.\n3. Use PCIE_T_PVPERL_MS and PCIE_RESET_CONFIG_WAIT_MS instead of magic number\n 100 in patch#3 as Manivannan suggested.\n4. Use \"PERST#\" instead of \"PCIe reset\" for the reset gpio lable in patch#3.\n\nChanges in V3:\n1. Improve the patch#2 commit message as Frank suggested.\n2. Add Reviewed-by tag for patch#1.\n\nChanges in V2:\n1. Improve the patch#1 commit message as Frank suggested.\n2. Also mark the reset-gpio-active-high property as deprecated in\n imx6q-pcie DT binding as Rob suggested.\n3. The imx_pcie_delete_ports() has been moved up so that the\n imx_pcie_parse_ports() can call this helper function in error handling.\n4. Keep the old reset-gpio property in the host bridge node for the\n existing dts files and add comments to avoid confusion.\n---\n\nSherry Sun (12):\n dt-bindings: PCI: fsl,imx6q-pcie: Add reset GPIO in Root Port node\n PCI: host-generic: Add common helpers for parsing Root Port properties\n PCI: imx6: Assert PERST# before enabling regulators\n PCI: imx6: Add support for parsing the reset property in new Root Port\n binding\n arm: dts: imx6qdl: Add Root Port node and PERST property\n arm: dts: imx6sx: Add Root Port node and PERST property\n arm: dts: imx7d: Add Root Port node and PERST property\n arm64: dts: imx8mm: Add Root Port node and PERST property\n arm64: dts: imx8mp: Add Root Port node and PERST property\n arm64: dts: imx8mq: Add Root Port node and PERST property\n arm64: dts: imx8dxl/qm/qxp: Add Root Port node and PERST property\n arm64: dts: imx95: Add Root Port node and PERST property\n\n .../bindings/pci/fsl,imx6q-pcie.yaml | 32 +++++\n .../arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi | 5 +\n arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 11 ++\n .../arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts | 5 +\n arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 5 +\n arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 11 ++\n arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts | 5 +\n arch/arm/boot/dts/nxp/imx/imx7d.dtsi | 11 ++\n .../boot/dts/freescale/imx8-ss-hsio.dtsi | 11 ++\n arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 5 +\n arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 +\n arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 ++\n arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 5 +\n arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 ++\n arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 10 ++\n arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++\n arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 10 ++\n .../boot/dts/freescale/imx8qm-ss-hsio.dtsi | 22 ++++\n arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 5 +\n .../boot/dts/freescale/imx95-15x15-evk.dts | 5 +\n .../boot/dts/freescale/imx95-19x19-evk.dts | 10 ++\n arch/arm64/boot/dts/freescale/imx95.dtsi | 22 ++++\n drivers/pci/controller/dwc/pci-imx6.c | 117 ++++++++++++++----\n drivers/pci/controller/pci-host-common.c | 104 ++++++++++++++++\n drivers/pci/controller/pci-host-common.h | 16 +++\n drivers/pci/probe.c | 1 +\n include/linux/pci.h | 1 +\n 27 files changed, 454 insertions(+), 24 deletions(-)" }