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GET /api/1.1/series/502259/?format=api
{ "id": 502259, "url": "http://patchwork.ozlabs.org/api/1.1/series/502259/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=502259", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/1.1/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "name": "dpll/ice: Add generic DPLL type and full TX reference clock control for E825", "date": "2026-04-30T09:42:30", "submitter": { "id": 82711, "url": "http://patchwork.ozlabs.org/api/1.1/people/82711/?format=api", "name": "Nitka, Grzegorz", "email": "grzegorz.nitka@intel.com" }, "version": 7, "total": 8, "received_total": 8, "received_all": true, "mbox": "http://patchwork.ozlabs.org/series/502259/mbox/", "cover_letter": { "id": 2231046, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2231046/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/cover/20260430094238.987976-1-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-1-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:30", "name": "[v7,net-next,0/8] dpll/ice: Add generic DPLL type and full TX reference clock control for E825", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/cover/20260430094238.987976-1-grzegorz.nitka@intel.com/mbox/" }, "patches": [ { "id": 2231047, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231047/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-2-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-2-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:31", "name": "[v7,net-next,1/8] dpll: add generic DPLL type", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-2-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231048, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231048/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-3-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-3-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:32", "name": "[v7,net-next,2/8] dpll: allow registering FW-identified pin with a different DPLL", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-3-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231049, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231049/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-4-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-4-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:33", "name": "[v7,net-next,3/8] dpll: extend pin notifier and netlink events with notification source ID", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-4-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231050, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231050/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-5-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-5-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:34", "name": "[v7,net-next,4/8] dpll: zl3073x: allow SyncE_Ref pin state change", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-5-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231051, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231051/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-6-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-6-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:35", "name": "[v7,net-next,5/8] ice: introduce TXC DPLL device and TX ref clock pin framework for E825", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-6-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231052, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231052/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-7-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-7-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:36", "name": "[v7,net-next,6/8] ice: implement CPI support for E825C", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-7-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231053, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231053/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-8-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-8-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:37", "name": "[v7,net-next,7/8] ice: add Tx reference clock index handling to AN restart command", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-8-grzegorz.nitka@intel.com/mbox/" }, { "id": 2231054, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231054/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-9-grzegorz.nitka@intel.com/", "msgid": "<20260430094238.987976-9-grzegorz.nitka@intel.com>", "date": "2026-04-30T09:42:38", "name": "[v7,net-next,8/8] ice: implement E825 TX ref clock control and TXC hardware sync status", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-9-grzegorz.nitka@intel.com/mbox/" } ] }