Series Detail

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{
    "id": 499946,
    "url": "http://patchwork.ozlabs.org/api/1.1/series/499946/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/glibc/list/?series=499946",
    "project": {
        "id": 41,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/41/?format=api",
        "name": "GNU C Library",
        "link_name": "glibc",
        "list_id": "libc-alpha.sourceware.org",
        "list_email": "libc-alpha@sourceware.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "name": "[v2,1/4] AArch64: Improve AdvSIMD and SVE pow(f).",
    "date": "2026-04-15T08:32:43",
    "submitter": {
        "id": 89873,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/89873/?format=api",
        "name": "Pierre Blanchard",
        "email": "pierre.blanchard@arm.com"
    },
    "version": 2,
    "total": 4,
    "received_total": 4,
    "received_all": true,
    "mbox": "http://patchwork.ozlabs.org/series/499946/mbox/",
    "cover_letter": null,
    "patches": [
        {
            "id": 2223401,
            "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223401/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-1-pierre.blanchard@arm.com/",
            "msgid": "<20260415083244.2560-1-pierre.blanchard@arm.com>",
            "date": "2026-04-15T08:32:41",
            "name": "[v2,1/4] AArch64: Improve AdvSIMD and SVE pow(f).",
            "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-1-pierre.blanchard@arm.com/mbox/"
        },
        {
            "id": 2223402,
            "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223402/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-2-pierre.blanchard@arm.com/",
            "msgid": "<20260415083244.2560-2-pierre.blanchard@arm.com>",
            "date": "2026-04-15T08:32:42",
            "name": "[v2,2/4] benchtests: add libmvec powrf inputs",
            "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-2-pierre.blanchard@arm.com/mbox/"
        },
        {
            "id": 2223399,
            "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223399/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-3-pierre.blanchard@arm.com/",
            "msgid": "<20260415083244.2560-3-pierre.blanchard@arm.com>",
            "date": "2026-04-15T08:32:43",
            "name": "[v2,3/4] benchtests: add libmvec powr inputs",
            "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-3-pierre.blanchard@arm.com/mbox/"
        },
        {
            "id": 2223400,
            "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223400/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-4-pierre.blanchard@arm.com/",
            "msgid": "<20260415083244.2560-4-pierre.blanchard@arm.com>",
            "date": "2026-04-15T08:32:44",
            "name": "[v2,4/4] AArch64: Implement AdvSIMD and SVE powr(f) routines",
            "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260415083244.2560-4-pierre.blanchard@arm.com/mbox/"
        }
    ]
}