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GET /api/1.1/patches/2237937/?format=api
{ "id": 2237937, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2237937/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260513163356.3033159-9-shaju.abraham@nutanix.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260513163356.3033159-9-shaju.abraham@nutanix.com>", "date": "2026-05-13T16:33:51", "name": "[RFC,v1,08/13] target/arm: named_cpu_model: generate arm_cpu_props[] table", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "ced332a0c6e76f202fed0c249990c33d839ca471", "submitter": { "id": 77003, "url": "http://patchwork.ozlabs.org/api/1.1/people/77003/?format=api", "name": "Shaju Abraham", "email": "shaju.abraham@nutanix.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260513163356.3033159-9-shaju.abraham@nutanix.com/mbox/", "series": [ { "id": 504187, "url": "http://patchwork.ozlabs.org/api/1.1/series/504187/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=504187", "date": "2026-05-13T16:33:48", "name": "named CPU models for ARM64 on KVM", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/504187/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2237937/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2237937/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nutanix.com header.i=@nutanix.com header.a=rsa-sha256\n header.s=proofpoint20171006 header.b=nV4if1pl;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nutanix.com header.i=@nutanix.com header.a=rsa-sha256\n header.s=selector1 header.b=nepeHrgD;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mx0b-002c1b01.pphosted.com", "X-Spam_score_int": "-31", "X-Spam_score": "-3.2", "X-Spam_bar": "---", "X-Spam_report": "(-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Expand the previously defined X-macros to generate arm_cpu_props[]. These\nproperties will be added to CPU object in future patch.\n\nCo-authored-by: Khushit Shah <khushit.shah@nutanix.com>\nSigned-off-by: Shaju Abraham <shaju.abraham@nutanix.com>\n---\n target/arm/arm-cpu-props.c | 43 ++++++++++++++++++++++++++++++++++++++\n target/arm/meson.build | 1 +\n 2 files changed, 44 insertions(+)\n create mode 100644 target/arm/arm-cpu-props.c", "diff": "diff --git a/target/arm/arm-cpu-props.c b/target/arm/arm-cpu-props.c\nnew file mode 100644\nindex 0000000000..f22fe7f08b\n--- /dev/null\n+++ b/target/arm/arm-cpu-props.c\n@@ -0,0 +1,43 @@\n+/*\n+ * ARM CPU feature property definitions.\n+ *\n+ * Maps ID-register fields described in cpu-idregs.inc.h to user-facing\n+ * QOM properties.\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include \"qemu/osdep.h\"\n+#include \"qapi/error.h\"\n+#include \"qapi/visitor.h\"\n+#include \"qom/object.h\"\n+#include \"cpu.h\"\n+#include \"arm-cpu-props.h\"\n+\n+/*\n+ * Generate all ArmFracVal tables for each fractional fields.\n+ */\n+#define FRAC_TABLE_START(base_fld) \\\n+ static const ArmFracVal base_fld##_frac_vals[] = {\n+#define FRAC_VAL(name, base, frac) \\\n+ { (name), (base), (frac) },\n+#define FRAC_TABLE_END(base_fld) \\\n+ { NULL }, \\\n+ };\n+#include \"arm-cpu-frac.inc.h\"\n+#undef FRAC_TABLE_END\n+#undef FRAC_VAL\n+#undef FRAC_TABLE_START\n+#define ARM_PROP(prop_name, _type, reg, fld) \\\n+ { .name = (prop_name), .type = ARM_PROP_##_type, \\\n+ .base_field = ARM_FIELD_IDX(reg, fld) },\n+\n+#define ARM_FRACTIONAL_PROP(prop_name, base_reg, base_fld, frac_reg, frac_fld) \\\n+ { .name = (prop_name), .type = ARM_PROP_FRACTIONAL, \\\n+ .base_field = ARM_FIELD_IDX(base_reg, base_fld), \\\n+ .frac_field = ARM_FIELD_IDX(frac_reg, frac_fld), \\\n+ .vals = base_fld##_frac_vals },\n+\n+const ArmCpuPropDesc arm_cpu_props[] = {\n+#include \"arm-cpu-props.inc.h\"\n+ { .name = NULL },\n+};\ndiff --git a/target/arm/meson.build b/target/arm/meson.build\nindex 64d1ec63ab..01b1e91a1c 100644\n--- a/target/arm/meson.build\n+++ b/target/arm/meson.build\n@@ -18,6 +18,7 @@ arm_common_ss.add(files(\n ))\n \n arm_common_system_ss.add(files(\n+ 'arm-cpu-props.c',\n 'arm-qmp-cmds.c',\n 'cpu-idregs.c',\n ))\n", "prefixes": [ "RFC", "v1", "08/13" ] }