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GET /api/1.1/patches/2233353/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2233353,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2233353/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260506094623.29327-6-fengchengwen@huawei.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260506094623.29327-6-fengchengwen@huawei.com>",
    "date": "2026-05-06T09:46:22",
    "name": "[v6,5/6] vfio/pci: Add PCIe TPH GET_ST interface",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "9d2407c5abd3b4aff4c255129645edebb3b4ab5e",
    "submitter": {
        "id": 92756,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/92756/?format=api",
        "name": "fengchengwen",
        "email": "fengchengwen@huawei.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260506094623.29327-6-fengchengwen@huawei.com/mbox/",
    "series": [
        {
            "id": 502946,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/502946/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=502946",
            "date": "2026-05-06T09:46:19",
            "name": "vfio/pci: Add PCIe TPH support",
            "version": 6,
            "mbox": "http://patchwork.ozlabs.org/series/502946/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2233353/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2233353/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-53845-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
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            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
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        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1778060802; cv=none;\n b=SQoIdRoLs8Ag/kBSSmmS/X4oPpBRnKsjjCadjtIHciKqrs8V9WfDuGtLvaVbcUh3fwyeBJKNXaBUntONEiL/0Oiq5fwWig1B+/iuCppYmdO4U18yS4J2oYjy9AiTvgjX5e3EcD29L+i7EPBaiMtZ2RNfoznqzt4v136nnEM9dyg=",
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        "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=3oyR+IlAxrYWgN6pagdRZkSeokVs2EmzHjMocpvrH54=;\n\tb=y2r81NhLofOoljX5Zuq99KzEFlKp0j8+L+CLmL+9BXGuRh1Go/UU7g+GqlXE9X0gVYtgo9uwE\n\tXNnOflbSAPuLlXCU4jEe1A/T2DQDRmFvfpW0OHAklY2uuxs2KGKdu93lJsqBnApmqnMK0+t6dM0\n\t1lOeea0xO+0xIrSnfYH1c5s=",
        "From": "Chengwen Feng <fengchengwen@huawei.com>",
        "To": "<alex@shazbot.org>, <jgg@ziepe.ca>",
        "CC": "<wathsala.vithanage@arm.com>, <helgaas@kernel.org>, <wei.huang2@amd.com>,\n\t<wangzhou1@hisilicon.com>, <wangyushan12@huawei.com>,\n\t<liuyonglong@huawei.com>, <kvm@vger.kernel.org>, <linux-pci@vger.kernel.org>",
        "Subject": "[PATCH v6 5/6] vfio/pci: Add PCIe TPH GET_ST interface",
        "Date": "Wed, 6 May 2026 17:46:22 +0800",
        "Message-ID": "<20260506094623.29327-6-fengchengwen@huawei.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20260506094623.29327-1-fengchengwen@huawei.com>",
        "References": "<20260506094623.29327-1-fengchengwen@huawei.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-ClientProxiedBy": "kwepems500001.china.huawei.com (7.221.188.70) To\n kwepemk500009.china.huawei.com (7.202.194.94)"
    },
    "content": "Add support to batch get CPU steering tags for device-specific TPH mode\nthat does not implement an ST table. This interface requires enabling the\n'enable_unsafe_tph_ds_mode' module parameter.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n drivers/vfio/pci/vfio_pci_core.c | 73 ++++++++++++++++++++++++++++++++\n 1 file changed, 73 insertions(+)",
    "diff": "diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex 69f666d20c4a..45e641ab2a88 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -1529,6 +1529,77 @@ static int vfio_pci_tph_disable(struct vfio_pci_core_device *vdev)\n \treturn 0;\n }\n \n+static int vfio_pci_tph_get_st(struct vfio_pci_core_device *vdev,\n+\t\t\t       struct vfio_device_pci_tph_op *op,\n+\t\t\t       void __user *uarg)\n+{\n+\tstruct pci_dev *pdev = vdev->pdev;\n+\tstruct vfio_pci_tph_entry *ents;\n+\tstruct vfio_pci_tph_st st;\n+\tenum tph_mem_type mtype;\n+\tsize_t size, ents_off;\n+\tint i, err;\n+\n+\tif (!enable_unsafe_tph_ds_mode ||\n+\t\tpcie_tph_get_st_table_loc(pdev) != PCI_TPH_LOC_NONE)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tif (copy_from_user(&st, uarg, sizeof(st)))\n+\t\treturn -EFAULT;\n+\n+\t/* Check reserved fields are zero */\n+\tif (memchr_inv(&st.reserved, 0, sizeof(st.reserved)))\n+\t\treturn -EINVAL;\n+\n+\tif (!st.count || st.count > VFIO_PCI_TPH_MAX_ENTRIES)\n+\t\treturn -EINVAL;\n+\n+\tsize = st.count * sizeof(*ents);\n+\tif (op->argsz < offsetofend(struct vfio_device_pci_tph_op, st) +\n+\t\t\tsizeof(struct vfio_pci_tph_st) + size)\n+\t\treturn -EINVAL;\n+\n+\tents = kvmalloc(size, GFP_KERNEL);\n+\tif (!ents)\n+\t\treturn -ENOMEM;\n+\n+\tents_off = offsetof(struct vfio_pci_tph_st, ents);\n+\tif (copy_from_user(ents, uarg + ents_off, size)) {\n+\t\terr = -EFAULT;\n+\t\tgoto out;\n+\t}\n+\n+\tfor (i = 0; i < st.count; i++) {\n+\t\t/* Check reserved fields are zero */\n+\t\tif (memchr_inv(&ents[i].reserved0, 0, sizeof(ents[i].reserved0)) ||\n+\t\t    memchr_inv(&ents[i].reserved1, 0, sizeof(ents[i].reserved1))) {\n+\t\t\terr = -EINVAL;\n+\t\t\tgoto out;\n+\t\t}\n+\n+\t\tif (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_VM) {\n+\t\t\tmtype = TPH_MEM_TYPE_VM;\n+\t\t} else if (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_PM) {\n+\t\t\tmtype = TPH_MEM_TYPE_PM;\n+\t\t} else {\n+\t\t\terr = -EINVAL;\n+\t\t\tgoto out;\n+\t\t}\n+\n+\t\terr = pcie_tph_get_cpu_st(pdev, mtype, ents[i].cpu,\n+\t\t\t\t\t  &ents[i].st);\n+\t\tif (err)\n+\t\t\tgoto out;\n+\t}\n+\n+\tif (copy_to_user(uarg + ents_off, ents, size))\n+\t\terr = -EFAULT;\n+\n+out:\n+\tkvfree(ents);\n+\treturn err;\n+}\n+\n static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\t\t      void __user *uarg)\n {\n@@ -1545,6 +1616,8 @@ static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\treturn vfio_pci_tph_enable(vdev, &op, uarg + minsz);\n \tcase VFIO_PCI_TPH_DISABLE:\n \t\treturn vfio_pci_tph_disable(vdev);\n+\tcase VFIO_PCI_TPH_GET_ST:\n+\t\treturn vfio_pci_tph_get_st(vdev, &op, uarg + minsz);\n \tdefault:\n \t\t/* Other ops are not implemented yet */\n \t\treturn -EINVAL;\n",
    "prefixes": [
        "v6",
        "5/6"
    ]
}