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GET /api/1.1/patches/2233350/?format=api
{ "id": 2233350, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2233350/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260506094623.29327-2-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260506094623.29327-2-fengchengwen@huawei.com>", "date": "2026-05-06T09:46:18", "name": "[v6,1/6] PCI/TPH: Fix pcie_tph_get_st_table_loc() field extraction", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "726db17e7adcf49f7a57e2a7711b3cd3d0ce9676", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/1.1/people/92756/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260506094623.29327-2-fengchengwen@huawei.com/mbox/", "series": [ { "id": 502946, "url": "http://patchwork.ozlabs.org/api/1.1/series/502946/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=502946", "date": "2026-05-06T09:46:19", "name": "vfio/pci: Add PCIe TPH support", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/502946/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2233350/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2233350/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53840-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=tkoMLbra;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-53840-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=\"tkoMLbra\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=113.46.200.227", "smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=huawei.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g9Vw50zGmz1y04\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 06 May 2026 19:49:25 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 23DA9304202D\n\tfor <incoming@patchwork.ozlabs.org>; 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Wed, 6 May 2026 17:46:30 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1778060796; cv=none;\n b=gA8Oeiuj7AiwMbNnDmt06MzMereI30BGbe4Dg1Mc6yDMnbxZV3Bbrfk46CN1y5RGm7JAVKj5Vvq2RZB9nJ2J0akg1Bep/G6r+glj0zyyJRg9ZXVxDj7vS0/2wt3qu/fUCeTOtCgdyNfVO7LLNcc6FOXi3+qppNThRgvIZ+iRjVI=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1778060796; c=relaxed/simple;\n\tbh=Cb3lKr9ZT4E4FXXH5XoY9N6dSkYP7CZkxlXZCxhMIoc=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=B2v1CiaTCZ3PrLS7zJj6F70+Mhv7uXzYtQoBfwQzE2MFxem7nfKaNAWmX9+GtHkiQozuITS3RNgcIbXaTTm6U1EqVv+ir4urEJaVCIZVjzG37kxWw9a7AbpzbQJSRxc46GiAgSPhGMY3UoKcZU94HMGyk4zVrrkB5p5YkGDjWG0=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=tkoMLbra; arc=none smtp.client-ip=113.46.200.227", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=33nqALlC/zQMkVVrhUBV9oznkV8KXr0/Dt1jYSrqjtU=;\n\tb=tkoMLbradJVeoI2VlmEYvv46f0MOHjAhRSw87ubCLksQd4MTOiacqFqlt0S5aSuAhPouQnHmd\n\tmxoyVtPByNX1GuK2cVGOCpcckazq/I1JtUxRlUsJOxR6eiQmyhuIPdemCh0SgnydGb1HhaO6HZx\n\tNY4J4l1rqfJxePTba7F9/mg=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <helgaas@kernel.org>, <wei.huang2@amd.com>,\n\t<wangzhou1@hisilicon.com>, <wangyushan12@huawei.com>,\n\t<liuyonglong@huawei.com>, <kvm@vger.kernel.org>, <linux-pci@vger.kernel.org>", "Subject": "[PATCH v6 1/6] PCI/TPH: Fix pcie_tph_get_st_table_loc() field\n extraction", "Date": "Wed, 6 May 2026 17:46:18 +0800", "Message-ID": "<20260506094623.29327-2-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20260506094623.29327-1-fengchengwen@huawei.com>", "References": "<20260506094623.29327-1-fengchengwen@huawei.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems500001.china.huawei.com (7.221.188.70) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "pcie_tph_get_st_table_loc() incorrectly uses FIELD_GET(), which shifts the\nfield value to bit 0. But the function is designed to return raw\nPCI_TPH_LOC_* values as defined in the function comment.\n\nThis causes incorrect ST table location detection. Fix it by using bitwise\nAND with PCI_TPH_CAP_LOC_MASK to return the unshifted field value matching\nthe function specification.\n\nWhile this change appears to be a no-op within tph.c, the external caller\nmlx5_st_create() relies on the documented function behavior, making this\nfix necessary.\n\nFixes: d2e8a34876ce (\"PCI/TPH: Add Steering Tag support\")\nCc: stable@vger.kernel.org\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nReviewed-by: Alex Williamson <alex.williamson@nvidia.com>\n---\n drivers/pci/tph.c | 8 +-------\n 1 file changed, 1 insertion(+), 7 deletions(-)", "diff": "diff --git a/drivers/pci/tph.c b/drivers/pci/tph.c\nindex 91145e8d9d95..f17b74b5fb1e 100644\n--- a/drivers/pci/tph.c\n+++ b/drivers/pci/tph.c\n@@ -170,7 +170,7 @@ u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev)\n \n \tpci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®);\n \n-\treturn FIELD_GET(PCI_TPH_CAP_LOC_MASK, reg);\n+\treturn reg & PCI_TPH_CAP_LOC_MASK;\n }\n EXPORT_SYMBOL(pcie_tph_get_st_table_loc);\n \n@@ -183,11 +183,7 @@ u16 pcie_tph_get_st_table_size(struct pci_dev *pdev)\n \tu32 reg;\n \tu32 loc;\n \n-\t/* Check ST table location first */\n \tloc = pcie_tph_get_st_table_loc(pdev);\n-\n-\t/* Convert loc to match with PCI_TPH_LOC_* defined in pci_regs.h */\n-\tloc = FIELD_PREP(PCI_TPH_CAP_LOC_MASK, loc);\n \tif (loc != PCI_TPH_LOC_CAP)\n \t\treturn 0;\n \n@@ -316,8 +312,6 @@ int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, u16 tag)\n \tset_ctrl_reg_req_en(pdev, PCI_TPH_REQ_DISABLE);\n \n \tloc = pcie_tph_get_st_table_loc(pdev);\n-\t/* Convert loc to match with PCI_TPH_LOC_* */\n-\tloc = FIELD_PREP(PCI_TPH_CAP_LOC_MASK, loc);\n \n \tswitch (loc) {\n \tcase PCI_TPH_LOC_MSIX:\n", "prefixes": [ "v6", "1/6" ] }