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GET /api/1.1/patches/2232536/?format=api
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{
    "id": 2232536,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2232536/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260504171342.1655882-2-raymondmaoca@gmail.com/",
    "project": {
        "id": 67,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/67/?format=api",
        "name": "OpenSBI development",
        "link_name": "opensbi",
        "list_id": "opensbi.lists.infradead.org",
        "list_email": "opensbi@lists.infradead.org",
        "web_url": "https://github.com/riscv/opensbi",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260504171342.1655882-2-raymondmaoca@gmail.com>",
    "date": "2026-05-04T17:13:41",
    "name": "[v2,2/3,NOT-FOR-UPSTREAM] lib: utils: irqchip: add QEMU virt test for APLIC wired IRQs",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "ac7247800e8be62290d0bb06cd32bbe6f721b1db",
    "submitter": {
        "id": 91989,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/91989/?format=api",
        "name": "Raymond Mao",
        "email": "raymondmaoca@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260504171342.1655882-2-raymondmaoca@gmail.com/mbox/",
    "series": [
        {
            "id": 502701,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/502701/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=502701",
            "date": "2026-05-04T17:13:40",
            "name": "[v2,1/3] lib: utils: irqchip: implement APLIC hwirq operation hooks",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/502701/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2232536/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2232536/checks/",
    "tags": {},
    "headers": {
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        "From": "Raymond Mao <raymondmaoca@gmail.com>",
        "To": "opensbi@lists.infradead.org",
        "Cc": "scott@riscstar.com,\n\tdave.patel@riscstar.com,\n\traymond.mao@riscstar.com,\n\trobin.randhawa@sifive.com,\n\tsamuel.holland@sifive.com,\n\tanup.patel@qti.qualcomm.com,\n\tanuppate@qti.qualcomm.com,\n\tanup@brainfault.org,\n\tdhaval@rivosinc.com,\n\tpeter.lin@sifive.com",
        "Subject": "[PATCH v2 2/3] [NOT-FOR-UPSTREAM] lib: utils: irqchip: add QEMU virt\n test for APLIC wired IRQs",
        "Date": "Mon,  4 May 2026 13:13:41 -0400",
        "Message-Id": "<20260504171342.1655882-2-raymondmaoca@gmail.com>",
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        "In-Reply-To": "<20260504171342.1655882-1-raymondmaoca@gmail.com>",
        "References": "<20260504171342.1655882-1-raymondmaoca@gmail.com>",
        "MIME-Version": "1.0",
        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260504_101356_285408_4B6DD05C ",
        "X-CRM114-Status": "GOOD (  16.35  )",
        "X-Spam-Score": "-2.1 (--)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  From: Raymond Mao Add a QEMU virt specific test hook for\n validating\n    APLIC wired external interrupt handling. When APLIC_QEMU_WIRED_TEST is\n enabled,\n    keep the test path limited to hwirq 10 and only register it when the\n current\n    APLIC instance is the M-mode direct-mode provider and that interrupt is\n not\n    delegate [...]\n Content analysis details:   (-2.1 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE     RBL: Sender listed at https://www.dnswl.org/, no\n                             trust\n                             [2607:f8b0:4864:20:0:0:0:830 listed in]\n                             [list.dnswl.org]\n -0.0 SPF_PASS               SPF: sender matches SPF record\n  0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]\n  0.0 FREEMAIL_FROM          Sender email is commonly abused enduser mail\n provider\n                             [raymondmaoca(at)gmail.com]",
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    },
    "content": "From: Raymond Mao <raymond.mao@riscstar.com>\n\nAdd a QEMU virt specific test hook for validating APLIC wired external\ninterrupt handling.\n\nWhen APLIC_QEMU_WIRED_TEST is enabled, keep the test path limited to\nhwirq 10 and only register it when the current APLIC instance is the\nM-mode direct-mode provider and that interrupt is not delegated to a\nchild domain.\nThis keeps the test path compatible with the generic APLIC changes\nwhile still allowing a DT overlay to expose an M-mode wired IRQ on\nQEMU virt.\n\nSigned-off-by: Raymond Mao <raymond.mao@riscstar.com>\n---\n Makefile                  |  3 ++\n lib/utils/irqchip/aplic.c | 62 +++++++++++++++++++++++++++++++++++++++\n 2 files changed, 65 insertions(+)",
    "diff": "diff --git a/Makefile b/Makefile\nindex 46541063..418ee1aa 100644\n--- a/Makefile\n+++ b/Makefile\n@@ -399,6 +399,9 @@ CFLAGS\t\t+=\t$(GENFLAGS)\n CFLAGS\t\t+=\t$(platform-cflags-y)\n CFLAGS\t\t+=\t-fPIE -pie\n CFLAGS\t\t+=\t$(firmware-cflags-y)\n+ifeq ($(APLIC_QEMU_WIRED_TEST),y)\n+CFLAGS\t\t+=\t-DAPLIC_QEMU_WIRED_TEST\n+endif\n \n CPPFLAGS\t+=\t$(GENFLAGS)\n CPPFLAGS\t+=\t$(platform-cppflags-y)\ndiff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c\nindex 3f4991b5..82efdb71 100644\n--- a/lib/utils/irqchip/aplic.c\n+++ b/lib/utils/irqchip/aplic.c\n@@ -112,6 +112,7 @@\n #define APLIC_DEFAULT_PRIORITY\t\t1\n #define APLIC_DISABLE_IDELIVERY\t\t0\n #define APLIC_ENABLE_IDELIVERY\t\t1\n+#define APLIC_QEMU_TEST_HWIRQ\t\t10\n #define APLIC_DISABLE_ITHRESHOLD\t1\n #define APLIC_ENABLE_ITHRESHOLD\t\t0\n \n@@ -119,6 +120,41 @@ static SBI_LIST_HEAD(aplic_list);\n static void aplic_writel_msicfg(struct aplic_msicfg_data *msicfg,\n \t\t\t\tvoid *msicfgaddr, void *msicfgaddrH);\n \n+#ifdef APLIC_QEMU_WIRED_TEST\n+\n+#define UART_QEMU_MMIO 0x10000000UL\n+\n+static void aplic_test_uart_handler(void)\n+{\n+\tvolatile u8 *uart = (volatile u8 *)UART_QEMU_MMIO;\n+\n+\t/* Drain RX FIFO to clear the interrupt source */\n+\twhile (uart[0x05] & 0x01) {        /* LSR.DR */\n+\t\tu8 ch = uart[0x00];            /* RBR */\n+\n+\t\tsbi_printf(\"[APLIC TEST] UART got '%c'(0x%02x)\\n\",\n+\t\t\t   (ch >= 32 && ch < 127) ? ch : '.', ch);\n+\t}\n+\n+\t/* (Optional) read IIR to acknowledge on some models */\n+\t(void)uart[0x02]; /* IIR is at offset 2 when DLAB=0; */\n+}\n+\n+static void aplic_hwirq_test_run(unsigned long aplic_addr)\n+{\n+\tvolatile u8 *uart = (volatile u8 *)UART_QEMU_MMIO;\n+\n+\t/* UART: enable RX interrupt */\n+\tuart[0x02] = 0x07;          /* FCR enable+clear */\n+\tuart[0x04] |= (1 << 3);     /* MCR.OUT2 */\n+\tuart[0x01] |= 0x01;         /* IER.ERBFI */\n+\twhile (uart[0x05] & 0x01)   /* drain */\n+\t\t(void)uart[0x00];\n+\n+\tsbi_printf(\"[APLIC TEST] Setup done. Type keys now.\\n\");\n+}\n+#endif\n+\n static void aplic_init(struct aplic_data *aplic)\n {\n \tstruct aplic_delegate_data *deleg;\n@@ -245,6 +281,20 @@ static int aplic_check_msicfg(struct aplic_msicfg_data *msicfg)\n \treturn 0;\n }\n \n+#ifdef APLIC_QEMU_WIRED_TEST\n+static int aplic_hwirq_handler(u32 hwirq, void *opaque)\n+{\n+\t(void)opaque;\n+\n+\tsbi_printf(\"[APLIC] Enter registered hwirq %u raw handler callback\\n\",\n+\t\t   hwirq);\n+\n+\tif (hwirq == 10)\n+\t\taplic_test_uart_handler();\n+\n+\treturn SBI_OK;\n+}\n+#endif\n static inline void *aplic_idc_base(unsigned long aplic_addr, u32 idc_index)\n {\n \treturn (void *)(aplic_addr + APLIC_IDC_BASE +\n@@ -541,6 +591,18 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)\n \n \t/* Attach to the aplic list */\n \tsbi_list_add_tail(&aplic->node, &aplic_list);\n+#ifdef APLIC_QEMU_WIRED_TEST\n+\tif (aplic_mmode_direct(aplic) &&\n+\t    !aplic_hwirq_delegated(aplic, APLIC_QEMU_TEST_HWIRQ)) {\n+\t\trc = sbi_irqchip_register_handler(&aplic->irqchip,\n+\t\t\t\t\t\t  APLIC_QEMU_TEST_HWIRQ, 1,\n+\t\t\t\t\t\t  aplic_hwirq_handler, NULL);\n+\t\tif (rc)\n+\t\t\treturn rc;\n \n+\t\t/* Enable test in M-mode before jumping to any payload */\n+\t\taplic_hwirq_test_run(aplic->addr);\n+\t}\n+#endif\n \treturn 0;\n }\n",
    "prefixes": [
        "v2",
        "2/3",
        "NOT-FOR-UPSTREAM"
    ]
}