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GET /api/1.1/patches/2232516/?format=api
{ "id": 2232516, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2232516/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-feat-mte4-v5-15-232a648e63c6@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260504-feat-mte4-v5-15-232a648e63c6@gmail.com>", "date": "2026-05-04T15:50:48", "name": "[v5,15/15] tests/tcg: add test for MTE_STORE_ONLY", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "298ea01181737bf7ba3bcbd5591d6509ed45a0d4", "submitter": { "id": 91863, "url": "http://patchwork.ozlabs.org/api/1.1/people/91863/?format=api", "name": "Gabriel Brookman", "email": "brookmangabriel@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-feat-mte4-v5-15-232a648e63c6@gmail.com/mbox/", "series": [ { "id": 502688, "url": "http://patchwork.ozlabs.org/api/1.1/series/502688/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502688", "date": "2026-05-04T15:50:33", "name": "target/arm: add support for MTE4", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/502688/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232516/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232516/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=BuLTDv24;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260504-feat-mte4-v5-15-232a648e63c6@gmail.com>", "References": "<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>", "In-Reply-To": "<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>", "To": "qemu-devel@nongnu.org", "Cc": "Peter Maydell <peter.maydell@linaro.org>,\n Gustavo Romero <gustavo.romero@linaro.org>,\n Richard Henderson <richard.henderson@linaro.org>, qemu-arm@nongnu.org,\n Laurent Vivier <laurent@vivier.eu>,\n Gabriel Brookman <brookmangabriel@gmail.com>, Helge Deller <deller@gmx.de>,\n Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,\n Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>", "X-Mailer": "b4 0.15.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777909867; l=2991;\n i=brookmangabriel@gmail.com; s=20251009; h=from:subject:message-id;\n bh=mAwPuGJQelulccRrIcbbltCeg9NHZ8EE7GZcbX8aqAw=;\n b=Sqpq09fEtblXyJ18AAhCaSO4jIAAdZ0t/rwE+imXdahW0euiZhu1Vhmt1ANRknj7iakgqF0mg\n 7jACBhixnvKBTazCr8APVXrnTBHbGHjg05wphSrsxmYa1/nmFlULgoN", "X-Developer-Key": "i=brookmangabriel@gmail.com; a=ed25519;\n pk=m9TtPDal6WzoHNnQiHHKf8dTrv3DUCPUUTujuo8vNrw=", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::736;\n envelope-from=brookmangabriel@gmail.com; helo=mail-qk1-x736.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Added a test that checks that MTE checks are not performed on loads when\nMTE_STORE_ONLY is enabled.\n\nSigned-off-by: Gabriel Brookman <brookmangabriel@gmail.com>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\n---\n tests/tcg/aarch64/Makefile.target | 2 +-\n tests/tcg/aarch64/mte-10.c | 49 +++++++++++++++++++++++++++++++++++++++\n tests/tcg/aarch64/mte.h | 4 ++--\n 3 files changed, 52 insertions(+), 3 deletions(-)", "diff": "diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target\nindex b491cfb5e1..6203ac9b51 100644\n--- a/tests/tcg/aarch64/Makefile.target\n+++ b/tests/tcg/aarch64/Makefile.target\n@@ -64,7 +64,7 @@ AARCH64_TESTS += bti-2\n \n # MTE Tests\n ifneq ($(CROSS_CC_HAS_ARMV8_MTE),)\n-AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8 mte-9\n+AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8 mte-9 mte-10\n mte-%: CFLAGS += $(CROSS_CC_HAS_ARMV8_MTE)\n endif\n \ndiff --git a/tests/tcg/aarch64/mte-10.c b/tests/tcg/aarch64/mte-10.c\nnew file mode 100644\nindex 0000000000..46d26fe97f\n--- /dev/null\n+++ b/tests/tcg/aarch64/mte-10.c\n@@ -0,0 +1,49 @@\n+/*\n+ * Memory tagging, write-only tag checking\n+ *\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include \"mte.h\"\n+\n+void pass(int sig, siginfo_t *info, void *uc)\n+{\n+ exit(0);\n+}\n+\n+int main(int ac, char **av)\n+{\n+ struct sigaction sa;\n+ int *p0, *p1, *p2;\n+ long excl = 1;\n+\n+ enable_mte(PR_MTE_TCF_SYNC | PR_MTE_STORE_ONLY);\n+ p0 = alloc_mte_mem(sizeof(*p0));\n+\n+ /* Create two differently tagged pointers. */\n+ asm(\"irg %0,%1,%2\" : \"=r\"(p1) : \"r\"(p0), \"r\"(excl));\n+ asm(\"gmi %0,%1,%0\" : \"+r\"(excl) : \"r\" (p1));\n+ assert(excl != 1);\n+ asm(\"irg %0,%1,%2\" : \"=r\"(p2) : \"r\"(p0), \"r\"(excl));\n+ assert(p1 != p2);\n+\n+ /* Store the tag from the first pointer. */\n+ asm(\"stg %0, [%0]\" : : \"r\"(p1));\n+\n+ /*\n+ * We write to p1 (stg above makes this check pass) and read from\n+ * p2 (improperly tagged, but since it's a read, we don't care).\n+ */\n+ *p1 = *p2;\n+\n+ /* enable handler */\n+ memset(&sa, 0, sizeof(sa));\n+ sa.sa_sigaction = pass;\n+ sa.sa_flags = SA_SIGINFO;\n+ sigaction(SIGSEGV, &sa, NULL);\n+\n+ /* now we write to badly tagged p2, should fault. */\n+ *p2 = 0;\n+\n+ abort();\n+}\ndiff --git a/tests/tcg/aarch64/mte.h b/tests/tcg/aarch64/mte.h\nindex 17b932f3f1..7093b93dc7 100644\n--- a/tests/tcg/aarch64/mte.h\n+++ b/tests/tcg/aarch64/mte.h\n@@ -40,10 +40,10 @@\n # define SEGV_MTESERR 9\n #endif\n \n-static void enable_mte(int tcf)\n+static void enable_mte(int flags)\n {\n int r = prctl(PR_SET_TAGGED_ADDR_CTRL,\n- PR_TAGGED_ADDR_ENABLE | tcf | (0xfffe << PR_MTE_TAG_SHIFT),\n+ PR_TAGGED_ADDR_ENABLE | flags | (0xfffe << PR_MTE_TAG_SHIFT),\n 0, 0, 0);\n if (r < 0) {\n perror(\"PR_SET_TAGGED_ADDR_CTRL\");\n", "prefixes": [ "v5", "15/15" ] }