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GET /api/1.1/patches/2232494/?format=api
{ "id": 2232494, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2232494/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/CAFULd4a86+wdgVt34CdSmNmfP6mzKN4KFQT=YmnLxyUZV-J97A@mail.gmail.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<CAFULd4a86+wdgVt34CdSmNmfP6mzKN4KFQT=YmnLxyUZV-J97A@mail.gmail.com>", "date": "2026-05-04T15:35:39", "name": "[pushed] i386: Relax predicates in BT splitters", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a50c311ca8d5e2864c2f369a5de4f88c0ad39114", "submitter": { "id": 808, "url": "http://patchwork.ozlabs.org/api/1.1/people/808/?format=api", "name": "Uros Bizjak", "email": "ubizjak@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/CAFULd4a86+wdgVt34CdSmNmfP6mzKN4KFQT=YmnLxyUZV-J97A@mail.gmail.com/mbox/", "series": [ { "id": 502684, "url": "http://patchwork.ozlabs.org/api/1.1/series/502684/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502684", "date": "2026-05-04T15:35:39", "name": "[pushed] i386: Relax predicates in BT splitters", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502684/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232494/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232494/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Wk8D35Qp;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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Mon, 04 May 2026\n 08:35:52 -0700 (PDT)", "MIME-Version": "1.0", "From": "Uros Bizjak <ubizjak@gmail.com>", "Date": "Mon, 4 May 2026 17:35:39 +0200", "X-Gm-Features": "AVHnY4LFBY0neHGktN7fDxn9JyrEDOlSL9aryaOeBfUwdBXusIYy0N44EqnSQNE", "Message-ID": "\n <CAFULd4a86+wdgVt34CdSmNmfP6mzKN4KFQT=YmnLxyUZV-J97A@mail.gmail.com>", "Subject": "[pushed] i386: Relax predicates in BT splitters", "To": "\"gcc-patches@gcc.gnu.org\" <gcc-patches@gcc.gnu.org>", "Content-Type": "multipart/mixed; boundary=\"0000000000008b82aa0650ffafe1\"", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Allow QImode subregs of AND results in HImode and SImode (and DImode\non 64-bit targets). Also allow memory operands for the BT base operand\nto increase combine opportunities and enable better insn propagation.\n\nThe BT insn is slow when using a memory base with a variable bit index,\nbut the register allocator can reload a memory operand into a register to\nsatisfy BT pattern constraints.\n\nThe patch improves code generation for the included testcase from:\n\nmask_get_flag:\n movl %esi, %ecx\n movl $1, %eax\n salq %cl, %rax\n testq %rdi, %rax\n setne %al\n ret\nto:\n\nmask_get_flag:\n xorl %eax, %eax\n btq %rsi, %rdi\n setc %al\n ret\n\ngcc/ChangeLog:\n\n * config/i386/i386.md (*bt<SWI48:mode>_mask): Use\n int248_register_operand for operand 1 predicate.\n (*jcc_bt<mode>_mask): Use nonimmediate_operand for operand 1 predicate.\n (*jcc_bt<SWI48:mode>_mask_1): Use nonimmediate_operand for operand 1\n predicate and int248_register_operand for operand 2 predicate.\n (BT followed by CMOV splitter): Use nonimmediate_operand\n for operand 1 predicate.\n (*bt<mode>_setcqi): Ditto.\n (*bt<mode>_setncqi): Ditto.\n (*bt<mode>_setnc<mode>): Ditto.\n (*bt<mode>_setncqi_2): Ditto.\n (*bt<mode>_setc<mode>_mask): Use nonimmediate_operand for operand 1\n predicate and int248_register_operand for operand 2 predicate.\n\ngcc/testsuite/ChangeLog:\n\n * gcc.target/i386/bt-8.c: New test.\n\nBootstrapped and regression tested on x86_64-linux-gnu {,-m32}.\n\nUros.", "diff": "diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md\nindex e514809453d..b0990294b9a 100644\n--- a/gcc/config/i386/i386.md\n+++ b/gcc/config/i386/i386.md\n@@ -19573,8 +19573,8 @@ (define_insn_and_split \"*bt<SWI48:mode>_mask\"\n (match_operand:SWI48 0 \"nonimmediate_operand\" \"r,m\")\n (const_int 1)\n \t (subreg:QI\n-\t (and:SWI248\n-\t\t(match_operand:SWI248 1 \"register_operand\")\n+\t (and\n+\t\t(match_operand 1 \"int248_register_operand\")\n \t\t(match_operand 2 \"const_int_operand\")) 0))))]\n \"TARGET_USE_BT\n && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<SWI48:MODE>mode)-1))\n@@ -19629,7 +19629,7 @@ (define_insn_and_split \"*jcc_bt<mode>_mask\"\n [(set (pc)\n \t(if_then_else (match_operator 0 \"bt_comparison_operator\"\n \t\t\t[(zero_extract:SWI48\n-\t\t\t (match_operand:SWI48 1 \"register_operand\")\n+\t\t\t (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t\t\t (const_int 1)\n \t\t\t (and:QI\n \t\t\t (match_operand:QI 2 \"register_operand\")\n@@ -19665,11 +19665,11 @@ (define_insn_and_split \"*jcc_bt<SWI48:mode>_mask_1\"\n [(set (pc)\n \t(if_then_else (match_operator 0 \"bt_comparison_operator\"\n \t\t\t[(zero_extract:SWI48\n-\t\t\t (match_operand:SWI48 1 \"register_operand\")\n+\t\t\t (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t\t\t (const_int 1)\n \t\t\t (subreg:QI\n-\t\t\t (and:SWI248\n-\t\t\t (match_operand:SWI248 2 \"register_operand\")\n+\t\t\t (and\n+\t\t\t (match_operand 2 \"int248_register_operand\")\n \t\t\t (match_operand 3 \"const_int_operand\")) 0))\n \t\t\t (const_int 0)])\n \t\t (label_ref (match_operand 4))\n@@ -19704,7 +19704,7 @@ (define_split\n \t(if_then_else:SWI248\n \t (match_operator 5 \"bt_comparison_operator\"\n \t [(zero_extract:SWI48\n-\t (match_operand:SWI48 1 \"register_operand\")\n+\t (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t (const_int 1)\n \t (match_operand:QI 2 \"register_operand\"))\n \t (const_int 0)])\n@@ -19730,7 +19730,7 @@ (define_split\n (define_insn_and_split \"*bt<mode>_setcqi\"\n [(set (subreg:SWI48 (match_operand:QI 0 \"register_operand\") 0)\n (zero_extract:SWI48\n- (match_operand:SWI48 1 \"register_operand\")\n+ (match_operand:SWI48 1 \"nonimmediate_operand\")\n (const_int 1)\n (match_operand:QI 2 \"register_operand\")))\n (clobber (reg:CC FLAGS_REG))]\n@@ -19750,7 +19750,7 @@ (define_insn_and_split \"*bt<mode>_setncqi\"\n \t(and:QI\n \t (not:QI\n \t (subreg:QI\n-\t (lshiftrt:SWI48 (match_operand:SWI48 1 \"register_operand\")\n+\t (lshiftrt:SWI48 (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t\t\t (match_operand:QI 2 \"register_operand\")) 0))\n \t (const_int 1)))\n (clobber (reg:CC FLAGS_REG))]\n@@ -19768,7 +19768,7 @@ (define_insn_and_split \"*bt<mode>_setnc<mode>\"\n [(set (match_operand:SWI48 0 \"register_operand\")\n \t(and:SWI48\n \t (not:SWI48\n-\t (lshiftrt:SWI48 (match_operand:SWI48 1 \"register_operand\")\n+\t (lshiftrt:SWI48 (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t\t\t (match_operand:QI 2 \"register_operand\")))\n \t (const_int 1)))\n (clobber (reg:CC FLAGS_REG))]\n@@ -19789,7 +19789,7 @@ (define_insn_and_split \"*bt<mode>_setncqi_2\"\n [(set (match_operand:QI 0 \"register_operand\")\n \t(eq:QI\n \t (zero_extract:SWI48\n- \t (match_operand:SWI48 1 \"register_operand\")\n+\t (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t (const_int 1)\n \t (match_operand:QI 2 \"register_operand\"))\n \t (const_int 0)))\n@@ -19808,11 +19808,11 @@ (define_insn_and_split \"*bt<mode>_setncqi_2\"\n (define_insn_and_split \"*bt<mode>_setc<mode>_mask\"\n [(set (match_operand:SWI48 0 \"register_operand\")\n \t(zero_extract:SWI48\n- \t (match_operand:SWI48 1 \"register_operand\")\n+\t (match_operand:SWI48 1 \"nonimmediate_operand\")\n \t (const_int 1)\n \t (subreg:QI\n-\t (and:SWI48\n-\t (match_operand:SWI48 2 \"register_operand\")\n+\t (and\n+\t (match_operand 2 \"int248_register_operand\")\n \t (match_operand 3 \"const_int_operand\")) 0)))\n (clobber (reg:CC FLAGS_REG))]\n \"TARGET_USE_BT\ndiff --git a/gcc/testsuite/gcc.target/i386/bt-8.c b/gcc/testsuite/gcc.target/i386/bt-8.c\nnew file mode 100644\nindex 00000000000..3cd75c850b4\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/bt-8.c\n@@ -0,0 +1,10 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=core2\" } */\n+\n+_Bool mask_get_flag(long mask, int offset)\n+{\n+ return mask & 1ul << (offset % (__SIZEOF_LONG__ * __CHAR_BIT__));\n+}\n+\n+/* { dg-final { scan-assembler \"bt\\[lq\\]\\[ \\t\\]\" } } */\n+/* { dg-final { scan-assembler-not \"sal\\[lq\\]\\[ \\t\\]\" } } */\n", "prefixes": [ "pushed" ] }