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GET /api/1.1/patches/2231724/?format=api
{ "id": 2231724, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231724/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260501101505.3485916-21-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260501101505.3485916-21-peter.maydell@linaro.org>", "date": "2026-05-01T10:14:57", "name": "[PULL,20/28] hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e6e6604d021aedbc16fb16479fcc4da4bd4aea3b", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260501101505.3485916-21-peter.maydell@linaro.org/mbox/", "series": [ { "id": 502437, "url": "http://patchwork.ozlabs.org/api/1.1/series/502437/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502437", "date": "2026-05-01T10:14:41", "name": "[PULL,01/28] hw/arm/fsl-imx8mp: Do not create redundant unimplemented devices", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502437/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231724/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231724/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=pOGxbXOS;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6Rn05hLDz1xqf\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 01 May 2026 20:17:40 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wIkuK-00043h-7D; Fri, 01 May 2026 06:15:40 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wIkuG-00041j-Qp\n for qemu-devel@nongnu.org; Fri, 01 May 2026 06:15:37 -0400", "from mail-wm1-x331.google.com ([2a00:1450:4864:20::331])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wIkuF-0000Cs-4M\n for qemu-devel@nongnu.org; Fri, 01 May 2026 06:15:36 -0400", "by mail-wm1-x331.google.com with SMTP id\n 5b1f17b1804b1-483487335c2so19479275e9.2\n for <qemu-devel@nongnu.org>; Fri, 01 May 2026 03:15:34 -0700 (PDT)", "from lanath.. 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[81.2.115.145])\n by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-48a8fede418sm12863335e9.6.2026.05.01.03.15.31\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 01 May 2026 03:15:32 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1777630533; x=1778235333; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:from:to:cc:subject:date:message-id\n :reply-to; bh=ErZn9qmgXZtVOOp/Xbnqo1NJ59jCbutyDEpe1t2jpNk=;\n b=pOGxbXOSxh14t82MqsQAZX2KtcTHkrg8XyhfHPD0jsYwbzOkw/+6aWQ/o/qay5WK3Y\n +h3vOO7oEmJqiz2nLgM1aaau13FUER1kxDJDUMZjq2Nhtz06VAttL3TGEI925sOJdHJ2\n LzBX1zt3odvGUoyMdijR1j6meEZ1hbgau6ZY0Fs46IuIBCKqi/cHjj6vqbaOrHM/BUxR\n 9CtVTYOSVOOtQ6cSsXLDtd4Ft8LGtBaHuxv/zc0l7/sDBsb29fZUYZgCxUfdM6EIuy2R\n 3w/EIEbjhn4+/htOOS7xdf6eZkWw6Qzh5zJ7Q/zxcD32iEKIWlZu0iadSzHEMbzObPYp\n V01g==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777630533; x=1778235333;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=ErZn9qmgXZtVOOp/Xbnqo1NJ59jCbutyDEpe1t2jpNk=;\n b=GIeSVF0cndpRX/EgOHqsEIvoFpuknQdPGmLFlFEZx3NCEzs/5PTh9Mu9rmeO51/7SN\n UZNOJzGNMVcuJjLHt918pehTjT6CuvAQ4h/gZ5gQ/mfTSxJnww2YUYESf31WtwG1+PPZ\n W7gGX45GwGKfSoIs0F70nTfaqloShgOB2lDVJ+FhgVhsoWHv7xmGHnJzGt3XqkFsLMFs\n cA+ilAYGOBcBx+8RT5DZ6M4i6wGgxppxH3XR9J7D4Dq27XxEkfEqFYBf7YgkIrL1hxNO\n jWX02XlYWykvie46+56T7Zcccf0NJHC8DL1Te2Nm1v9SmKRxjDYemi6hozFCqz0VmfCF\n CoUg==", "X-Gm-Message-State": "AOJu0YyT6d5TKL/KX68iiPxPawtlMlJDjYVjPrvJXn9ErC3IgVbWcIE9\n oNCRthTjQc7SLXARuyMS+1uM6wezN3Mi/1fBHQ3ObQDqcAE9MfNm1I+KMJd2AeBhAq/8cSaKDYU\n xcWGo", "X-Gm-Gg": "AeBDietYQxjyo57JISKM/cBpLUR0EUPD5P2tJaaPA8zQffZayGDkIrvRkT+wR1xjNF2\n IWcsf+AugJiQLMUadY89fOiYIpZBL5xxHYPNN1bgwClbz4gynjCNRCltpcsT0YVCRFeGMk4ch0o\n 2rnoVTdKXbzH+6frnBZxEgyxh0bi/Pu6RRYyflaIyAdydBGt7eSni89AFFuwMGGuP9Q0Rd2WgtT\n kw5y947hpy+WBtTVqk1sfr+5excF3qp2uFYtCNkRut4stTfzeKhKejg1lQr5bwd1OLCcTo8uRrG\n HqSROs8J6ODH2muCeZTPF+C/AcUOyeeXSBY1u31qcmBQZmpiRzSoJYMxvgTzdCnU5yc2e3QlLDn\n L6pEPxcANdOO0ej0naHtlTITy8nNeYK4sNdhAD1HSnOuLBxvTPKonDqVGqtk8ummkxI9oxJkWRN\n 8dICc3QyaUW7FYcigzFI3IEQSx3MYrnpEQOuTVRlEU8M+4r8//3mcE3dy/dE9tyj1qRq0goao1y\n oVQxpDfSh+8cywTmVYkLo/WXxE8rzosGg7YZ/Rz0A==", "X-Received": "by 2002:a05:600c:a119:b0:48a:75b9:5e07 with SMTP id\n 5b1f17b1804b1-48a844f4de3mr80097015e9.11.1777630532647;\n Fri, 01 May 2026 03:15:32 -0700 (PDT)", "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 20/28] hvf: gate ARM_FEATURE_PMU register emulation when using\n the Apple vGIC", "Date": "Fri, 1 May 2026 11:14:57 +0100", "Message-ID": "<20260501101505.3485916-21-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260501101505.3485916-1-peter.maydell@linaro.org>", "References": "<20260501101505.3485916-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::331;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nFrom Apple documentation:\n\n> When EL2 is disabled, PMU register accesses trigger \"Trapped MSR, MRS, or\n> System Instruction\" exceptions. When this happens, hv_vcpu_run() returns, and the\n> hv_vcpu_exit_t object contains the information about this exception.\n\n> When EL2 is enabled, the handling of PMU register accesses is determined by the PMUVer\n> field of ID_AA64DFR0_EL1 register.\n> If the PMUVer field value is zero or is invalid, PMU register accesses generate \"Undefined\"\n> exceptions, which are sent to the guest.\n> If the PMUVer field value is non-zero and valid, PMU register accesses are emulated by the framework.\n> The ID_AA64DFR0_EL1 register can be modified via hv_vcpu_set_sys_reg API.\n\nHowever, despite what that documentation says this is actually gated on using the Apple vGIC\ninstead of nested virtualisation per se. Apple introduced both at the same time.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nReviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>\nMessage-id: 20260429190532.26538-8-mohamed@unpredictable.fr\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n target/arm/hvf/hvf.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\nindex fa0a22fdc3..9d64f2e1a5 100644\n--- a/target/arm/hvf/hvf.c\n+++ b/target/arm/hvf/hvf.c\n@@ -1601,7 +1601,7 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)\n ARMCPU *arm_cpu = ARM_CPU(cpu);\n CPUARMState *env = &arm_cpu->env;\n \n- if (arm_feature(env, ARM_FEATURE_PMU)) {\n+ if (!hvf_irqchip_in_kernel() && arm_feature(env, ARM_FEATURE_PMU)) {\n switch (reg) {\n case SYSREG_PMCR_EL0:\n *val = env->cp15.c9_pmcr;\n@@ -1862,7 +1862,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)\n SYSREG_OP2(reg),\n val);\n \n- if (arm_feature(env, ARM_FEATURE_PMU)) {\n+ if (!hvf_irqchip_in_kernel() && arm_feature(env, ARM_FEATURE_PMU)) {\n switch (reg) {\n case SYSREG_PMCCNTR_EL0:\n pmu_op_start(env);\n", "prefixes": [ "PULL", "20/28" ] }