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GET /api/1.1/patches/2231713/?format=api
{ "id": 2231713, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231713/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260501101505.3485916-16-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260501101505.3485916-16-peter.maydell@linaro.org>", "date": "2026-05-01T10:14:52", "name": "[PULL,15/28] hw/intc: arm_gicv3_hvf: save/restore Apple GIC state", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a92293649653464a18802c2c769924e614e11a38", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260501101505.3485916-16-peter.maydell@linaro.org/mbox/", "series": [ { "id": 502437, "url": "http://patchwork.ozlabs.org/api/1.1/series/502437/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502437", "date": "2026-05-01T10:14:41", "name": "[PULL,01/28] hw/arm/fsl-imx8mp: Do not create redundant unimplemented devices", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502437/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231713/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231713/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=CTj1fa0d;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6Rld2mJXz1xqf\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 01 May 2026 20:16:29 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wIkuM-00045P-KR; Fri, 01 May 2026 06:15:42 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wIkuC-00040l-LG\n for qemu-devel@nongnu.org; Fri, 01 May 2026 06:15:34 -0400", "from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wIku9-0000Ba-M2\n for qemu-devel@nongnu.org; Fri, 01 May 2026 06:15:31 -0400", "by mail-wm1-x32f.google.com with SMTP id\n 5b1f17b1804b1-488ad135063so15070685e9.0\n for <qemu-devel@nongnu.org>; Fri, 01 May 2026 03:15:29 -0700 (PDT)", "from lanath.. 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"<20260501101505.3485916-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::32f;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nOn HVF, some of the GIC state is in an opaque Apple-provided structure.\n\nSave/restore that state to be able to save/restore VMs that use the hardware GIC.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nReviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>\nMessage-id: 20260429190532.26538-3-mohamed@unpredictable.fr\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n hw/intc/arm_gicv3_common.c | 1 +\n hw/intc/arm_gicv3_hvf.c | 94 ++++++++++++++++++++++++++++--\n hw/intc/arm_gicv3_hvf_stub.c | 25 ++++++++\n hw/intc/meson.build | 1 +\n include/hw/intc/arm_gicv3_common.h | 3 +\n 5 files changed, 120 insertions(+), 4 deletions(-)\n create mode 100644 hw/intc/arm_gicv3_hvf_stub.c", "diff": "diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c\nindex 9200671c7a..9c3fb2f4bf 100644\n--- a/hw/intc/arm_gicv3_common.c\n+++ b/hw/intc/arm_gicv3_common.c\n@@ -305,6 +305,7 @@ static const VMStateDescription vmstate_gicv3 = {\n .subsections = (const VMStateDescription * const []) {\n &vmstate_gicv3_gicd_no_migration_shift_bug,\n &vmstate_gicv3_gicd_nmi,\n+ &vmstate_gicv3_hvf,\n NULL\n }\n };\ndiff --git a/hw/intc/arm_gicv3_hvf.c b/hw/intc/arm_gicv3_hvf.c\nindex 22f19d274d..ae881092ea 100644\n--- a/hw/intc/arm_gicv3_hvf.c\n+++ b/hw/intc/arm_gicv3_hvf.c\n@@ -13,6 +13,7 @@\n #include \"qemu/error-report.h\"\n #include \"qemu/module.h\"\n #include \"system/runstate.h\"\n+#include \"migration/vmstate.h\"\n #include \"system/hvf.h\"\n #include \"system/hvf_int.h\"\n #include \"hvf_arm.h\"\n@@ -37,8 +38,13 @@ struct HVFARMGICv3Class {\n \n typedef struct HVFARMGICv3Class HVFARMGICv3Class;\n \n-/* This is reusing the GICv3State typedef from ARM_GICV3_ITS_COMMON */\n-DECLARE_OBJ_CHECKERS(GICv3State, HVFARMGICv3Class,\n+typedef struct HVFGICv3State {\n+ GICv3State parent_obj;\n+ uint32_t size;\n+ void *state;\n+} HVFGICv3State;\n+\n+DECLARE_OBJ_CHECKERS(HVFGICv3State, HVFARMGICv3Class,\n HVF_GICV3, TYPE_HVF_GICV3);\n \n /*\n@@ -668,7 +674,7 @@ static const ARMCPRegInfo gicv3_cpuif_reginfo[] = {\n static void hvf_gicv3_realize(DeviceState *dev, Error **errp)\n {\n ERRP_GUARD();\n- GICv3State *s = HVF_GICV3(dev);\n+ GICv3State *s = (GICv3State *)HVF_GICV3(dev);\n HVFARMGICv3Class *kgc = HVF_GICV3_GET_CLASS(s);\n int i;\n \n@@ -715,6 +721,86 @@ static void hvf_gicv3_realize(DeviceState *dev, Error **errp)\n }\n }\n \n+/*\n+ * HVF doesn't have a way to save the RDIST pending tables\n+ * to guest memory, only to an opaque data structure.\n+ */\n+static bool gicv3_is_hvf(void *opaque)\n+{\n+ return hvf_enabled() && hvf_irqchip_in_kernel();\n+}\n+\n+static int hvf_gic_opaque_state_save(void *opaque)\n+{\n+ HVFGICv3State *gic = opaque;\n+ hv_gic_state_t gic_state;\n+ hv_return_t err;\n+ size_t size;\n+\n+ gic_state = hv_gic_state_create();\n+ if (gic_state == NULL) {\n+ error_report(\"hvf: vgic: failed to create hv_gic_state_create.\");\n+ return 1;\n+ }\n+ err = hv_gic_state_get_size(gic_state, &size);\n+ gic->size = size;\n+ if (err != HV_SUCCESS) {\n+ error_report(\"hvf: vgic: failed to get GIC state size.\");\n+ os_release(gic_state);\n+ return 1;\n+ }\n+ gic->state = g_malloc0(gic->size);\n+ err = hv_gic_state_get_data(gic_state, gic->state);\n+ if (err != HV_SUCCESS) {\n+ error_report(\"hvf: vgic: failed to get GIC state.\");\n+ os_release(gic_state);\n+ return 1;\n+ }\n+\n+ os_release(gic_state);\n+ return 0;\n+}\n+\n+static void hvf_gic_opaque_state_free(void *opaque)\n+{\n+ HVFGICv3State *gic = opaque;\n+ free(gic->state);\n+}\n+\n+static int hvf_gic_opaque_state_restore(void *opaque, int version_id)\n+{\n+ HVFGICv3State *gic = opaque;\n+ hv_return_t err;\n+ if (!gic->size) {\n+ return 0;\n+ }\n+ err = hv_gic_set_state(gic->state, gic->size);\n+ if (err != HV_SUCCESS) {\n+ error_report(\"hvf: vgic: failed to restore GIC state.\");\n+ return 1;\n+ }\n+ return 0;\n+}\n+\n+const VMStateDescription vmstate_gicv3_hvf = {\n+ .name = \"arm_gicv3/hvf_gic_state\",\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+ .needed = gicv3_is_hvf,\n+ .pre_save = hvf_gic_opaque_state_save,\n+ .post_save = hvf_gic_opaque_state_free,\n+ .post_load = hvf_gic_opaque_state_restore,\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+ .fields = (const VMStateField[]) {\n+ VMSTATE_UINT32(size, HVFGICv3State),\n+ VMSTATE_VBUFFER_ALLOC_UINT32(state,\n+ HVFGICv3State, 0, 0,\n+ size),\n+ VMSTATE_END_OF_LIST()\n+ },\n+};\n+\n static void hvf_gicv3_class_init(ObjectClass *klass, const void *data)\n {\n DeviceClass *dc = DEVICE_CLASS(klass);\n@@ -734,7 +820,7 @@ static void hvf_gicv3_class_init(ObjectClass *klass, const void *data)\n static const TypeInfo hvf_arm_gicv3_info = {\n .name = TYPE_HVF_GICV3,\n .parent = TYPE_ARM_GICV3_COMMON,\n- .instance_size = sizeof(GICv3State),\n+ .instance_size = sizeof(HVFGICv3State),\n .class_init = hvf_gicv3_class_init,\n .class_size = sizeof(HVFARMGICv3Class),\n };\ndiff --git a/hw/intc/arm_gicv3_hvf_stub.c b/hw/intc/arm_gicv3_hvf_stub.c\nnew file mode 100644\nindex 0000000000..a587332c7c\n--- /dev/null\n+++ b/hw/intc/arm_gicv3_hvf_stub.c\n@@ -0,0 +1,25 @@\n+/* SPDX-License-Identifier: GPL-2.0-or-later */\n+/*\n+ * ARM Generic Interrupt Controller using HVF platform support stub\n+ *\n+ * Copyright (c) 2026 Mohamed Mediouni\n+ *\n+ */\n+#include \"qemu/osdep.h\"\n+#include \"hw/intc/arm_gicv3_common.h\"\n+#include \"migration/vmstate.h\"\n+#include \"qemu/typedefs.h\"\n+\n+static bool needed_never(void *opaque)\n+{\n+ return false;\n+}\n+\n+const VMStateDescription vmstate_gicv3_hvf = {\n+ .name = \"arm_gicv3/hvf_gic_state\",\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+ .needed = needed_never,\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+};\ndiff --git a/hw/intc/meson.build b/hw/intc/meson.build\nindex b7baf8a0f6..c6de2d9d00 100644\n--- a/hw/intc/meson.build\n+++ b/hw/intc/meson.build\n@@ -43,6 +43,7 @@ arm_common_ss.add(when: 'CONFIG_ARM_GICV3', if_true: files('arm_gicv3_cpuif.c'))\n specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c'))\n specific_ss.add(when: ['CONFIG_WHPX', 'TARGET_AARCH64'], if_true: files('arm_gicv3_whpx.c'))\n specific_ss.add(when: ['CONFIG_HVF', 'CONFIG_ARM_GICV3'], if_true: files('arm_gicv3_hvf.c'))\n+specific_ss.add(when: ['CONFIG_HVF', 'CONFIG_ARM_GICV3'], if_false: files('arm_gicv3_hvf_stub.c'))\n specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c'))\n arm_common_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c'))\n specific_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_irqmp.c'))\ndiff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h\nindex 9adcab0a0c..03ab3e8f2f 100644\n--- a/include/hw/intc/arm_gicv3_common.h\n+++ b/include/hw/intc/arm_gicv3_common.h\n@@ -339,4 +339,7 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler,\n */\n const char *gicv3_class_name(void);\n \n+/* HVF vGIC-specific state: stubbed out on a build with HVF disabled */\n+extern const VMStateDescription vmstate_gicv3_hvf;\n+\n #endif\n", "prefixes": [ "PULL", "15/28" ] }