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GET /api/1.1/patches/2231022/?format=api
{ "id": 2231022, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231022/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260430093810.2762539-7-peter.maydell@linaro.org/", "project": { "id": 69, "url": "http://patchwork.ozlabs.org/api/1.1/projects/69/?format=api", "name": "QEMU powerpc development", "link_name": "qemu-ppc", "list_id": "qemu-ppc.nongnu.org", "list_email": "qemu-ppc@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260430093810.2762539-7-peter.maydell@linaro.org>", "date": "2026-04-30T09:37:51", "name": "[v2,06/25] target/x86: Make get_phys_page_attrs_debug handle non-page-aligned addrs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a52791bd400a72a92d531fb48b5d73ef14d4eb30", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260430093810.2762539-7-peter.maydell@linaro.org/mbox/", "series": [ { "id": 502256, "url": "http://patchwork.ozlabs.org/api/1.1/series/502256/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-ppc/list/?series=502256", "date": "2026-04-30T09:37:46", "name": "Handle sub-page granularity in cpu_memory_rw_debug()", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/502256/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231022/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231022/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=NlYoKLXO;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5q2z3Dlgz1xqf\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 19:42:35 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-ppc-bounces@nongnu.org>)\n\tid 1wINr1-0004sv-6K; Thu, 30 Apr 2026 05:38:43 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wINqn-0004dv-KG\n for qemu-ppc@nongnu.org; Thu, 30 Apr 2026 05:38:29 -0400", "from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wINqi-0002Uq-Ee\n for qemu-ppc@nongnu.org; Thu, 30 Apr 2026 05:38:29 -0400", "by mail-wr1-x42b.google.com with SMTP id\n ffacd0b85a97d-43cff5dafc3so472856f8f.1\n for <qemu-ppc@nongnu.org>; Thu, 30 Apr 2026 02:38:20 -0700 (PDT)", "from lanath.. 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Iglesias\" <edgar.iglesias@gmail.com>,\n Jiaxun Yang <jiaxun.yang@flygoat.com>, Nicholas Piggin <npiggin@gmail.com>,\n Chinmay Rath <rathc@linux.ibm.com>, Glenn Miles <milesg@linux.ibm.com>,\n Palmer Dabbelt <palmer@dabbelt.com>,\n Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>,\n Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,\n Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,\n Chao Liu <chao.liu.zevorn@gmail.com>, Ilya Leoshkevich <iii@linux.ibm.com>,\n David Hildenbrand <david@kernel.org>,\n Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,\n Artyom Tarasenko <atar4qemu@gmail.com>, Max Filippov <jcmvbkbc@gmail.com>", "Subject": "[PATCH v2 06/25] target/x86: Make get_phys_page_attrs_debug handle\n non-page-aligned addrs", "Date": "Thu, 30 Apr 2026 10:37:51 +0100", "Message-ID": "<20260430093810.2762539-7-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260430093810.2762539-1-peter.maydell@linaro.org>", "References": "<20260430093810.2762539-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::42b;\n envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-ppc@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-ppc.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-ppc>", "List-Post": "<mailto:qemu-ppc@nongnu.org>", "List-Help": "<mailto:qemu-ppc-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Currently our implementations of SysemuCPUOps::get_phys_page_debug\nand SysemuCPUOps::get_phys_page_attrs_debug are a mix of \"accepts a\nnon-page-aligned virtual address and returns the corresponding\nnon-page-aligned physical address\" and \"only returns a page-aligned\nphysical address\". This is awkward for callsites, which in practice\nall want the physical address for an arbitrary virtual address and\nhave to work around the possibility of getting a page-aligned\naddress, and it doesn't account for protection being possibly on a\nsub-page-sized granularity. We want to standardize on the\nimplementation having to handle non-page-aligned addresses.\n\nFor x86 this is simple: we just need to stop rounding down the\ninput address to a TARGET_PAGE boundary when calculating the\nresult to return.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-id: 20260417173105.1648172-6-peter.maydell@linaro.org\n---\n target/i386/helper.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)", "diff": "diff --git a/target/i386/helper.c b/target/i386/helper.c\nindex c397a6fde5..108b02396d 100644\n--- a/target/i386/helper.c\n+++ b/target/i386/helper.c\n@@ -372,7 +372,7 @@ hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr,\n out:\n #endif\n pte &= PG_ADDRESS_MASK & ~(page_size - 1);\n- page_offset = (addr & TARGET_PAGE_MASK) & (page_size - 1);\n+ page_offset = addr & (page_size - 1);\n return pte | page_offset;\n }\n \n", "prefixes": [ "v2", "06/25" ] }