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{ "id": 2230858, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230858/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/afL6zXqGY3aYiSHA@cowardly-lion.the-meissners.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<afL6zXqGY3aYiSHA@cowardly-lion.the-meissners.org>", "date": "2026-04-30T06:46:37", "name": "GCC 17, PowerPC Dense Math V7 (patch 7/7) -- Add dense math built-in tests", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a251ec761b8a0ff3e1850ac762bf205c4614fb9d", "submitter": { "id": 73991, "url": "http://patchwork.ozlabs.org/api/1.1/people/73991/?format=api", "name": "Michael Meissner", "email": "meissner@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/afL6zXqGY3aYiSHA@cowardly-lion.the-meissners.org/mbox/", "series": [ { "id": 502219, "url": "http://patchwork.ozlabs.org/api/1.1/series/502219/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502219", "date": "2026-04-30T06:46:37", "name": "GCC 17, PowerPC Dense Math V7 (patch 7/7) -- Add dense math built-in tests", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502219/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230858/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230858/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=M4Utsnfx;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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a=rsa-sha256; d=sourceware.org; s=key; t=1777531605; cv=none;\n b=vilTa6MABK+/ZUjwZYVSnJUDZk4wLlMrzxFQQ3VknK/hCjh9jUAco27J8lj2Jc/ncx75DfvcHRc0fCAMJ5lbexvJiN/ImAERPKiqV8DcN60yWC6oAy3QAL9eC3FAuzUjKoN6lz/jy1kEKDJ9sY8XfHBUNoQ0WpFsCEQxdYb4s+M=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1777531605; c=relaxed/simple;\n bh=I1uUHANVeUn0Pbi1dk/fh5wPb0+LyfLpSGj+9HJhPS8=;\n h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version;\n b=Hh4OUf0seVOFmrxAHcHk/z242ydIzh4N2mugmlmCGg/63lSJwcNjkY0xh8+8P7rThrEoSi/yQZ+M6RNhomxckHJxkk0njlyM5zjja4P91hLJTzkFDZ8ejpOUbAc2BtH5R9VqV6cnJujFqs46ZsTDFB2p7PUdiGjCPGQWRfqYtrQ=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=\n content-type:date:from:in-reply-to:message-id:mime-version\n :references:subject:to; s=pp1; bh=DAONa20yIRkTypbZ6HcD2fGFxrnEhY\n bOF2cjOm7WTzs=; b=M4UtsnfxLMsTeRyffnnZGDsLGARrso7VgycF45OceIFUKV\n YivXAjfGEuJ7vEE5qwF0fIgzlJa1qMRMBADTEFv7FJxacrPSz/8Yxt+lHuVjlaik\n QAufe7IT54XFaZWSJnlt5nD3yP88XVjOzDk+FVXfdMx7iRwlSxikr83hmNZp4Eel\n 0+GYwEvwKphoIMCdyOg+UQKb8iOA5j9eXhM02cLBH/M01HC6zK4flAY2A3HUR1Ro\n /H7MjPjf5mBmuysxxzRfhPfyI2VcaC8tHlDzb0hUjVa1H9vjWW5AJdb8VayQ38r6\n wNC5GCE7hpAW+W5pVN3ElDD2vW2Pjplq3C50s3Nw==", "Date": "Thu, 30 Apr 2026 02:46:37 -0400", "From": "Michael Meissner <meissner@linux.ibm.com>", "To": "Michael Meissner <meissner@linux.ibm.com>, gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "Subject": "GCC 17, PowerPC Dense Math V7 (patch 7/7) -- Add dense math built-in\n tests", "Message-ID": "<afL6zXqGY3aYiSHA@cowardly-lion.the-meissners.org>", "Mail-Followup-To": "Michael Meissner <meissner@linux.ibm.com>,\n gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "References": "<afL4oa26tUJlc9zg@cowardly-lion.the-meissners.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=us-ascii", "Content-Disposition": "inline", "In-Reply-To": "<afL4oa26tUJlc9zg@cowardly-lion.the-meissners.org>", "X-TM-AS-GCONF": "00", "X-Proofpoint-ORIG-GUID": "HfzlJM0jaIwv3iREP-OcicOqD3tjTcvK", "X-Authority-Analysis": "v=2.4 cv=Ft81OWrq c=1 sm=1 tr=0 ts=69f2fad4 cx=c_pps\n a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17\n a=kj9zAlcOel0A:10 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=VnNF1IyMAAAA:8\n a=bShxzX7GVxrlq_-JLD8A:9 a=CjuIK1q_8ugA:10", "X-Proofpoint-GUID": "HfzlJM0jaIwv3iREP-OcicOqD3tjTcvK", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDMwMDA2MCBTYWx0ZWRfXyriMLiN3sJSK\n wgyGAxGBO2WfH+vN97pXNcUWhA1LFJ4EJpvB1TU10PCzU/jlDYj3kgnvph4q9YILaoJ+kolrjqt\n JKjH/hY5RA30z4oBOAfG96GbNIpVEeQBRBPM2bgjfWfhUb2LNh8zsBiqLhC3cqCd8NeSpAv0Fli\n 0Sigk/uDRPVh+rI4/tCNkU18cB51I6vhBQo3Y/vlFgNPZuJZRenSW3sOkbbtfm5dxoYoBzJcMJe\n 1OYIbISz5WzPF1JYcXZq+CHrGQP/PsjO84cNqP8fPGU3J0medCrK2mVejb1ezpcgSxyqu300FXL\n 7UTnwxFv34t65CMzgoQbAgsYv4Q9OZvSsKo0ZJc4vZi12ZSDQL+krrQfiTcUtGl8O7RSfvmsV+T\n yLgL1KcqRtZWhOFezm8bWKZYgFKLBEh2Boa0B5YDdSHv8pRiHhCdNxm6BuTPuC9F1GHoWa/tYYU\n Ckb5VYz2Sf/ILt9a5Og==", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-30_02,2026-04-28_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 lowpriorityscore=0 bulkscore=0 spamscore=0 impostorscore=0\n clxscore=1015 malwarescore=0 phishscore=0 suspectscore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604300060", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "This is part seven of the dense math register patches for the PowerPC.\n\nThis patch adds dense math tests for -mcpu=future, cloning the mma-builtin-*.c\ntests.\n\nI have built bootstrap little endian compilers on power10 systems, and\nbig endian compiler on power9 systems. There were no regression in the\ntests. Can I add the patches to the GCC trunk after the -mcpu=future\npatch is applied and GCC 17 has opened up?\n\n2026-04-29 Michael Meissner <meissner@linux.ibm.com>\n\ngcc/testsuite/\n\n\t* gcc.target/powerpc/dm-builtin-1.c: New test.\n\t* gcc.target/powerpc/dm-builtin-10-pair.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-10-quad.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-2.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-3.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-4.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-5.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-6.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-7.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-8.c: Likewise.\n\t* gcc.target/powerpc/dm-builtin-9.c: Likewise.\n---\n .../gcc.target/powerpc/dm-builtin-1.c | 313 ++++++++++++++++++\n .../gcc.target/powerpc/dm-builtin-10-pair.c | 21 ++\n .../gcc.target/powerpc/dm-builtin-10-quad.c | 23 ++\n .../gcc.target/powerpc/dm-builtin-2.c | 72 ++++\n .../gcc.target/powerpc/dm-builtin-3.c | 31 ++\n .../gcc.target/powerpc/dm-builtin-4.c | 73 ++++\n .../gcc.target/powerpc/dm-builtin-5.c | 47 +++\n .../gcc.target/powerpc/dm-builtin-6.c | 21 ++\n .../gcc.target/powerpc/dm-builtin-7.c | 26 ++\n .../gcc.target/powerpc/dm-builtin-8.c | 27 ++\n .../gcc.target/powerpc/dm-builtin-9.c | 28 ++\n 11 files changed, 682 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c\n create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c", "diff": "diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c\nnew file mode 100644\nindex 00000000000..b2aab020ca4\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c\n@@ -0,0 +1,313 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-Wno-psabi -mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo0 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvi4ger8 (&acc, vec0, vec1);\n+ __builtin_mma_xvi4ger8pp (&acc, vec0, vec1);\n+ dst[0] = acc;\n+}\n+\n+void\n+foo1 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvi8ger4 (&acc, vec0, vec1);\n+ __builtin_mma_xvi8ger4pp (&acc, vec0, vec1);\n+ __builtin_mma_xvi8ger4spp(&acc, vec0, vec1);\n+ dst[1] = acc;\n+}\n+\n+void\n+foo2 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvi16ger2 (&acc, vec0, vec1);\n+ __builtin_mma_xvi16ger2pp (&acc, vec0, vec1);\n+ dst[2] = acc;\n+}\n+\n+void\n+foo3 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvi16ger2s (&acc, vec0, vec1);\n+ __builtin_mma_xvi16ger2spp (&acc, vec0, vec1);\n+ dst[3] = acc;\n+}\n+\n+void\n+foo4 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvf16ger2 (&acc, vec0, vec1);\n+ __builtin_mma_xvf16ger2pp (&acc, vec0, vec1);\n+ __builtin_mma_xvf16ger2pn (&acc, vec0, vec1);\n+ dst[4] = acc;\n+}\n+\n+void\n+foo4b (__vector_quad *dst, __vector_quad *src, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_xvf16ger2np (&acc, vec0, vec1);\n+ __builtin_mma_xvf16ger2nn (&acc, vec0, vec1);\n+ dst[4] = acc;\n+}\n+\n+void\n+foo5 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvbf16ger2 (&acc, vec0, vec1);\n+ __builtin_mma_xvbf16ger2pp (&acc, vec0, vec1);\n+ __builtin_mma_xvbf16ger2pn (&acc, vec0, vec1);\n+ dst[5] = acc;\n+}\n+\n+void\n+foo5b (__vector_quad *dst, __vector_quad *src, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_xvbf16ger2np (&acc, vec0, vec1);\n+ __builtin_mma_xvbf16ger2nn (&acc, vec0, vec1);\n+ dst[5] = acc;\n+}\n+\n+void\n+foo6 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvf32ger (&acc, vec0, vec1);\n+ __builtin_mma_xvf32gerpp (&acc, vec0, vec1);\n+ __builtin_mma_xvf32gerpn (&acc, vec0, vec1);\n+ dst[6] = acc;\n+}\n+\n+void\n+foo6b (__vector_quad *dst, __vector_quad *src, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_xvf32gernp (&acc, vec0, vec1);\n+ __builtin_mma_xvf32gernn (&acc, vec0, vec1);\n+ dst[6] = acc;\n+}\n+\n+void\n+foo7 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvi4ger8 (&acc, vec0, vec1, 15, 15, 255);\n+ __builtin_mma_pmxvi4ger8pp (&acc, vec0, vec1, 15, 15, 255);\n+ dst[7] = acc;\n+}\n+\n+void\n+foo8 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvi8ger4 (&acc, vec0, vec1, 15, 15, 15);\n+ __builtin_mma_pmxvi8ger4pp (&acc, vec0, vec1, 15, 15, 15);\n+ __builtin_mma_pmxvi8ger4spp(&acc, vec0, vec1, 15, 15, 15);\n+ dst[8] = acc;\n+}\n+\n+void\n+foo9 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvi16ger2 (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvi16ger2pp (&acc, vec0, vec1, 15, 15, 3);\n+ dst[9] = acc;\n+}\n+\n+void\n+foo10 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvi16ger2s (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvi16ger2spp (&acc, vec0, vec1, 15, 15, 3);\n+ dst[10] = acc;\n+}\n+\n+void\n+foo11 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvf16ger2 (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvf16ger2pp (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvf16ger2pn (&acc, vec0, vec1, 15, 15, 3);\n+ dst[11] = acc;\n+}\n+\n+void\n+foo11b (__vector_quad *dst, __vector_quad *src, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_pmxvf16ger2np (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvf16ger2nn (&acc, vec0, vec1, 15, 15, 3);\n+ dst[11] = acc;\n+}\n+\n+void\n+foo12 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvbf16ger2 (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvbf16ger2pp (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvbf16ger2pn (&acc, vec0, vec1, 15, 15, 3);\n+ dst[12] = acc;\n+}\n+\n+void\n+foo12b (__vector_quad *dst, __vector_quad *src, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_pmxvbf16ger2np (&acc, vec0, vec1, 15, 15, 3);\n+ __builtin_mma_pmxvbf16ger2nn (&acc, vec0, vec1, 15, 15, 3);\n+ dst[12] = acc;\n+}\n+\n+void\n+foo13 (__vector_quad *dst, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_pmxvf32ger (&acc, vec0, vec1, 15, 15);\n+ __builtin_mma_pmxvf32gerpp (&acc, vec0, vec1, 15, 15);\n+ __builtin_mma_pmxvf32gerpn (&acc, vec0, vec1, 15, 15);\n+ dst[13] = acc;\n+}\n+\n+void\n+foo13b (__vector_quad *dst, __vector_quad *src, vec_t *vec)\n+{\n+ __vector_quad acc;\n+ vec_t vec0 = vec[0];\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_pmxvf32gernp (&acc, vec0, vec1, 15, 15);\n+ __builtin_mma_pmxvf32gernn (&acc, vec0, vec1, 15, 15);\n+ dst[13] = acc;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mxxmfacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmtacc\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxv\\M} 40 } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 12 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 40 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvbf16ger2\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvbf16ger2nn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvbf16ger2np\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvbf16ger2pn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvbf16ger2pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf16ger2\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf16ger2nn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf16ger2np\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf16ger2pn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf16ger2pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf32ger\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf32gernn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf32gernp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf32gerpn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf32gerpp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi16ger2\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi16ger2pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi16ger2s\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi16ger2spp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi4ger8\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi4ger8pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi8ger4\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi8ger4pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvi8ger4spp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvbf16ger2\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvbf16ger2nn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvbf16ger2np\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvbf16ger2pn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvbf16ger2pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf16ger2\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf16ger2nn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf16ger2np\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf16ger2pn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf16ger2pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf32ger\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf32gernn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf32gernp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf32gerpn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf32gerpp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi16ger2\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi16ger2pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi16ger2s\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi16ger2spp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi4ger8\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi4ger8pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi8ger4\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi8ger4pp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvi8ger4spp\\M} 1 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c\nnew file mode 100644\nindex 00000000000..e6cb49fb667\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c\n@@ -0,0 +1,21 @@\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo (__vector_pair *dst, vec_t *src)\n+{\n+ __vector_pair pair0, pair1;\n+ /* Adjacent loads should be combined into one lxvp instruction\n+ and identical build pairs should be combined. */\n+ __builtin_vsx_build_pair (&pair0, src[0], src[1]);\n+ __builtin_vsx_build_pair (&pair1, src[0], src[1]);\n+ dst[0] = pair0;\n+ dst[2] = pair1;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mlxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mstxv\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 2 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c\nnew file mode 100644\nindex 00000000000..589b3dca842\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c\n@@ -0,0 +1,23 @@\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo (__vector_quad *dst, vec_t *src)\n+{\n+ __vector_quad quad0, quad1;\n+ /* Adjacent loads should be combined into two lxvp instructions.\n+ and identical build accs should not be combined. */\n+ __builtin_mma_build_acc (&quad0, src[0], src[1], src[2], src[3]);\n+ __builtin_mma_build_acc (&quad1, src[0], src[1], src[2], src[3]);\n+ dst[0] = quad0;\n+ dst[2] = quad1;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mlxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mstxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmtacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmfacc\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 4 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 4 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c\nnew file mode 100644\nindex 00000000000..880e7a871aa\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c\n@@ -0,0 +1,72 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-Wno-psabi -mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo0 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp)\n+{\n+ __vector_quad acc;\n+ __vector_pair vecp0 = *pvecp;\n+ vec_t vec1 = vec[1];\n+\n+ __builtin_mma_xvf64ger (&acc, vecp0, vec1);\n+ __builtin_mma_xvf64gerpp (&acc, vecp0, vec1);\n+ __builtin_mma_xvf64gerpn (&acc, vecp0, vec1);\n+ dst[0] = acc;\n+}\n+\n+void\n+foo1 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp)\n+{\n+ __vector_quad acc;\n+ __vector_pair vecp0 = *pvecp;\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_xvf64gernp (&acc, vecp0, vec1);\n+ __builtin_mma_xvf64gernn (&acc, vecp0, vec1);\n+ dst[0] = acc;\n+}\n+\n+void\n+foo2 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp)\n+{\n+ __vector_quad acc;\n+ __vector_pair vecp0 = *pvecp;\n+ vec_t vec1 = vec[1];\n+ __builtin_mma_pmxvf64ger (&acc, vecp0, vec1, 15, 3);\n+ __builtin_mma_pmxvf64gerpp (&acc, vecp0, vec1, 15, 3);\n+ __builtin_mma_pmxvf64gerpn (&acc, vecp0, vec1, 15, 3);\n+ dst[1] = acc;\n+}\n+\n+void\n+foo3 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp)\n+{\n+ __vector_quad acc;\n+ __vector_pair vecp0 = *pvecp;\n+ vec_t vec1 = vec[1];\n+\n+ acc = src[0];\n+ __builtin_mma_pmxvf64gernp (&acc, vecp0, vec1, 15, 3);\n+ __builtin_mma_pmxvf64gernn (&acc, vecp0, vec1, 15, 3);\n+ dst[1] = acc;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mxxmfacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmtacc\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxv\\M} 4 } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 8 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 8 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf64ger\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf64gerpp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf64gerpn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf64gernp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxvf64gernn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf64ger\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf64gerpp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf64gerpn\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf64gernp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpmdmxvf64gernn\\M} 1 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c\nnew file mode 100644\nindex 00000000000..798a9dc69f9\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c\n@@ -0,0 +1,31 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-Wno-psabi -mdejagnu-cpu=future -O2\" } */\n+\n+void\n+foo0 (void)\n+{\n+ __vector_quad acc;\n+ asm (\"#...\" : \"=d\" (acc));\n+ __builtin_mma_xxmtacc (&acc);\n+ __builtin_mma_xxmfacc (&acc);\n+ asm (\"#...\" :: \"d\" (acc));\n+}\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo1 (vec_t *vec)\n+{\n+ vec[1] = __builtin_vsx_xvcvspbf16 (vec[0]);\n+ vec[3] = __builtin_vsx_xvcvbf16spn (vec[2]);\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mxxmtacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmfacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mlxvp\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mstxvp\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxv\\M} 2 } } */\n+/* { dg-final { scan-assembler-times {\\mstxv\\M} 2 } } */\n+/* { dg-final { scan-assembler-times {\\mxvcvspbf16\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mxvcvbf16spn\\M} 1 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c\nnew file mode 100644\nindex 00000000000..cd62fc8579a\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c\n@@ -0,0 +1,73 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-Wno-psabi -mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo (__vector_pair *dst, vec_t *src)\n+{\n+ __vector_pair pair;\n+ __builtin_mma_assemble_pair (&pair, src[0], src[4]);\n+ *dst = pair;\n+}\n+\n+void\n+foo2 (__vector_pair *dst, vec_t *src)\n+{\n+ __vector_pair pair;\n+ __builtin_vsx_assemble_pair (&pair, src[0], src[4]);\n+ *dst = pair;\n+}\n+\n+void\n+foo3 (__vector_pair *dst, vec_t *src)\n+{\n+ __vector_pair pair;\n+ __builtin_vsx_build_pair (&pair, src[4], src[0]);\n+ *dst = pair;\n+}\n+\n+void\n+bar (vec_t *dst, __vector_pair *src)\n+{\n+ vec_t res[2];\n+ __builtin_mma_disassemble_pair (res, src);\n+ dst[0] = res[0];\n+ dst[4] = res[1];\n+}\n+\n+void\n+bar2 (vec_t *dst, __vector_pair *src)\n+{\n+ vec_t res[2];\n+ __builtin_vsx_disassemble_pair (res, src);\n+ dst[0] = res[0];\n+ dst[4] = res[1];\n+}\n+\n+#if !__has_builtin (__builtin_vsx_assemble_pair)\n+# error \"__has_builtin (__builtin_vsx_assemble_pair) failed\"\n+#endif\n+\n+#if !__has_builtin (__builtin_vsx_disassemble_pair)\n+# error \"__has_builtin (__builtin_vsx_disassemble_pair) failed\"\n+#endif\n+\n+#if !__has_builtin (__builtin_mma_assemble_pair)\n+# error \"__has_builtin (__builtin_mma_assemble_pair) failed\"\n+#endif\n+\n+#if !__has_builtin (__builtin_mma_disassemble_pair)\n+# error \"__has_builtin (__builtin_mma_disassemble_pair) failed\"\n+#endif\n+\n+#if !__has_builtin (__builtin_vsx_build_pair)\n+# error \"__has_builtin (__builtin_vsx_build_pair) failed\"\n+#endif\n+\n+/* { dg-final { scan-assembler-times {\\mlxv\\M} 6 } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 2 } } */\n+/* { dg-final { scan-assembler-times {\\mstxv\\M} 4 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 3 } } */\n+\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c\nnew file mode 100644\nindex 00000000000..6890d87bfb9\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c\n@@ -0,0 +1,47 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-Wno-psabi -mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo (__vector_quad *dst, vec_t *src)\n+{\n+ __vector_quad acc;\n+ __builtin_mma_assemble_acc (&acc, src[0], src[4], src[8], src[12]);\n+ *dst = acc;\n+}\n+\n+void\n+foo2 (__vector_quad *dst, vec_t *src)\n+{\n+ __vector_quad acc;\n+ __builtin_mma_build_acc (&acc, src[12], src[8], src[4], src[0]);\n+ *dst = acc;\n+}\n+\n+void\n+bar (vec_t *dst, __vector_quad *src)\n+{\n+ vec_t res[4];\n+ __builtin_mma_disassemble_acc (res, src);\n+ dst[0] = res[0];\n+ dst[4] = res[1];\n+ dst[8] = res[2];\n+ dst[12] = res[3];\n+}\n+\n+#if !__has_builtin (__builtin_mma_assemble_acc)\n+# error \"__has_builtin (__builtin_mma_assemble_acc) failed\"\n+#endif\n+\n+#if !__has_builtin (__builtin_mma_build_acc)\n+# error \"__has_builtin (__builtin_mma_build_acc) failed\"\n+#endif\n+\n+/* { dg-final { scan-assembler-not {\\mxxmfacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmtacc\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxv\\M} 8 } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 2 } } */\n+/* { dg-final { scan-assembler-times {\\mstxv\\M} 4 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 4 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c\nnew file mode 100644\nindex 00000000000..37706f79ce5\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c\n@@ -0,0 +1,21 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-Wno-psabi -mdejagnu-cpu=future -O2\" } */\n+\n+void\n+foo (__vector_quad *dst)\n+{\n+ __vector_quad acc0, acc1;\n+ __builtin_mma_xxsetaccz (&acc0);\n+ __builtin_mma_xxsetaccz (&acc1);\n+ dst[0] = acc0;\n+ dst[1] = acc1;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mlxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mlxvp\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmtacc\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mxxmfacc\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mdmsetdmrz\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mdmxxextfdmr512\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 4 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c\nnew file mode 100644\nindex 00000000000..6e1f62b26c9\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c\n@@ -0,0 +1,26 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+void\n+foo (__vector_pair *dst, __vector_pair *src, long idx)\n+{\n+ dst[0] = __builtin_vsx_lxvp (0, src);\n+ dst[2] = __builtin_vsx_lxvp (32, src);\n+ dst[4] = __builtin_vsx_lxvp (64, src);\n+ /* Non-constant offset should generate a lxvpx. */\n+ dst[6] = __builtin_vsx_lxvp (idx, src);\n+ /* Non-aligned offset should generate a plxvp. */\n+ dst[8] = __builtin_vsx_lxvp (257, src);\n+}\n+\n+#if !__has_builtin (__builtin_vsx_lxvp)\n+# error \"__has_builtin (__builtin_vsx_lxvp) failed\"\n+#endif\n+\n+/* { dg-final { scan-assembler-not {\\mlxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mstxv\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 3 } } */\n+/* { dg-final { scan-assembler-times {\\mlxvpx\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mplxvp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 5 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c\nnew file mode 100644\nindex 00000000000..45d4e9b5290\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c\n@@ -0,0 +1,27 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+void\n+foo (__vector_pair *dst, __vector_pair *src, long idx)\n+{\n+ __vector_pair pair = *src;\n+ __builtin_vsx_stxvp (pair, 0, dst);\n+ __builtin_vsx_stxvp (pair, 32, dst);\n+ __builtin_vsx_stxvp (pair, 64, dst);\n+ /* Non-constant offset should generate a stxvpx. */\n+ __builtin_vsx_stxvp (pair, idx, dst);\n+ /* Non-aligned offset should generate a pstxvp. */\n+ __builtin_vsx_stxvp (pair, 257, dst);\n+}\n+\n+#if !__has_builtin (__builtin_vsx_stxvp)\n+# error \"__has_builtin (__builtin_vsx_stxvp) failed\"\n+#endif\n+\n+/* { dg-final { scan-assembler-not {\\mlxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mstxv\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 3 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvpx\\M} 1 } } */\n+/* { dg-final { scan-assembler-times {\\mpstxvp\\M} 1 } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c\nnew file mode 100644\nindex 00000000000..c62040c0fcb\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c\n@@ -0,0 +1,28 @@\n+/* { dg-do compile } */\n+/* { dg-require-effective-target powerpc_future_ok } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+typedef unsigned char vec_t __attribute__((vector_size(16)));\n+\n+void\n+foo (__vector_pair *dst, vec_t *src)\n+{\n+ __vector_pair pair;\n+ /* Adjacent loads should be combined into one lxvp instruction. */\n+ __builtin_vsx_build_pair (&pair, src[0], src[1]);\n+ *dst = pair;\n+}\n+\n+void\n+bar (__vector_quad *dst, vec_t *src)\n+{\n+ __vector_quad quad;\n+ /* Adjacent loads should be combined into two lxvp instructions. */\n+ __builtin_mma_build_acc (&quad, src[0], src[1], src[2], src[3]);\n+ *dst = quad;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\mlxv\\M} } } */\n+/* { dg-final { scan-assembler-not {\\mstxv\\M} } } */\n+/* { dg-final { scan-assembler-times {\\mlxvp\\M} 3 } } */\n+/* { dg-final { scan-assembler-times {\\mstxvp\\M} 3 } } */\n", "prefixes": [] }