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GET /api/1.1/patches/2230817/?format=api
{ "id": 2230817, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230817/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260430045528.420437-9-npiggin@gmail.com/", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/1.1/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "" }, "msgid": "<20260430045528.420437-9-npiggin@gmail.com>", "date": "2026-04-30T04:55:25", "name": "[7/7] lib: sbi: Move hart PMP functions to sbi_hart_pmp.c", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "bd5e7552653cdc022aeb1afeedf1fb3b3ad3cb31", "submitter": { "id": 69518, "url": "http://patchwork.ozlabs.org/api/1.1/people/69518/?format=api", "name": "Nicholas Piggin", "email": "npiggin@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260430045528.420437-9-npiggin@gmail.com/mbox/", "series": [ { "id": 502193, "url": "http://patchwork.ozlabs.org/api/1.1/series/502193/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=502193", "date": "2026-04-30T04:55:18", "name": "Make PMP encoding usable for non-hart PMPs", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502193/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230817/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230817/checks/", "tags": {}, "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=renor2CM;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256\n header.s=desiato.20200630 header.b=bkUzbbvv;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=lNihaMrk;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: The sbi_hart_pmp.c looks like a good place for the hart PMP\n CSR access functions. Signed-off-by: Nicholas Piggin ---\n include/sbi/riscv_asm.h\n | 14 ----- include/sbi/sbi_hart_pmp.h | 12 ++++ lib/sbi/riscv_asm.c | 109\n lib/sbi/sbi_hart_pmp.c | 110 [...]\n Content analysis details: (-0.2 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:62f listed in]\n [list.dnswl.org]\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n provider\n [npiggin(at)gmail.com]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "The sbi_hart_pmp.c looks like a good place for the hart PMP CSR\naccess functions.\n\nSigned-off-by: Nicholas Piggin <npiggin@gmail.com>\n---\n include/sbi/riscv_asm.h | 14 -----\n include/sbi/sbi_hart_pmp.h | 12 ++++\n lib/sbi/riscv_asm.c | 109 ------------------------------------\n lib/sbi/sbi_hart_pmp.c | 110 +++++++++++++++++++++++++++++++++++++\n 4 files changed, 122 insertions(+), 123 deletions(-)", "diff": "diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h\nindex f845320b..7765edb7 100644\n--- a/include/sbi/riscv_asm.h\n+++ b/include/sbi/riscv_asm.h\n@@ -81,8 +81,6 @@\n \n #ifndef __ASSEMBLER__\n \n-#include <sbi/sbi_types.h>\n-\n #define csr_swap(csr, val) \\\n \t({ \\\n \t\tregister unsigned long __v = (unsigned long)(val); \\\n@@ -211,18 +209,6 @@ int misa_xlen(void);\n /* Get RISC-V ISA string representation */\n void misa_string(int xlen, char *out, unsigned int out_sz);\n \n-/* Disable pmp entry at a given index */\n-int hart_pmp_disable(unsigned int n);\n-\n-/* Check if the matching field is set */\n-bool hart_is_pmp_enabled(unsigned int n);\n-\n-int hart_pmp_set(unsigned int n, unsigned long prot, unsigned long addr,\n-\t unsigned long log2len);\n-\n-int hart_pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,\n-\t unsigned long *log2len);\n-\n #endif /* !__ASSEMBLER__ */\n \n #endif\ndiff --git a/include/sbi/sbi_hart_pmp.h b/include/sbi/sbi_hart_pmp.h\nindex a7765d17..3e0219ac 100644\n--- a/include/sbi/sbi_hart_pmp.h\n+++ b/include/sbi/sbi_hart_pmp.h\n@@ -9,6 +9,18 @@\n \n #include <sbi/sbi_types.h>\n \n+/* Disable pmp entry at a given index */\n+int hart_pmp_disable(unsigned int n);\n+\n+/* Check if the matching field is set */\n+bool hart_is_pmp_enabled(unsigned int n);\n+\n+int hart_pmp_set(unsigned int n, unsigned long prot,\n+\t\t unsigned long addr, unsigned long log2len);\n+\n+int hart_pmp_get(unsigned int n, unsigned long *prot_out,\n+\t\t unsigned long *addr_out, unsigned long *log2len);\n+\n struct sbi_scratch;\n \n unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);\ndiff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c\nindex 98a93462..a1e0f2f8 100644\n--- a/lib/sbi/riscv_asm.c\n+++ b/lib/sbi/riscv_asm.c\n@@ -272,112 +272,3 @@ void csr_write_num(int csr_num, unsigned long val)\n #undef switchcase_csr_write_2\n #undef switchcase_csr_write\n }\n-\n-static int hart_pmp_read(pmp_t *pmp, unsigned int n)\n-{\n-\tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n-\tunsigned long cfgmask;\n-\n-\t/* check parameters */\n-\tif (n >= PMP_COUNT)\n-\t\treturn SBI_EINVAL;\n-\n-\t/* calculate PMP register and offset */\n-#if __riscv_xlen == 32\n-\tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n-\tpmpcfg_shift = (n & 3) << 3;\n-#elif __riscv_xlen == 64\n-\tpmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;\n-\tpmpcfg_shift = (n & 7) << 3;\n-#else\n-# error \"Unexpected __riscv_xlen\"\n-#endif\n-\tpmpaddr_csr = CSR_PMPADDR0 + n;\n-\n-\tcfgmask = (0xffUL << pmpcfg_shift);\n-\tpmp->cfg = (csr_read_num(pmpcfg_csr) & cfgmask) >> pmpcfg_shift;\n-\tpmp->addr = csr_read_num(pmpaddr_csr);\n-\n-\treturn SBI_OK;\n-}\n-\n-static int hart_pmp_write(pmp_t *pmp, unsigned int n)\n-{\n-\tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n-\tunsigned long cfgmask, pmpcfg;\n-\n-\t/* check parameters */\n-\tif (n >= PMP_COUNT)\n-\t\treturn SBI_EINVAL;\n-\n-\t/* calculate PMP register and offset */\n-#if __riscv_xlen == 32\n-\tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n-\tpmpcfg_shift = (n & 3) << 3;\n-#elif __riscv_xlen == 64\n-\tpmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;\n-\tpmpcfg_shift = (n & 7) << 3;\n-#else\n-# error \"Unexpected __riscv_xlen\"\n-#endif\n-\tpmpaddr_csr = CSR_PMPADDR0 + n;\n-\n-\t/* write csrs */\n-\tcsr_write_num(pmpaddr_csr, pmp->addr);\n-\tcfgmask = ~(0xffUL << pmpcfg_shift);\n-\tpmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask);\n-\tpmpcfg |= (((unsigned long)pmp->cfg << pmpcfg_shift) & ~cfgmask);\n-\tcsr_write_num(pmpcfg_csr, pmpcfg);\n-\n-\treturn SBI_OK;\n-}\n-\n-int hart_pmp_disable(unsigned int n)\n-{\n-\tpmp_t pmp;\n-\tint rc;\n-\n-\trc = hart_pmp_read(&pmp, n);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\tpmp.cfg = 0;\n-\n-\treturn hart_pmp_write(&pmp, n);\n-}\n-\n-bool hart_is_pmp_enabled(unsigned int n)\n-{\n-\tpmp_t pmp;\n-\n-\tif (hart_pmp_read(&pmp, n) != SBI_OK)\n-\t\treturn false;\n-\n-\treturn pmp_is_enabled(&pmp);\n-}\n-\n-int hart_pmp_set(unsigned int n, unsigned long prot, unsigned long addr,\n-\t unsigned long log2len)\n-{\n-\tpmp_t pmp;\n-\tint rc;\n-\n-\trc = pmp_encode(&pmp, prot, addr, log2len);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treturn hart_pmp_write(&pmp, n);\n-}\n-\n-int hart_pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,\n-\t unsigned long *log2len)\n-{\n-\tpmp_t pmp;\n-\tint rc;\n-\n-\trc = hart_pmp_read(&pmp, n);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treturn pmp_decode(&pmp, prot_out, addr_out, log2len);\n-}\ndiff --git a/lib/sbi/sbi_hart_pmp.c b/lib/sbi/sbi_hart_pmp.c\nindex 8b7b091c..54cfd0cb 100644\n--- a/lib/sbi/sbi_hart_pmp.c\n+++ b/lib/sbi/sbi_hart_pmp.c\n@@ -12,9 +12,119 @@\n #include <sbi/sbi_hfence.h>\n #include <sbi/sbi_math.h>\n #include <sbi/sbi_platform.h>\n+#include <sbi/sbi_pmp.h>\n #include <sbi/sbi_tlb.h>\n #include <sbi/riscv_asm.h>\n \n+static int hart_pmp_read(pmp_t *pmp, unsigned int n)\n+{\n+\tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n+\tunsigned long cfgmask;\n+\n+\t/* check parameters */\n+\tif (n >= PMP_COUNT)\n+\t\treturn SBI_EINVAL;\n+\n+\t/* calculate PMP register and offset */\n+#if __riscv_xlen == 32\n+\tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n+\tpmpcfg_shift = (n & 3) << 3;\n+#elif __riscv_xlen == 64\n+\tpmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;\n+\tpmpcfg_shift = (n & 7) << 3;\n+#else\n+# error \"Unexpected __riscv_xlen\"\n+#endif\n+\tpmpaddr_csr = CSR_PMPADDR0 + n;\n+\n+\tcfgmask = (0xffUL << pmpcfg_shift);\n+\tpmp->cfg = (csr_read_num(pmpcfg_csr) & cfgmask) >> pmpcfg_shift;\n+\tpmp->addr = csr_read_num(pmpaddr_csr);\n+\n+\treturn SBI_OK;\n+}\n+\n+static int hart_pmp_write(pmp_t *pmp, unsigned int n)\n+{\n+\tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n+\tunsigned long cfgmask, pmpcfg;\n+\n+\t/* check parameters */\n+\tif (n >= PMP_COUNT)\n+\t\treturn SBI_EINVAL;\n+\n+\t/* calculate PMP register and offset */\n+#if __riscv_xlen == 32\n+\tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n+\tpmpcfg_shift = (n & 3) << 3;\n+#elif __riscv_xlen == 64\n+\tpmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;\n+\tpmpcfg_shift = (n & 7) << 3;\n+#else\n+# error \"Unexpected __riscv_xlen\"\n+#endif\n+\tpmpaddr_csr = CSR_PMPADDR0 + n;\n+\n+\t/* write csrs */\n+\tcsr_write_num(pmpaddr_csr, pmp->addr);\n+\tcfgmask = ~(0xffUL << pmpcfg_shift);\n+\tpmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask);\n+\tpmpcfg |= (((unsigned long)pmp->cfg << pmpcfg_shift) & ~cfgmask);\n+\tcsr_write_num(pmpcfg_csr, pmpcfg);\n+\n+\treturn SBI_OK;\n+}\n+\n+int hart_pmp_disable(unsigned int n)\n+{\n+\tpmp_t pmp;\n+\tint rc;\n+\n+\trc = hart_pmp_read(&pmp, n);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tpmp.cfg = 0;\n+\n+\treturn hart_pmp_write(&pmp, n);\n+}\n+\n+bool hart_is_pmp_enabled(unsigned int n)\n+{\n+\tpmp_t pmp;\n+\n+\tif (hart_pmp_read(&pmp, n) != SBI_OK)\n+\t\treturn false;\n+\n+\treturn pmp_is_enabled(&pmp);\n+}\n+\n+int hart_pmp_set(unsigned int n, unsigned long prot, unsigned long addr,\n+\t unsigned long log2len)\n+{\n+\tpmp_t pmp;\n+\tint rc;\n+\n+\trc = pmp_encode(&pmp, prot, addr, log2len);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn hart_pmp_write(&pmp, n);\n+}\n+\n+int hart_pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,\n+\t unsigned long *log2len)\n+{\n+\tpmp_t pmp;\n+\tint rc;\n+\n+\trc = hart_pmp_read(&pmp, n);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn pmp_decode(&pmp, prot_out, addr_out, log2len);\n+}\n+\n /*\n * Smepmp enforces access boundaries between M-mode and\n * S/U-mode. When it is enabled, the PMPs are programmed\n", "prefixes": [ "7/7" ] }