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GET /api/1.1/patches/2230705/?format=api
{ "id": 2230705, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230705/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/patch/20260429-winbond-v6-18-rc1-cont-read-v3-6-0f38b3c229ad@bootlin.com/", "project": { "id": 56, "url": "http://patchwork.ozlabs.org/api/1.1/projects/56/?format=api", "name": "OpenBMC development", "link_name": "openbmc", "list_id": "openbmc.lists.ozlabs.org", "list_email": "openbmc@lists.ozlabs.org", "web_url": "http://github.com/openbmc/", "scm_url": "", "webscm_url": "" }, "msgid": "<20260429-winbond-v6-18-rc1-cont-read-v3-6-0f38b3c229ad@bootlin.com>", "date": "2026-04-29T17:56:43", "name": "[v3,06/11] mtd: spinand: Use secondary ops for continuous reads", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "adeb3a25293b60fa0d0c29566797c572c3a2382a", "submitter": { "id": 73368, "url": "http://patchwork.ozlabs.org/api/1.1/people/73368/?format=api", "name": "Miquel Raynal", "email": "miquel.raynal@bootlin.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openbmc/patch/20260429-winbond-v6-18-rc1-cont-read-v3-6-0f38b3c229ad@bootlin.com/mbox/", "series": [ { "id": 502171, "url": "http://patchwork.ozlabs.org/api/1.1/series/502171/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/list/?series=502171", "date": "2026-04-29T17:56:37", "name": "mtd: spinand: Winbond continuous read support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/502171/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230705/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230705/checks/", "tags": {}, "headers": { "Return-Path": "\n <openbmc+bounces-1871-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=ufpsxmOn;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1777485478; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=5kdA1IC/RYXviplmXjfBx2K4qGRHF5L/z4JMU8G7heo=;\n\tb=ufpsxmOnbM4aWlTqONbvM/hU0uS6dcXEqlxSHSr1HWYBIfGT90YPkgaK0cuFSbVDO2ePk8\n\tpWi3bwyR8ypZOab+t1cJA74MjXfz7fLvozJ6V7qmbhj3f34ty/OOJYwRbTAzFsAix386Ly\n\tD1FsPPSsy7tCoNaMLBxBDPlrFb/XK+/uCgMaGjsQ2R+B/RuAlAGmsUx5DuKH7qOrDHX7rD\n\txayotK3EyInONV8I9cHKvaHPdCz3+n8OX+quL0wUzfkGZxlSYM7f+O8L+6M140LefKPS6/\n\t+pSdGDvUfdVqb0jYh6gv0v4c1CPJTYtO1hzRdfUdURt2Ao08UPOejiDAM7KKqQ==", "From": "Miquel Raynal <miquel.raynal@bootlin.com>", "Date": "Wed, 29 Apr 2026 19:56:43 +0200", "Subject": "[PATCH v3 06/11] mtd: spinand: Use secondary ops for continuous\n reads", "X-Mailing-List": "openbmc@lists.ozlabs.org", "List-Id": "<openbmc.lists.ozlabs.org>", "List-Help": "<mailto:openbmc+help@lists.ozlabs.org>", "List-Owner": "<mailto:openbmc+owner@lists.ozlabs.org>", "List-Post": "<mailto:openbmc@lists.ozlabs.org>", "List-Subscribe": "<mailto:openbmc+subscribe@lists.ozlabs.org>,\n <mailto:openbmc+subscribe-digest@lists.ozlabs.org>,\n <mailto:openbmc+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:openbmc+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "\n <20260429-winbond-v6-18-rc1-cont-read-v3-6-0f38b3c229ad@bootlin.com>", "References": "\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>", "In-Reply-To": "\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>", "To": "Mark Brown <broonie@kernel.org>, Richard Weinberger <richard@nod.at>,\n Vignesh Raghavendra <vigneshr@ti.com>, Michael Walle <mwalle@kernel.org>,\n Miquel Raynal <miquel.raynal@bootlin.com>,\n Takahiro Kuwano <takahiro.kuwano@infineon.com>,\n Lorenzo Bianconi <lorenzo@kernel.org>, Ray Liu <ray.liu@airoha.com>,\n Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>, =?utf-8?q?C=C3=A9dric_Le_Goa?=\n\t=?utf-8?q?ter?= <clg@kaod.org>, Joel Stanley <joel@jms.id.au>,\n Andrew Jeffery <andrew@codeconstruct.com.au>,\n Avi Fishman <avifishman70@gmail.com>, Tomer Maimon <tmaimon77@gmail.com>,\n Tali Perry <tali.perry1@gmail.com>, Patrick Venture <venture@google.com>,\n Nancy Yuen <yuenn@google.com>, Benjamin Fair <benjaminfair@google.com>,\n Maxime Coquelin <mcoquelin.stm32@gmail.com>,\n Alexandre Torgue <alexandre.torgue@foss.st.com>, =?utf-8?q?Jonathan_Neusch?=\n\t=?utf-8?q?=C3=A4fer?= <j.neuschaefer@gmx.net>", "Cc": "Pratyush Yadav <pratyush@kernel.org>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Steam Lin <STLin2@winbond.com>, Santhosh Kumar K <s-k6@ti.com>,\n linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org,\n linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,\n linux-stm32@st-md-mailman.stormreply.com", "X-Mailer": "b4 0.14.3", "X-Last-TLS-Session-Version": "TLSv1.3", "X-Spam-Status": "No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=disabled\n\tversion=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "In case a chip supports continuous reads, but uses a slightly different\ncache operation for these, it may provide a secondary operation template\nwhich will be used only during continuous cache read operations.\n\nFrom a vendor driver point of view, enabling this feature implies\nproviding a new set of templates for these continuous read\noperations. The core will automatically pick the fastest variant,\ndepending on the hardware capabilities.\n\nSigned-off-by: Miquel Raynal <miquel.raynal@bootlin.com>\n---\n drivers/mtd/nand/spi/core.c | 61 ++++++++++++++++++++++++++++++++++++++++++++-\n include/linux/mtd/spinand.h | 12 +++++++++\n 2 files changed, 72 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c\nindex a66510747b31..45c3afb9cceb 100644\n--- a/drivers/mtd/nand/spi/core.c\n+++ b/drivers/mtd/nand/spi/core.c\n@@ -489,6 +489,11 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,\n \n \trdesc = spinand->dirmaps[req->pos.plane].rdesc;\n \n+\tif (spinand->op_templates->cont_read_cache && req->continuous)\n+\t\trdesc->info.op_tmpl = &rdesc->info.secondary_op_tmpl;\n+\telse\n+\t\trdesc->info.op_tmpl = &rdesc->info.primary_op_tmpl;\n+\n \tif (nand->ecc.engine->integration == NAND_ECC_ENGINE_INTEGRATION_PIPELINED &&\n \t req->mode != MTD_OPS_RAW)\n \t\trdesc->info.op_tmpl->data.ecc = true;\n@@ -1221,6 +1226,7 @@ static struct spi_mem_dirmap_desc *spinand_create_rdesc(\n \t\t * its spi controller, use regular reading\n \t\t */\n \t\tspinand->cont_read_possible = false;\n+\t\tmemset(&info->secondary_op_tmpl, 0, sizeof(info->secondary_op_tmpl));\n \n \t\tinfo->length = nanddev_page_size(nand) +\n \t\t\t nanddev_per_page_oobsize(nand);\n@@ -1237,11 +1243,24 @@ static int spinand_create_dirmap(struct spinand_device *spinand,\n \tstruct nand_device *nand = spinand_to_nand(spinand);\n \tstruct spi_mem_dirmap_info info = { 0 };\n \tstruct spi_mem_dirmap_desc *desc;\n-\tbool enable_ecc = false;\n+\tbool enable_ecc = false, secondary_op = false;\n \n \tif (nand->ecc.engine->integration == NAND_ECC_ENGINE_INTEGRATION_PIPELINED)\n \t\tenable_ecc = true;\n \n+\tif (spinand->cont_read_possible && spinand->op_templates->cont_read_cache)\n+\t\tsecondary_op = true;\n+\n+\t/*\n+\t * Continuous read implies that only the main data is retrieved, backed\n+\t * by an on-die ECC engine. It is not possible to use a pipelind ECC\n+\t * engine with continuous read.\n+\t */\n+\tif (enable_ecc && secondary_op) {\n+\t\tsecondary_op = false;\n+\t\tspinand->cont_read_possible = false;\n+\t}\n+\n \t/* The plane number is passed in MSB just above the column address */\n \tinfo.offset = plane << fls(nand->memorg.pagesize);\n \n@@ -1259,6 +1278,10 @@ static int spinand_create_dirmap(struct spinand_device *spinand,\n \t/* Read descriptor */\n \tinfo.primary_op_tmpl = *spinand->op_templates->read_cache;\n \tinfo.primary_op_tmpl.data.ecc = enable_ecc;\n+\tif (secondary_op) {\n+\t\tinfo.secondary_op_tmpl = *spinand->op_templates->cont_read_cache;\n+\t\tinfo.secondary_op_tmpl.data.ecc = enable_ecc;\n+\t}\n \tdesc = spinand_create_rdesc(spinand, &info);\n \tif (IS_ERR(desc))\n \t\treturn PTR_ERR(desc);\n@@ -1607,6 +1630,33 @@ int spinand_match_and_init(struct spinand_device *spinand,\n \t\tif (ret)\n \t\t\treturn ret;\n \n+\t\tif (info->op_variants.cont_read_cache) {\n+\t\t\top = spinand_select_op_variant(spinand, SSDR,\n+\t\t\t\t\t\t info->op_variants.cont_read_cache);\n+\t\t\tif (op) {\n+\t\t\t\tconst struct spi_mem_op *read_op;\n+\n+\t\t\t\tread_op = spinand->ssdr_op_templates.read_cache;\n+\n+\t\t\t\t/*\n+\t\t\t\t * Sometimes the fastest continuous read variant may not\n+\t\t\t\t * be supported. In this case, prefer to use the fastest\n+\t\t\t\t * read from cache variant and disable continuous reads.\n+\t\t\t\t */\n+\t\t\t\tif (read_op->cmd.buswidth > op->cmd.buswidth ||\n+\t\t\t\t (read_op->cmd.dtr && !op->cmd.dtr) ||\n+\t\t\t\t read_op->addr.buswidth > op->addr.buswidth ||\n+\t\t\t\t (read_op->addr.dtr && !op->addr.dtr) ||\n+\t\t\t\t read_op->data.buswidth > op->data.buswidth ||\n+\t\t\t\t (read_op->data.dtr && !op->data.dtr))\n+\t\t\t\t\tspinand->cont_read_possible = false;\n+\t\t\t\telse\n+\t\t\t\t\tspinand->ssdr_op_templates.cont_read_cache = op;\n+\t\t\t} else {\n+\t\t\t\tspinand->cont_read_possible = false;\n+\t\t\t}\n+\t\t}\n+\n \t\t/* I/O variants selection with octo-spi DDR commands (optional) */\n \n \t\tret = spinand_init_odtr_instruction_set(spinand);\n@@ -1629,6 +1679,15 @@ int spinand_match_and_init(struct spinand_device *spinand,\n \t\t\t\t\t info->op_variants.update_cache);\n \t\tspinand->odtr_op_templates.update_cache = op;\n \n+\t\tif (info->op_variants.cont_read_cache) {\n+\t\t\top = spinand_select_op_variant(spinand, ODTR,\n+\t\t\t\t\t\t info->op_variants.cont_read_cache);\n+\t\t\tif (op)\n+\t\t\t\tspinand->odtr_op_templates.cont_read_cache = op;\n+\t\t\telse\n+\t\t\t\tspinand->cont_read_possible = false;\n+\t\t}\n+\n \t\treturn 0;\n \t}\n \ndiff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h\nindex 896e9b5de0c4..4ff3f3383d46 100644\n--- a/include/linux/mtd/spinand.h\n+++ b/include/linux/mtd/spinand.h\n@@ -576,6 +576,7 @@ enum spinand_bus_interface {\n * @op_variants.read_cache: variants of the read-cache operation\n * @op_variants.write_cache: variants of the write-cache operation\n * @op_variants.update_cache: variants of the update-cache operation\n+ * @op_variants.cont_read_cache: variants of the continuous read-cache operation\n * @vendor_ops: vendor specific operations\n * @select_target: function used to select a target/die. Required only for\n *\t\t multi-die chips\n@@ -600,6 +601,7 @@ struct spinand_info {\n \t\tconst struct spinand_op_variants *read_cache;\n \t\tconst struct spinand_op_variants *write_cache;\n \t\tconst struct spinand_op_variants *update_cache;\n+\t\tconst struct spinand_op_variants *cont_read_cache;\n \t} op_variants;\n \tconst struct spinand_op_variants *vendor_ops;\n \tint (*select_target)(struct spinand_device *spinand,\n@@ -629,6 +631,14 @@ struct spinand_info {\n \t\t.update_cache = __update,\t\t\t\t\\\n \t}\n \n+#define SPINAND_INFO_OP_VARIANTS_WITH_CONT(__read, __write, __update, __cont_read) \\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\t.read_cache = __read,\t\t\t\t\t\\\n+\t\t.write_cache = __write,\t\t\t\t\t\\\n+\t\t.update_cache = __update,\t\t\t\t\\\n+\t\t.cont_read_cache = __cont_read,\t\t\t\t\\\n+\t}\n+\n #define SPINAND_INFO_VENDOR_OPS(__ops)\t\t\t\t\t\\\n \t.vendor_ops = __ops\n \n@@ -700,6 +710,7 @@ struct spinand_dirmap {\n * @read_cache: read cache op template\n * @write_cache: write cache op template\n * @update_cache: update cache op template\n+ * @cont_read_cache: continuous read cache op template (optional)\n */\n struct spinand_mem_ops {\n \tstruct spi_mem_op reset;\n@@ -714,6 +725,7 @@ struct spinand_mem_ops {\n \tconst struct spi_mem_op *read_cache;\n \tconst struct spi_mem_op *write_cache;\n \tconst struct spi_mem_op *update_cache;\n+\tconst struct spi_mem_op *cont_read_cache;\n };\n \n /**\n", "prefixes": [ "v3", "06/11" ] }