Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2230671/?format=api
{ "id": 2230671, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-18-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260430000524.56046-18-richard.henderson@linaro.org>", "date": "2026-04-30T00:05:00", "name": "[v2,17/40] fpu: Return struct from parts{64,128}_div", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e0f188eaef1a41514e4c95e2dbc2d3ec00da8240", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/1.1/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-18-richard.henderson@linaro.org/mbox/", "series": [ { "id": 502170, "url": "http://patchwork.ozlabs.org/api/1.1/series/502170/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502170", "date": "2026-04-30T00:04:48", "name": "fpu: Export some internals for targets", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/502170/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230671/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230671/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=fv0Pty4/;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZH44cG2z1yJr\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 10:07:12 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wIEuz-0007Cj-Si; Wed, 29 Apr 2026 20:06:13 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wIEux-000778-1n\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:06:11 -0400", "from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wIEuv-0001oD-2k\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:06:10 -0400", "by mail-pf1-x435.google.com with SMTP id\n d2e1a72fcca58-82f0884bcfaso251085b3a.1\n for <qemu-devel@nongnu.org>; Wed, 29 Apr 2026 17:06:08 -0700 (PDT)", "from stoup.. ([180.233.125.15]) by smtp.gmail.com with ESMTPSA id\n d2e1a72fcca58-834ed7ef7a8sm2928667b3a.47.2026.04.29.17.06.05\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 29 Apr 2026 17:06:07 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1777507568; x=1778112368; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=eIOFTPro+SOLOQqbXG6r2uPJi9VHiMAgvHUNkPJdlow=;\n b=fv0Pty4//lMNIQZV2zhk9x938E37LCxPtmWgXD7O9apNSDPDTz7TrLzWAe1pUvd95x\n ZubnLnv/xrOODp1vpPptVr1wFnF30q5UplZ3bp1drkE32mfKu7EhkNxsjj5TuTAgSKC3\n 84+4mVDH/OBhL01bycsEQLE4wG4rsPaZ9GCyo5fNBU8+Me9Vbz+XY/WbhN7EwFXygOjr\n WgtBnUAEUPQCxNuzlA3h3u4g4gFaKs7SxnuWJMa5vxOSHU3u+l0c+hzYqbeVUwBvfaPU\n FCt9PHpYngOoHwAOHbLFO5RGjPQkUdgrIhGd7E/yzMXmE+QuUh/+Ek/X6vAtZ3dXbJsB\n v0VA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777507568; x=1778112368;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=eIOFTPro+SOLOQqbXG6r2uPJi9VHiMAgvHUNkPJdlow=;\n b=Uf/lNlsWxwGzk3qtMVrj5hzKw/rLIk38FG2FALDnr0FlDZwDj+4FCqTpA+4Z8zBma0\n +d0LNvlK3GgozaD4G0mg4Rc4/TqEIG9i4nQShhS/Oe8lyz/Q0ARGAX+n4CMa7tQT/LsB\n 5zIPa5/kQnfdVfwlgp8WeqerVPWML1EHN7JJa3DGv8LJ80hvLrPkEGByGJCcjSa5srKl\n Q42AnzVWpEGXmR+ghduHFNG9J3Qm4eLq2dmrwi74pj3Z+p2yINAkedobFNtEK/ZADNw5\n XrD8jIIKt6bqC4Mtf2yyCjzlfzZ0ABmdBAnaMtYB8JOtirQ8uSaJEGNblXNrdVBefsTZ\n YmjQ==", "X-Gm-Message-State": "AOJu0YzqTK/YyzpD9/4PWgVesZ3FyXkHGitVitAqdEqeVGX9RL+1UHU0\n dD2+T0/gk0e+KHRDi3YDllMxUXNvkkENjojSmVe8ecKXgQLWpc+XfKGSTcwoyWh42zOa4/2KgYe\n 9oxrcv0w=", "X-Gm-Gg": "AeBDieu9uFf1i7sjWE68NOjMx03FdRm97B2pAQVtqFmx/gJrfA5JcRgnXoTdzFLFqqK\n QZdRJR8f9BjCEQgNgHHuKvEO483MxPhhx9vCVPoR7ic/iJ50ahUtz9rgS8IyyMEbtppZYFII2XE\n QkTJWRF0iSnZrHTyxuNUE8oiWgJ38JqOZoMh01ZMnaBswdafGqxENAe9etO9FJUVuH7wzcuJ1HO\n y03z3fsF6ub0ej2gdWpeiFDPwCo5o80vketB6UMR43tkbY1b2fG9g7YBVWBzlGbqrqf6GwJffXt\n QE6uouxnujU0vPOXzkezRrwUN/7ohUHKvrAH3GYGa8gRV661KkUMhXMIdu2MmM3VH0X4aHImmse\n 3EfiJJ8X8S1uBvu1D+6Aka/c4idsq+eSerzDarj+N8J568n7P3WQfGk5GQwhQwQ26cTZoKMD/ua\n NQqPJbt8Qct7e53Ww9zEnjJt7awNRtDB1lNYZoV6DO", "X-Received": "by 2002:a05:6a00:174c:b0:82a:6461:6d15 with SMTP id\n d2e1a72fcca58-834fdc94278mr822985b3a.46.1777507567428;\n Wed, 29 Apr 2026 17:06:07 -0700 (PDT)", "From": "Richard Henderson <richard.henderson@linaro.org>", "To": "qemu-devel@nongnu.org", "Cc": "philmd@linaro.org", "Subject": "[PATCH v2 17/40] fpu: Return struct from parts{64,128}_div", "Date": "Thu, 30 Apr 2026 10:05:00 +1000", "Message-ID": "<20260430000524.56046-18-richard.henderson@linaro.org>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260430000524.56046-1-richard.henderson@linaro.org>", "References": "<20260430000524.56046-1-richard.henderson@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::435;\n envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "At the same time, export.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n include/fpu/softfloat-parts.h | 9 +++++++\n fpu/softfloat.c | 34 +++++++++++++-------------\n fpu/softfloat-parts.c.inc | 45 ++++++++++++++++-------------------\n 3 files changed, 46 insertions(+), 42 deletions(-)", "diff": "diff --git a/include/fpu/softfloat-parts.h b/include/fpu/softfloat-parts.h\nindex f631c38c79..44e0cb7d05 100644\n--- a/include/fpu/softfloat-parts.h\n+++ b/include/fpu/softfloat-parts.h\n@@ -163,4 +163,13 @@ float64 float64_round_pack_canonical(FloatParts64 *p, float_status *s);\n float128 float128_round_pack_canonical(FloatParts128 *p, float_status *s);\n floatx80 floatx80_round_pack_canonical(FloatParts128 *p, float_status *s);\n \n+/*\n+ * Operations\n+ */\n+\n+FloatParts64 parts64_div(const FloatParts64 *a, const FloatParts64 *b,\n+ float_status *s);\n+FloatParts128 parts128_div(const FloatParts128 *a, const FloatParts128 *b,\n+ float_status *s);\n+\n #endif\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 246209072e..6d69b61c7f 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2129,9 +2129,9 @@ float16 float16_div(float16 a, float16 b, float_status *status)\n {\n FloatParts64 pa = float16_unpack_canonical(a, status);\n FloatParts64 pb = float16_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_div(&pa, &pb, status);\n+ FloatParts64 pr = parts64_div(&pa, &pb, status);\n \n- return float16_round_pack_canonical(pr, status);\n+ return float16_round_pack_canonical(&pr, status);\n }\n \n static float32 QEMU_SOFTFLOAT_ATTR\n@@ -2139,9 +2139,9 @@ soft_f32_div(float32 a, float32 b, float_status *status)\n {\n FloatParts64 pa = float32_unpack_canonical(a, status);\n FloatParts64 pb = float32_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_div(&pa, &pb, status);\n+ FloatParts64 pr = parts64_div(&pa, &pb, status);\n \n- return float32_round_pack_canonical(pr, status);\n+ return float32_round_pack_canonical(&pr, status);\n }\n \n static float64 QEMU_SOFTFLOAT_ATTR\n@@ -2149,9 +2149,9 @@ soft_f64_div(float64 a, float64 b, float_status *status)\n {\n FloatParts64 pa = float64_unpack_canonical(a, status);\n FloatParts64 pb = float64_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_div(&pa, &pb, status);\n+ FloatParts64 pr = parts64_div(&pa, &pb, status);\n \n- return float64_round_pack_canonical(pr, status);\n+ return float64_round_pack_canonical(&pr, status);\n }\n \n static float hard_f32_div(float a, float b)\n@@ -2216,9 +2216,9 @@ float64 float64r32_div(float64 a, float64 b, float_status *status)\n {\n FloatParts64 pa = float64_unpack_canonical(a, status);\n FloatParts64 pb = float64_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_div(&pa, &pb, status);\n+ FloatParts64 pr = parts64_div(&pa, &pb, status);\n \n- return float64r32_round_pack_canonical(pr, status);\n+ return float64r32_round_pack_canonical(&pr, status);\n }\n \n bfloat16 QEMU_FLATTEN\n@@ -2226,9 +2226,9 @@ bfloat16_div(bfloat16 a, bfloat16 b, float_status *status)\n {\n FloatParts64 pa = bfloat16_unpack_canonical(a, status);\n FloatParts64 pb = bfloat16_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_div(&pa, &pb, status);\n+ FloatParts64 pr = parts64_div(&pa, &pb, status);\n \n- return bfloat16_round_pack_canonical(pr, status);\n+ return bfloat16_round_pack_canonical(&pr, status);\n }\n \n float128 QEMU_FLATTEN\n@@ -2236,22 +2236,22 @@ float128_div(float128 a, float128 b, float_status *status)\n {\n FloatParts128 pa = float128_unpack_canonical(a, status);\n FloatParts128 pb = float128_unpack_canonical(b, status);\n- FloatParts128 *pr = parts128_div(&pa, &pb, status);\n+ FloatParts128 pr = parts128_div(&pa, &pb, status);\n \n- return float128_round_pack_canonical(pr, status);\n+ return float128_round_pack_canonical(&pr, status);\n }\n \n floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status)\n {\n- FloatParts128 pa, pb, *pr;\n+ FloatParts128 pa, pb;\n \n if (!floatx80_unpack_canonical(&pa, a, status) ||\n !floatx80_unpack_canonical(&pb, b, status)) {\n return floatx80_default_nan(status);\n }\n \n- pr = parts128_div(&pa, &pb, status);\n- return floatx80_round_pack_canonical(pr, status);\n+ pa = parts128_div(&pa, &pb, status);\n+ return floatx80_round_pack_canonical(&pa, status);\n }\n \n /*\n@@ -5140,8 +5140,8 @@ static void parts_s390_divide_to_integer(FloatParts64 *a, FloatParts64 *b,\n uint32_t r_flags;\n \n /* Compute precise quotient */\n- q_buf = *a;\n- q = parts64_div(&q_buf, b, status);\n+ q_buf = parts64_div(a, b, status);\n+ q = &q_buf;\n \n /*\n * Check whether two closest integers can be precisely represented,\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 40ea7e3a39..1634160728 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -807,68 +807,63 @@ static FloatPartsN *partsN(muladd_scalbn)(FloatPartsN *a, FloatPartsN *b,\n * corresponding value `b'. The operation is performed according to\n * the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\n */\n-static FloatPartsN *partsN(div)(FloatPartsN *a, FloatPartsN *b,\n- float_status *s)\n+FloatPartsN partsN(div)(const FloatPartsN *a, const FloatPartsN *b,\n+ float_status *s)\n {\n int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);\n- bool sign = a->sign ^ b->sign;\n+ FloatPartsN r = *a;\n+\n+ r.sign ^= b->sign;\n+ r.exp -= b->exp;\n \n if (likely(cmask_is_only_normals(ab_mask))) {\n if (ab_mask & float_cmask_denormal) {\n float_raise(float_flag_input_denormal_used, s);\n }\n- a->sign = sign;\n- a->exp -= b->exp + fracN(div)(a, b);\n- return a;\n+ r.exp -= fracN(div)(&r, b);\n+ return r;\n }\n \n /* 0/0 or Inf/Inf => NaN */\n if (unlikely(ab_mask == float_cmask_zero)) {\n float_raise(float_flag_invalid | float_flag_invalid_zdz, s);\n- goto d_nan;\n+ return partsN(default_nan)(s);\n }\n if (unlikely(ab_mask == float_cmask_inf)) {\n float_raise(float_flag_invalid | float_flag_invalid_idi, s);\n- goto d_nan;\n+ return partsN(default_nan)(s);\n }\n \n /* All the NaN cases */\n if (unlikely(ab_mask & float_cmask_anynan)) {\n- *a = partsN(pick_nan)(a, b, s);\n-\treturn a;\n+ return partsN(pick_nan)(a, b, s);\n }\n \n if ((ab_mask & float_cmask_denormal) && b->cls != float_class_zero) {\n float_raise(float_flag_input_denormal_used, s);\n }\n \n- a->sign = sign;\n-\n /* Inf / X */\n- if (a->cls == float_class_inf) {\n- return a;\n+ if (r.cls == float_class_inf) {\n+ return r;\n }\n \n /* 0 / X */\n- if (a->cls == float_class_zero) {\n- return a;\n+ if (r.cls == float_class_zero) {\n+ return r;\n }\n \n /* X / Inf */\n if (b->cls == float_class_inf) {\n- a->cls = float_class_zero;\n- return a;\n+ r.cls = float_class_zero;\n+ return r;\n }\n \n /* X / 0 => Inf */\n- g_assert(b->cls == float_class_zero);\n+ assert(b->cls == float_class_zero);\n float_raise(float_flag_divbyzero, s);\n- a->cls = float_class_inf;\n- return a;\n-\n- d_nan:\n- *a = partsN(default_nan)(s);\n- return a;\n+ r.cls = float_class_inf;\n+ return r;\n }\n \n /*\n", "prefixes": [ "v2", "17/40" ] }