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GET /api/1.1/patches/2230415/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2230415,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230415/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260429180647.197072-2-thomas.falcon@intel.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260429180647.197072-2-thomas.falcon@intel.com>",
    "date": "2026-04-29T18:06:43",
    "name": "[RFC,1/4] pcie/aspm: Add debug logging for aspm policy config",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "9bc0b5f6a7d6ef6161dc068b93266146e73587ed",
    "submitter": {
        "id": 93044,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/93044/?format=api",
        "name": "Falcon, Thomas",
        "email": "thomas.falcon@intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260429180647.197072-2-thomas.falcon@intel.com/mbox/",
    "series": [
        {
            "id": 502124,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/502124/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=502124",
            "date": "2026-04-29T18:06:44",
            "name": "pcie/aspm: Enable all advertised ASPM states by default",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/502124/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2230415/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2230415/checks/",
    "tags": {},
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        "X-ExtLoop1": "1",
        "From": "Thomas Falcon <thomas.falcon@intel.com>",
        "To": "Bjorn Helgaas <bhelgaas@google.com>,\n\t\"Rafael J . Wysocki\" <rafael@kernel.org>",
        "Cc": "\"David E . Box\" <david.e.box@linux.intel.com>,\n\tLukas Wunner <lukas@wunner.de>,\n\tManivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>,\n\tLen Brown <lenb@kernel.org>,\n\tlinux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tThomas Falcon <thomas.falcon@intel.com>",
        "Subject": "[RFC PATCH 1/4] pcie/aspm: Add debug logging for aspm policy config",
        "Date": "Wed, 29 Apr 2026 13:06:43 -0500",
        "Message-ID": "<20260429180647.197072-2-thomas.falcon@intel.com>",
        "X-Mailer": "git-send-email 2.43.0",
        "In-Reply-To": "<20260429180647.197072-1-thomas.falcon@intel.com>",
        "References": "<20260429180647.197072-1-thomas.falcon@intel.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit"
    },
    "content": "Include additional logging for ASPM and Clock PM state changes\nkeeping track of code flow and enabled power saving states.\n\nExample output after enabling powersupersave policy:\n\n[  130.179249] pcieport 0000:80:1b.0: Updating ASPM state\n[  130.179256] igc 0000:81:00.0: ASPM: Disabling ASPM on this device before disabling parent\n[  130.179368] pcieport 0000:80:1b.0: ASPM: Disabling ASPM before applying configuration\n[  130.179373] pcieport 0000:80:1b.0: ASPM: Configure L1 substates\n[  130.179391] pcieport 0000:80:1b.0: ASPM: Configure ASPM state on upstream device\n[  130.179395] igc 0000:81:00.0: ASPM: Configure ASPM state on downstream device\n[  130.179401] pcieport 0000:80:1b.0: ASPM: enabled states: L1 ASPM-L1.1 PCI-PM-L1.1 PCI-PM-L1.2\n[  130.179416] pcieport 0000:00:06.0: Updating ASPM state\n[  130.179418] nvme 0000:01:00.0: ASPM: Disabling ASPM on this device before disabling parent\n[  130.179422] pcieport 0000:00:06.0: ASPM: Disabling ASPM before applying configuration\n[  130.179425] pcieport 0000:00:06.0: ASPM: Configure L1 substates\n[  130.179435] pcieport 0000:00:06.0: ASPM: Configure ASPM state on upstream device\n[  130.179438] nvme 0000:01:00.0: ASPM: Configure ASPM state on downstream device\n[  130.179442] pcieport 0000:00:06.0: ASPM: enabled states: L1 ASPM-L1.1 ASPM-L1.2 PCI-PM-L1.1 PCI-PM-L1.2\n\nSuggested-by: David E. Box <david.e.box@linux.intel.com>\nSigned-off-by: Thomas Falcon <thomas.falcon@intel.com>\n---\n drivers/pci/pcie/aspm.c | 34 ++++++++++++++++++++++++++++++----\n 1 file changed, 30 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c\nindex 925373b98dff..cd23c1462502 100644\n--- a/drivers/pci/pcie/aspm.c\n+++ b/drivers/pci/pcie/aspm.c\n@@ -372,6 +372,9 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)\n \t/* Need nothing if the specified equals to current state */\n \tif (link->clkpm_enabled == enable)\n \t\treturn;\n+\n+\tpci_dbg(link->pdev, \"%s Clock PM\\n\",\n+\t\tenable ? \"Enabling\" : \"Disabling\");\n \tpcie_set_clkpm_nocheck(link, enable);\n }\n \n@@ -961,11 +964,14 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)\n \tstate &= (link->aspm_capable & ~link->aspm_disable);\n \n \t/* Can't enable any substates if L1 is not enabled */\n-\tif (!(state & PCIE_LINK_STATE_L1))\n+\tif (!(state & PCIE_LINK_STATE_L1)) {\n+\t\tpci_dbg(parent, \"ASPM: L1 not enabled, disabling L1 substates\\n\");\n \t\tstate &= ~PCIE_LINK_STATE_L1SS;\n+\t}\n \n \t/* Spec says both ports must be in D0 before enabling PCI PM substates*/\n \tif (parent->current_state != PCI_D0 || child->current_state != PCI_D0) {\n+\t\tpci_dbg(parent, \"ASPM: Both ports are not in D0, disable PCI PM L1 substates unless explicitly enabled\\n\");\n \t\tstate &= ~PCIE_LINK_STATE_L1_SS_PCIPM;\n \t\tstate |= (link->aspm_enabled & PCIE_LINK_STATE_L1_SS_PCIPM);\n \t}\n@@ -973,6 +979,8 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)\n \t/* Nothing to do if the link is already in the requested state */\n \tif (link->aspm_enabled == state)\n \t\treturn;\n+\tpci_dbg(parent, \"Updating ASPM state\\n\");\n+\n \t/* Convert ASPM state to upstream/downstream ASPM register state */\n \tif (state & PCIE_LINK_STATE_L0S_UP)\n \t\tdwstream |= PCI_EXP_LNKCTL_ASPM_L0S;\n@@ -997,16 +1005,34 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)\n \t * Sec 7.5.3.7 also recommends programming the same ASPM Control\n \t * value for all functions of a multi-function device.\n \t */\n-\tlist_for_each_entry(child, &linkbus->devices, bus_list)\n+\tlist_for_each_entry(child, &linkbus->devices, bus_list) {\n+\t\tpci_dbg(child, \"ASPM: Disabling ASPM on this device before disabling parent\\n\");\n \t\tpcie_config_aspm_dev(child, 0);\n+\t}\n+\tpci_dbg(parent, \"ASPM: Disabling ASPM before applying configuration\\n\");\n \tpcie_config_aspm_dev(parent, 0);\n \n-\tif (link->aspm_capable & PCIE_LINK_STATE_L1SS)\n+\tif (link->aspm_capable & PCIE_LINK_STATE_L1SS) {\n+\t\tpci_dbg(parent, \"ASPM: Configure L1 substates\\n\");\n \t\tpcie_config_aspm_l1ss(link, state);\n+\t}\n \n+\tpci_dbg(parent, \"ASPM: Configure ASPM state on upstream device\\n\");\n \tpcie_config_aspm_dev(parent, upstream);\n-\tlist_for_each_entry(child, &linkbus->devices, bus_list)\n+\tlist_for_each_entry(child, &linkbus->devices, bus_list) {\n+\t\tpci_dbg(child, \"ASPM: Configure ASPM state on downstream device\\n\");\n \t\tpcie_config_aspm_dev(child, dwstream);\n+\t}\n+\n+\tpci_dbg(parent, \"ASPM: enabled states:%s%s%s%s%s%s%s%s\\n\",\n+\t\tFLAG(state, L0S_UP, \" L0s-Upstream\"),\n+\t\tFLAG(state, L0S_DW, \" L0s-Downstream\"),\n+\t\tFLAG(state, L1, \" L1\"),\n+\t\tFLAG(state, L1_1, \" ASPM-L1.1\"),\n+\t\tFLAG(state, L1_2, \" ASPM-L1.2\"),\n+\t\tFLAG(state, L1_1_PCIPM, \" PCI-PM-L1.1\"),\n+\t\tFLAG(state, L1_2_PCIPM, \" PCI-PM-L1.2\"),\n+\t\tFLAG(state, CLKPM, \" ClockPM\"));\n \n \tlink->aspm_enabled = state;\n \n",
    "prefixes": [
        "RFC",
        "1/4"
    ]
}