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GET /api/1.1/patches/2230400/?format=api
{ "id": 2230400, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230400/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20260429-winbond-v6-18-rc1-cont-read-v3-7-0f38b3c229ad@bootlin.com/", "project": { "id": 57, "url": "http://patchwork.ozlabs.org/api/1.1/projects/57/?format=api", "name": "Linux ASPEED SoC development", "link_name": "linux-aspeed", "list_id": "linux-aspeed.lists.ozlabs.org", "list_email": "linux-aspeed@lists.ozlabs.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260429-winbond-v6-18-rc1-cont-read-v3-7-0f38b3c229ad@bootlin.com>", "date": "2026-04-29T17:56:44", "name": "[v3,07/11] mtd: spinand: winbond: Ensure chips are ordered by density", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b4998afe93deb9916d8b4bc264cff680c61a968f", "submitter": { "id": 73368, "url": "http://patchwork.ozlabs.org/api/1.1/people/73368/?format=api", "name": "Miquel Raynal", "email": "miquel.raynal@bootlin.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20260429-winbond-v6-18-rc1-cont-read-v3-7-0f38b3c229ad@bootlin.com/mbox/", "series": [ { "id": 502122, "url": "http://patchwork.ozlabs.org/api/1.1/series/502122/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=502122", "date": "2026-04-29T17:56:39", "name": "mtd: spinand: Winbond continuous read support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/502122/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230400/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230400/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-aspeed+bounces-3980-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1777485483; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=HprCtklTZSXAxrv5AUxEIcuHwzjnoOSSK/fyyTwUO1Q=;\n\tb=2h0yUx/p5Hja1S+pQd+gl50t3YIhkpxRsKG5nJ165vnvrTv90N4OXtorw37kK/rs2QOMtF\n\tUcAPQAMKCm9kV3K6OFJh2acQrCERzuvscuxFcscI84fQEWqCQ2rtotTXnFMopvBIxwPfON\n\tkL3XlLNf2JQ8p34gdBDBSTFxxPFVG3lp2kL7K6jIGQmPib7VBgXwOa+Ifudb8hrNj6Qibi\n\tXCM0FThdYK9o2KKUOjT5j8c8ladUrhTaPyatCIwsrXzpF5UcQB0FeJCDaPuox/5jC9U+XW\n\t3fQJes8ft8SlKmb/vtM3gnScS/HSiGG7M87RZUlOVt5IMRuvOEgWDBTr8IsPcg==", "From": "Miquel Raynal <miquel.raynal@bootlin.com>", "Date": "Wed, 29 Apr 2026 19:56:44 +0200", "Subject": "[PATCH v3 07/11] mtd: spinand: winbond: Ensure chips are ordered\n by density", "X-Mailing-List": "linux-aspeed@lists.ozlabs.org", "List-Id": "<linux-aspeed.lists.ozlabs.org>", "List-Help": "<mailto:linux-aspeed+help@lists.ozlabs.org>", "List-Owner": "<mailto:linux-aspeed+owner@lists.ozlabs.org>", "List-Post": "<mailto:linux-aspeed@lists.ozlabs.org>", "List-Archive": "<https://lore.kernel.org/linux-aspeed/>,\n <https://lists.ozlabs.org/pipermail/linux-aspeed/>", "List-Subscribe": "<mailto:linux-aspeed+subscribe@lists.ozlabs.org>,\n <mailto:linux-aspeed+subscribe-digest@lists.ozlabs.org>,\n <mailto:linux-aspeed+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:linux-aspeed+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "\n <20260429-winbond-v6-18-rc1-cont-read-v3-7-0f38b3c229ad@bootlin.com>", "References": "\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>", "In-Reply-To": "\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>", "To": "Mark Brown <broonie@kernel.org>, Richard Weinberger <richard@nod.at>,\n Vignesh Raghavendra <vigneshr@ti.com>, Michael Walle <mwalle@kernel.org>,\n Miquel Raynal <miquel.raynal@bootlin.com>,\n Takahiro Kuwano <takahiro.kuwano@infineon.com>,\n Lorenzo Bianconi <lorenzo@kernel.org>, Ray Liu <ray.liu@airoha.com>,\n Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>, =?utf-8?q?C=C3=A9dric_Le_Goa?=\n\t=?utf-8?q?ter?= <clg@kaod.org>, Joel Stanley <joel@jms.id.au>,\n Andrew Jeffery <andrew@codeconstruct.com.au>,\n Avi Fishman <avifishman70@gmail.com>, Tomer Maimon <tmaimon77@gmail.com>,\n Tali Perry <tali.perry1@gmail.com>, Patrick Venture <venture@google.com>,\n Nancy Yuen <yuenn@google.com>, Benjamin Fair <benjaminfair@google.com>,\n Maxime Coquelin <mcoquelin.stm32@gmail.com>,\n Alexandre Torgue <alexandre.torgue@foss.st.com>, =?utf-8?q?Jonathan_Neusch?=\n\t=?utf-8?q?=C3=A4fer?= <j.neuschaefer@gmx.net>", "Cc": "Pratyush Yadav <pratyush@kernel.org>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Steam Lin <STLin2@winbond.com>, Santhosh Kumar K <s-k6@ti.com>,\n linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org,\n linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,\n linux-stm32@st-md-mailman.stormreply.com", "X-Mailer": "b4 0.14.3", "X-Last-TLS-Session-Version": "TLSv1.3", "X-Spam-Status": "No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=disabled\n\tversion=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "All W35N0xJW chips have been added in a row, move the definition of the\n2 and 4 Gb variants so their respective locations in the table.\n\nSigned-off-by: Miquel Raynal <miquel.raynal@bootlin.com>\n---\n drivers/mtd/nand/spi/winbond.c | 44 +++++++++++++++++++++---------------------\n 1 file changed, 22 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c\nindex ad22774096e6..f4d4ffaa1f62 100644\n--- a/drivers/mtd/nand/spi/winbond.c\n+++ b/drivers/mtd/nand/spi/winbond.c\n@@ -511,28 +511,6 @@ static const struct spinand_info winbond_spinand_table[] = {\n \t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n \t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n \t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n-\tSPINAND_INFO(\"W35N02JW\", /* 1.8V */\n-\t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),\n-\t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),\n-\t\t NAND_ECCREQ(1, 512),\n-\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n-\t\t\t\t\t &write_cache_octal_variants,\n-\t\t\t\t\t &update_cache_octal_variants),\n-\t\t 0,\n-\t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n-\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n-\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n-\tSPINAND_INFO(\"W35N04JW\", /* 1.8V */\n-\t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),\n-\t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),\n-\t\t NAND_ECCREQ(1, 512),\n-\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n-\t\t\t\t\t &write_cache_octal_variants,\n-\t\t\t\t\t &update_cache_octal_variants),\n-\t\t 0,\n-\t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n-\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n-\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n \t/* 2G-bit densities */\n \tSPINAND_INFO(\"W25M02GV\", /* 2x1G-bit 3.3V */\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),\n@@ -573,6 +551,17 @@ static const struct spinand_info winbond_spinand_table[] = {\n \t\t\t\t\t &update_cache_variants),\n \t\t 0,\n \t\t SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),\n+\tSPINAND_INFO(\"W35N02JW\", /* 1.8V */\n+\t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),\n+\t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),\n+\t\t NAND_ECCREQ(1, 512),\n+\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n+\t\t\t\t\t &write_cache_octal_variants,\n+\t\t\t\t\t &update_cache_octal_variants),\n+\t\t 0,\n+\t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n+\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n+\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n \t/* 4G-bit densities */\n \tSPINAND_INFO(\"W25N04KV\", /* 3.3V */\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),\n@@ -592,6 +581,17 @@ static const struct spinand_info winbond_spinand_table[] = {\n \t\t\t\t\t &update_cache_variants),\n \t\t 0,\n \t\t SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),\n+\tSPINAND_INFO(\"W35N04JW\", /* 1.8V */\n+\t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),\n+\t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),\n+\t\t NAND_ECCREQ(1, 512),\n+\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n+\t\t\t\t\t &write_cache_octal_variants,\n+\t\t\t\t\t &update_cache_octal_variants),\n+\t\t 0,\n+\t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n+\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n+\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n };\n \n static int winbond_spinand_init(struct spinand_device *spinand)\n", "prefixes": [ "v3", "07/11" ] }