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GET /api/1.1/patches/2230132/?format=api
{ "id": 2230132, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230132/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260429100400.2860345-1-ghidoliemanuele@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260429100400.2860345-1-ghidoliemanuele@gmail.com>", "date": "2026-04-29T10:03:56", "name": "[v1] common: memsize: fix occasionally failing alias probing", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b90ffd8b5b26ca18c8cfbf8f8d0368a4721a4ebc", "submitter": { "id": 85913, "url": "http://patchwork.ozlabs.org/api/1.1/people/85913/?format=api", "name": "Emanuele Ghidoli", "email": "ghidoliemanuele@gmail.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/1.1/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260429100400.2860345-1-ghidoliemanuele@gmail.com/mbox/", "series": [ { "id": 502032, "url": "http://patchwork.ozlabs.org/api/1.1/series/502032/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502032", "date": "2026-04-29T10:03:56", "name": "[v1] common: memsize: fix occasionally failing alias probing", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502032/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230132/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230132/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=pD3TNqk/;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.b=\"pD3TNqk/\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=ghidoliemanuele@gmail.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5Ccw5hMGz1xqf\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 Apr 2026 20:06:24 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id A9FB784715;\n\tWed, 29 Apr 2026 12:06:15 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id EA3B4847B0; Wed, 29 Apr 2026 12:06:14 +0200 (CEST)", "from mail-wm1-x333.google.com (mail-wm1-x333.google.com\n [IPv6:2a00:1450:4864:20::333])\n (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 0FD788470B\n for <u-boot@lists.denx.de>; Wed, 29 Apr 2026 12:06:13 +0200 (CEST)", "by mail-wm1-x333.google.com with SMTP id\n 5b1f17b1804b1-4891e5b9c1fso108100645e9.2\n for <u-boot@lists.denx.de>; Wed, 29 Apr 2026 03:06:13 -0700 (PDT)", "from emanueleg-nb.homenet.telecomitalia.it\n (host-87-2-163-213.retail.telecomitalia.it. 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This suggests that ordering the CPU accesses is not sufficient for\nthis probe, likely because the issue is in the path to the memory\ncontroller rather than in the core itself.\n\nRead the written address back before checking the alias address. This\nappears to force the write to become observable at the probe address\nbefore using the alias read to decide whether the tested address range\nexists.\n\nIf the readback does not match the written pattern, restore the saved\nvalue and continue with the next check. This keeps the probe robust for\naddresses that do not reliably retain the test pattern.\n\nFixes: 0977448b45e2 (\"common: memsize: add RAM size probe based on alias detection\")\nSigned-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>\n---\n common/memsize.c | 20 ++++++++++++++++++--\n 1 file changed, 18 insertions(+), 2 deletions(-)", "diff": "diff --git a/common/memsize.c b/common/memsize.c\nindex 3ecf9bac2aac..fd22f85a164e 100644\n--- a/common/memsize.c\n+++ b/common/memsize.c\n@@ -145,6 +145,7 @@ long get_ram_size(long *base, long maxsize)\n long probe_ram_size_by_alias(const struct ram_alias_check *checks)\n {\n \tlong save[2];\n+\tlong pat;\n \tint dcache_en = 0;\n \tlong ret = 0;\n \n@@ -161,12 +162,27 @@ long probe_ram_size_by_alias(const struct ram_alias_check *checks)\n \t\tif (dcache_en)\n \t\t\tdcache_flush_invalidate(s);\n \n-\t\t*d = ~save[0];\n+\t\tpat = ~save[0];\n+\t\t*d = pat;\n \t\tsync();\n \t\tif (dcache_en)\n \t\t\tdcache_flush_invalidate(d);\n \n-\t\tif (*s != ~save[0])\n+\t\t/*\n+\t\t * Make sure the test pattern is observable at the probe\n+\t\t * address before checking whether it is also visible through\n+\t\t * the alias address.\n+\t\t */\n+\t\tif (*d != pat) {\n+\t\t\t*d = save[1];\n+\t\t\tsync();\n+\t\t\tif (dcache_en)\n+\t\t\t\tdcache_flush_invalidate(d);\n+\t\t\tchecks++;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tif (*s != pat)\n \t\t\tret = checks->size;\n \n \t\t/* Restore content */\n", "prefixes": [ "v1" ] }