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GET /api/1.1/patches/2230003/?format=api
{ "id": 2230003, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230003/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-20-alistair.francis@wdc.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260429044752.4176397-20-alistair.francis@wdc.com>", "date": "2026-04-29T04:47:20", "name": "[PULL,19/51] configs/targets: Forbid RISC-V to use legacy native endianness APIs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e36dd56df147cdfadcc8c539b880b316f98f0221", "submitter": { "id": 64571, "url": "http://patchwork.ozlabs.org/api/1.1/people/64571/?format=api", "name": "Alistair Francis", "email": "alistair23@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-20-alistair.francis@wdc.com/mbox/", "series": [ { "id": 501983, "url": "http://patchwork.ozlabs.org/api/1.1/series/501983/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501983", "date": "2026-04-29T04:47:05", "name": "[PULL,01/51] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501983/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230003/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230003/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=WhW3ZJez;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::1034;\n envelope-from=alistair23@gmail.com; helo=mail-pj1-x1034.google.com", "X-Spam_score_int": "-17", "X-Spam_score": "-1.8", "X-Spam_bar": "-", "X-Spam_report": "(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Philippe Mathieu-Daudé <philmd@linaro.org>\n\nAll RISC-V related binaries are buildable without a single\nuse of the legacy \"native endian\" API. Set the transitional\nTARGET_USE_LEGACY_NATIVE_ENDIAN_API definition to forbid\nfurther uses of the legacy API.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nReviewed-by: Alistair Francis <alistair.francis@wdc.com>\nMessage-ID: <20260318103122.97244-17-philmd@linaro.org>\nSigned-off-by: Alistair Francis <alistair.francis@wdc.com>\n---\n configs/targets/riscv32-linux-user.mak | 1 +\n configs/targets/riscv32-softmmu.mak | 1 +\n configs/targets/riscv64-bsd-user.mak | 1 +\n configs/targets/riscv64-linux-user.mak | 1 +\n configs/targets/riscv64-softmmu.mak | 1 +\n 5 files changed, 5 insertions(+)", "diff": "diff --git a/configs/targets/riscv32-linux-user.mak b/configs/targets/riscv32-linux-user.mak\nindex f069ab9a0f..d88fdf5e1b 100644\n--- a/configs/targets/riscv32-linux-user.mak\n+++ b/configs/targets/riscv32-linux-user.mak\n@@ -8,3 +8,4 @@ TARGET_SYSTBL_ABI=32\n TARGET_SYSTBL_ABI=common,32,riscv,memfd_secret\n TARGET_SYSTBL=syscall.tbl\n TARGET_LONG_BITS=32\n+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\ndiff --git a/configs/targets/riscv32-softmmu.mak b/configs/targets/riscv32-softmmu.mak\nindex 26080599be..5d5016d008 100644\n--- a/configs/targets/riscv32-softmmu.mak\n+++ b/configs/targets/riscv32-softmmu.mak\n@@ -5,3 +5,4 @@ TARGET_XML_FILES= riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri\n TARGET_NEED_FDT=y\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\ndiff --git a/configs/targets/riscv64-bsd-user.mak b/configs/targets/riscv64-bsd-user.mak\nindex bc85d9ed04..5b4e138099 100644\n--- a/configs/targets/riscv64-bsd-user.mak\n+++ b/configs/targets/riscv64-bsd-user.mak\n@@ -3,3 +3,4 @@ TARGET_BASE_ARCH=riscv\n TARGET_ABI_DIR=riscv\n TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-64bit-virtual.xml\n TARGET_LONG_BITS=64\n+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\ndiff --git a/configs/targets/riscv64-linux-user.mak b/configs/targets/riscv64-linux-user.mak\nindex bca0864512..35621520c5 100644\n--- a/configs/targets/riscv64-linux-user.mak\n+++ b/configs/targets/riscv64-linux-user.mak\n@@ -8,3 +8,4 @@ TARGET_SYSTBL_ABI=64\n TARGET_SYSTBL_ABI=common,64,riscv,rlimit,memfd_secret\n TARGET_SYSTBL=syscall.tbl\n TARGET_LONG_BITS=64\n+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\ndiff --git a/configs/targets/riscv64-softmmu.mak b/configs/targets/riscv64-softmmu.mak\nindex 5059c55048..a10dc03c04 100644\n--- a/configs/targets/riscv64-softmmu.mak\n+++ b/configs/targets/riscv64-softmmu.mak\n@@ -6,3 +6,4 @@ TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri\n TARGET_NEED_FDT=y\n TARGET_LONG_BITS=64\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\n", "prefixes": [ "PULL", "19/51" ] }