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GET /api/1.1/patches/2229993/?format=api
{ "id": 2229993, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229993/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-2-alistair.francis@wdc.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260429044752.4176397-2-alistair.francis@wdc.com>", "date": "2026-04-29T04:47:02", "name": "[PULL,01/51] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7d945b5c53e70e3def19d5dec0448375d1d5d252", "submitter": { "id": 64571, "url": "http://patchwork.ozlabs.org/api/1.1/people/64571/?format=api", "name": "Alistair Francis", "email": "alistair23@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-2-alistair.francis@wdc.com/mbox/", "series": [ { "id": 501983, "url": "http://patchwork.ozlabs.org/api/1.1/series/501983/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501983", "date": "2026-04-29T04:47:05", "name": "[PULL,01/51] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501983/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229993/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229993/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=XGcsUc7y;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pg1-x533.google.com", "X-Spam_score_int": "-17", "X-Spam_score": "-1.8", "X-Spam_bar": "-", "X-Spam_report": "(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Jay Chang <jay.chang@sifive.com>\n\nReplace the temporary custom extension bit (TC[32]) with the\nstandard EN_PRI bit defined in RISC-V IOMMU specification.\n\nSigned-off-by: Jay Chang <jay.chang@sifive.com>\nReviewed-by: Frank Chang <frank.chang@sifive.com>\nReviewed-by: Nutty Liu <nutty.liu@hotmail.com>\nSigned-off-by: Jay Chang <jay.chang@sifive.com>\nReviewed-by: Alistair Francis <alistair.francis@wdc.com>\nMessage-ID: <20260325014856.58948-1-jay.chang@sifive.com>\nSigned-off-by: Alistair Francis <alistair.francis@wdc.com>\n---\n hw/riscv/riscv-iommu.c | 7 ++-----\n 1 file changed, 2 insertions(+), 5 deletions(-)", "diff": "diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c\nindex c3c9ed6469..8476405d0e 100644\n--- a/hw/riscv/riscv-iommu.c\n+++ b/hw/riscv/riscv-iommu.c\n@@ -1572,11 +1572,8 @@ static int riscv_iommu_translate(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,\n riscv_iommu_hpm_incr_ctr(s, ctx, RISCV_IOMMU_HPMEVENT_URQ);\n \n iot_cache = g_hash_table_ref(s->iot_cache);\n- /*\n- * TC[32] is reserved for custom extensions, used here to temporarily\n- * enable automatic page-request generation for ATS queries.\n- */\n- enable_pri = (iotlb->perm == IOMMU_NONE) && (ctx->tc & BIT_ULL(32));\n+ enable_pri = (iotlb->perm == IOMMU_NONE) &&\n+ (ctx->tc & RISCV_IOMMU_DC_TC_EN_PRI);\n enable_pid = (ctx->tc & RISCV_IOMMU_DC_TC_PDTV);\n \n /* Check for ATS request. */\n", "prefixes": [ "PULL", "01/51" ] }