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GET /api/1.1/patches/2229738/?format=api
{ "id": 2229738, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229738/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260428163929.3501268D0D@verein.lst.de/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260428163929.3501268D0D@verein.lst.de>", "date": "2026-04-28T16:39:29", "name": "[v2,4/9] pci: brcmstb: Add RPi5 reset facilities", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2c0212cdece7362b0a40c48ce66cb3684c14cba2", "submitter": { "id": 2722, "url": "http://patchwork.ozlabs.org/api/1.1/people/2722/?format=api", "name": "Torsten Duwe", "email": "duwe@lst.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260428163929.3501268D0D@verein.lst.de/mbox/", "series": [ { "id": 501902, "url": "http://patchwork.ozlabs.org/api/1.1/series/501902/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=501902", "date": "2026-04-28T16:23:19", "name": "ARM: RPi5: Enable PCIe", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501902/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229738/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229738/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=lst.de", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=lst.de", "phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mV66Q8Wz1yHv\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 Apr 2026 02:43:58 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 753C58467E;\n\tTue, 28 Apr 2026 18:43:24 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 89B69845E3; Tue, 28 Apr 2026 18:39:32 +0200 (CEST)", "from verein.lst.de (verein.lst.de [213.95.11.211])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 860B3842D7\n for <u-boot@lists.denx.de>; Tue, 28 Apr 2026 18:39:30 +0200 (CEST)", "by verein.lst.de (Postfix, from userid 2005)\n id 3501268D0D; Tue, 28 Apr 2026 18:39:29 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-1.9 required=5.0 tests=BAYES_00,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2", "Subject": "[PATCH v2 4/9] pci: brcmstb: Add RPi5 reset facilities", "To": "Peter Robinson <pbrobinson@gmail.com>,\n Matthias Brugger <mbrugger@suse.com>", "Cc": "=?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?=\n\t=?unknown-8bit?q?m=C3=A1k=22_=3Csairon=40sairon=2Ecz=3E=2CAndrea_della_Port?=\n\t=?unknown-8bit?q?a_=3Candrea=2Eporta=40suse=2Ecom=3E=2C=22Ivan_T=2E_Ivanov?=\n\t=?unknown-8bit?q?=22_=3Ciivanov=40suse=2Ede=3E=2C_Stanimir_Varbanov_=3Cstan?=\n\t=?unknown-8bit?q?imir=2Evarbanov=40suse=2Ecom=3E=2C_Oleksii_Moisieiev_=3COl?=\n\t=?unknown-8bit?q?eksii=5FMoisieiev=40epam=2Ecom=3E=2C_Volodymyr_Babchuk_=3C?=\n\t=?unknown-8bit?q?volodymyr=5Fbabchuk=40epam=2Ecom=3E=2C_Marek_Vasut_=3Cmare?=\n\t=?unknown-8bit?q?k=2Evasut+renesas=40mailbox=2Eorg=3E=2CPaul_Barker_=3Cpaul?=\n\t=?unknown-8bit?q?=2Ebarker=2Ect=40bp=2Erenesas=2Ecom=3E=2CPatrice_Chotard_?=\n\t=?unknown-8bit?q?=3Cpatrice=2Echotard=40foss=2Est=2Ecom=3E=2CChristian_Mara?=\n\t=?unknown-8bit?q?ngi_=3Cansuelsmth=40gmail=2Ecom=3E=2CPatrick_Delaunay_=3Cp?=\n\t=?unknown-8bit?q?atrick=2Edelaunay=40foss=2Est=2Ecom=3E=2CHuan_Zhou_=3Cme?=\n\t=?unknown-8bit?q?=40per1cycle=2Eorg=3E=2CGabriel_Fernandez_=3Cgabriel=2Efer?=\n\t=?unknown-8bit?q?nandez=40foss=2Est=2Ecom=3E=2CKever_Yang_=3Ckever=2Eyang?=\n\t=?unknown-8bit?q?=40rock-chips=2Ecom=3E=2CJonas_Karlman_=3Cjonas=40kwiboo?=\n\t=?unknown-8bit?q?=2Ese=3E=2CJoseph_Chen_=3Cchenjh=40rock-chips=2Ecom=3E=2CE?=\n\t=?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?=\n\t=?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?=\n\t=?unknown-8bit?q?=2Ede?=", "In-Reply-To": "<20260428162319.99B4268B05@verein.lst.de>", "Message-Id": "<20260428163929.3501268D0D@verein.lst.de>", "Date": "Tue, 28 Apr 2026 18:39:29 +0200 (CEST)", "From": "duwe@lst.de (Torsten Duwe)", "X-Mailman-Approved-At": "Tue, 28 Apr 2026 18:43:21 +0200", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Torsten Duwe <duwe@suse.de>\n\nA driver for Broadcom reset controllers ported from\nlinux/drivers/reset/reset-brcmstb.c to U-Boot.\n\nSigned-off-by: Torsten Duwe <duwe@suse.de>\nCo-authored-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com>\nTested-by: Pedro Falcato <pfalcato@suse.de>\n\n---\n configs/rpi_arm64_defconfig | 1 +\n drivers/reset/Kconfig | 7 +++\n drivers/reset/Makefile | 1 +\n drivers/reset/reset-brcmstb.c | 97 +++++++++++++++++++++++++++++++++++\n 4 files changed, 106 insertions(+)\n create mode 100644 drivers/reset/reset-brcmstb.c", "diff": "diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig\nindex 69e8e72c5d7..153d7ed301e 100644\n--- a/configs/rpi_arm64_defconfig\n+++ b/configs/rpi_arm64_defconfig\n@@ -44,6 +44,7 @@ CONFIG_BCMGENET=y\n CONFIG_PCI_BRCMSTB=y\n CONFIG_PINCTRL=y\n # CONFIG_PINCTRL_GENERIC is not set\n+CONFIG_RESET_BRCMSTB=y\n CONFIG_DM_RNG=y\n CONFIG_RNG_IPROC200=y\n # CONFIG_REQUIRE_SERIAL_CONSOLE is not set\ndiff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig\nindex 66911199c8b..e0561df8058 100644\n--- a/drivers/reset/Kconfig\n+++ b/drivers/reset/Kconfig\n@@ -64,6 +64,13 @@ config RESET_BCM6345\n \thelp\n \t Support reset controller on BCM6345.\n \n+config RESET_BRCMSTB\n+\tbool \"Generic Reset controller driver for Broadcom\"\n+\thelp\n+\t This enables reset controller for Broadcom devices.\n+\t If you wish to use reset resources managed by the Broadcom\n+\t Reset Controller, say Y here. Otherwise, say N.\n+\n config RESET_UNIPHIER\n \tbool \"Reset controller driver for UniPhier SoCs\"\n \tdepends on ARCH_UNIPHIER\ndiff --git a/drivers/reset/Makefile b/drivers/reset/Makefile\nindex 088545c6473..ad5fe6b6184 100644\n--- a/drivers/reset/Makefile\n+++ b/drivers/reset/Makefile\n@@ -13,6 +13,7 @@ obj-$(CONFIG_RESET_AIROHA) += reset-airoha.o\n obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o\n obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o\n obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o\n+obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o\n obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o\n obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o\n obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o\ndiff --git a/drivers/reset/reset-brcmstb.c b/drivers/reset/reset-brcmstb.c\nnew file mode 100644\nindex 00000000000..7861f7c9baf\n--- /dev/null\n+++ b/drivers/reset/reset-brcmstb.c\n@@ -0,0 +1,97 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Broadcom STB generic reset controller\n+ *\n+ * Copyright (C) 2024 EPAM Systems\n+ *\n+ * Moved from linux kernel:\n+ * Author: Florian Fainelli <f.fainelli@gmail.com>\n+ * Copyright (C) 2018 Broadcom\n+ */\n+\n+#include <asm/io.h>\n+#include <dm.h>\n+#include <errno.h>\n+#include <linux/bitops.h>\n+#include <linux/delay.h>\n+#include <log.h>\n+#include <malloc.h>\n+#include <reset-uclass.h>\n+\n+struct brcmstb_reset {\n+\tvoid __iomem *base;\n+};\n+\n+#define SW_INIT_SET 0x00\n+#define SW_INIT_CLEAR 0x04\n+#define SW_INIT_STATUS 0x08\n+\n+#define SW_INIT_BIT(id) BIT((id) & 0x1f)\n+#define SW_INIT_BANK(id) ((id) >> 5)\n+\n+#define usleep_range(a, b) udelay((b))\n+\n+/* A full bank contains extra registers that we are not utilizing but still\n+ * qualify as a single bank.\n+ */\n+#define SW_INIT_BANK_SIZE 0x18\n+\n+static int brcmstb_reset_assert(struct reset_ctl *rst)\n+{\n+\tunsigned int off = SW_INIT_BANK(rst->id) * SW_INIT_BANK_SIZE;\n+\tstruct brcmstb_reset *priv = dev_get_priv(rst->dev);\n+\n+\twritel_relaxed(SW_INIT_BIT(rst->id), priv->base + off + SW_INIT_SET);\n+\treturn 0;\n+}\n+\n+static int brcmstb_reset_deassert(struct reset_ctl *rst)\n+{\n+\tunsigned int off = SW_INIT_BANK(rst->id) * SW_INIT_BANK_SIZE;\n+\tstruct brcmstb_reset *priv = dev_get_priv(rst->dev);\n+\n+\twritel_relaxed(SW_INIT_BIT(rst->id), priv->base + off + SW_INIT_CLEAR);\n+\t/* Maximum reset delay after de-asserting a line and seeing block\n+\t * operation is typically 14us for the worst case, build some slack\n+\t * here.\n+\t */\n+\tusleep_range(100, 200);\n+\treturn 0;\n+}\n+\n+static int brcmstb_reset_status(struct reset_ctl *rst)\n+{\n+\tunsigned int off = SW_INIT_BANK(rst->id) * SW_INIT_BANK_SIZE;\n+\tstruct brcmstb_reset *priv = dev_get_priv(rst->dev);\n+\n+\treturn readl_relaxed(priv->base + off + SW_INIT_STATUS) &\n+\t\t\tSW_INIT_BIT(rst->id);\n+}\n+\n+struct reset_ops brcmstb_reset_reset_ops = {\n+\t.rst_assert = brcmstb_reset_assert,\n+\t.rst_deassert = brcmstb_reset_deassert,\n+\t.rst_status = brcmstb_reset_status};\n+\n+static int brcmstb_reset_probe(struct udevice *dev)\n+{\n+\tstruct brcmstb_reset *priv = dev_get_priv(dev);\n+\n+\tpriv->base = dev_remap_addr(dev);\n+\tif (!priv->base)\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n+static const struct udevice_id brcmstb_reset_ids[] = {\n+\t{.compatible = \"brcm,brcmstb-reset\"}, {/* sentinel */}};\n+\n+U_BOOT_DRIVER(brcmstb_reset) = {\n+\t.name = \"brcmstb-reset\",\n+\t.id = UCLASS_RESET,\n+\t.of_match = brcmstb_reset_ids,\n+\t.ops = &brcmstb_reset_reset_ops,\n+\t.probe = brcmstb_reset_probe,\n+\t.priv_auto = sizeof(struct brcmstb_reset),\n+};\n", "prefixes": [ "v2", "4/9" ] }