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GET /api/1.1/patches/2229561/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2229561,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229561/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260428131359.34872-11-fangyu.yu@linux.alibaba.com/",
    "project": {
        "id": 70,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/70/?format=api",
        "name": "Linux KVM RISC-V",
        "link_name": "kvm-riscv",
        "list_id": "kvm-riscv.lists.infradead.org",
        "list_email": "kvm-riscv@lists.infradead.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260428131359.34872-11-fangyu.yu@linux.alibaba.com>",
    "date": "2026-04-28T13:13:58",
    "name": "[RFC,10/11] iommupt: Add RISC-V dirty tracking PTE ops",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "37095420f8b8128e1f9dc3fce778a992f64cb95e",
    "submitter": {
        "id": 91416,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/91416/?format=api",
        "name": null,
        "email": "fangyu.yu@linux.alibaba.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260428131359.34872-11-fangyu.yu@linux.alibaba.com/mbox/",
    "series": [
        {
            "id": 501850,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/501850/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=501850",
            "date": "2026-04-28T13:13:48",
            "name": "iommu/riscv: Add hardware dirty tracking for second-stage domains",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/501850/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2229561/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2229561/checks/",
    "tags": {},
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        ],
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        "From": "fangyu.yu@linux.alibaba.com",
        "To": "joro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tpjw@kernel.org,\n\tpalmer@dabbelt.com,\n\taou@eecs.berkeley.edu,\n\talex@ghiti.fr,\n\ttjeznach@rivosinc.com,\n\tjgg@ziepe.ca,\n\tkevin.tian@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tvasant.hegde@amd.com,\n\tanup@brainfault.org,\n\tatish.patra@linux.dev,\n\tskhawaja@google.com,\n\tjgg@nvidia.com",
        "Cc": "guoren@kernel.org,\n\tkvm@vger.kernel.org,\n\tiommu@lists.linux.dev,\n\tkvm-riscv@lists.infradead.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org,\n\tFangyu Yu <fangyu.yu@linux.alibaba.com>",
        "Subject": "[RFC PATCH 10/11] iommupt: Add RISC-V dirty tracking PTE ops",
        "Date": "Tue, 28 Apr 2026 21:13:58 +0800",
        "Message-Id": "<20260428131359.34872-11-fangyu.yu@linux.alibaba.com>",
        "X-Mailer": "git-send-email 2.39.3 (Apple Git-146)",
        "In-Reply-To": "<20260428131359.34872-1-fangyu.yu@linux.alibaba.com>",
        "References": "<20260428131359.34872-1-fangyu.yu@linux.alibaba.com>",
        "MIME-Version": "1.0",
        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260428_061437_023936_C3F9263C ",
        "X-CRM114-Status": "UNSURE (   7.41  )",
        "X-CRM114-Notice": "Please train this message.",
        "X-Spam-Score": "-17.6 (-----------------)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  From: Fangyu Yu <fangyu.yu@linux.alibaba.com> Implement the\n    three dirty-tracking hooks required by the generic page table framework\n for\n    the RISC-V format: pt_entry_is_write_dirty(): Check the D bit (bit 7) in\n   the PTE.\n Content analysis details:   (-17.6 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE     RBL: Sender listed at https://www.dnswl.org/, no\n                             trust\n                             [115.124.30.97 listed in list.dnswl.org]\n -7.5 USER_IN_DEF_SPF_WL     From: address is in the default SPF welcome-list\n  0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS               SPF: sender matches SPF record\n -7.5 USER_IN_DEF_DKIM_WL    From: address is in the default DKIM welcome-list\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]\n  0.0 UNPARSEABLE_RELAY      Informational: message has unparseable relay\n lines\n -0.5 ENV_AND_HDR_SPF_MATCH  Env and Hdr From used in default SPF WL Match",
        "X-BeenThere": "kvm-riscv@lists.infradead.org",
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        "Precedence": "list",
        "List-Id": "<kvm-riscv.lists.infradead.org>",
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        "List-Post": "<mailto:kvm-riscv@lists.infradead.org>",
        "List-Help": "<mailto:kvm-riscv-request@lists.infradead.org?subject=help>",
        "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe>",
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        "Sender": "\"kvm-riscv\" <kvm-riscv-bounces@lists.infradead.org>",
        "Errors-To": "kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"
    },
    "content": "From: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n\nImplement the three dirty-tracking hooks required by the generic page\ntable framework for the RISC-V format:\n\n  pt_entry_is_write_dirty():\n    Check the D bit (bit 7) in the PTE.\n\n  pt_entry_make_write_clean():\n    Clear the D bit across the full contiguous range.\n\n  pt_entry_make_write_dirty():\n    Atomically set D via try_cmpxchg64() on a single PTE.\n\nSigned-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n---\n drivers/iommu/generic_pt/fmt/riscv.h | 43 ++++++++++++++++++++++++++++\n 1 file changed, 43 insertions(+)",
    "diff": "diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h\nindex 0281356cfaf6..44b87e70f029 100644\n--- a/drivers/iommu/generic_pt/fmt/riscv.h\n+++ b/drivers/iommu/generic_pt/fmt/riscv.h\n@@ -222,6 +222,49 @@ static inline void riscvpt_attr_from_entry(const struct pt_state *pts,\n }\n #define pt_attr_from_entry riscvpt_attr_from_entry\n \n+/*\n+ * Dirty tracking: RISC-V PTEs use D (bit 7) as the hardware dirty bit.\n+ * When Svnapot 64K is active a leaf entry spans 16 consecutive PTEs; we\n+ * must check / clear all of them so that no dirty indication is lost.\n+ */\n+static inline bool riscvpt_entry_is_write_dirty(const struct pt_state *pts)\n+{\n+\tunsigned int num_contig_lg2 = riscvpt_entry_num_contig_lg2(pts);\n+\tconst pt_riscv_entry_t *tablep =\n+\t\tpt_cur_table(pts, pt_riscv_entry_t) +\n+\t\tlog2_set_mod(pts->index, 0, num_contig_lg2);\n+\tconst pt_riscv_entry_t *end = tablep + log2_to_int(num_contig_lg2);\n+\n+\tfor (; tablep != end; tablep++)\n+\t\tif (READ_ONCE(*tablep) & RISCVPT_D)\n+\t\t\treturn true;\n+\treturn false;\n+}\n+#define pt_entry_is_write_dirty riscvpt_entry_is_write_dirty\n+\n+static inline void riscvpt_entry_make_write_clean(struct pt_state *pts)\n+{\n+\tunsigned int num_contig_lg2 = riscvpt_entry_num_contig_lg2(pts);\n+\tpt_riscv_entry_t *tablep =\n+\t\tpt_cur_table(pts, pt_riscv_entry_t) +\n+\t\tlog2_set_mod(pts->index, 0, num_contig_lg2);\n+\tpt_riscv_entry_t *end = tablep + log2_to_int(num_contig_lg2);\n+\n+\tfor (; tablep != end; tablep++)\n+\t\tWRITE_ONCE(*tablep, READ_ONCE(*tablep) & ~(pt_riscv_entry_t)RISCVPT_D);\n+}\n+#define pt_entry_make_write_clean riscvpt_entry_make_write_clean\n+\n+static inline bool riscvpt_entry_make_write_dirty(struct pt_state *pts)\n+{\n+\tpt_riscv_entry_t *tablep =\n+\t\tpt_cur_table(pts, pt_riscv_entry_t) + pts->index;\n+\tpt_riscv_entry_t new = pts->entry | RISCVPT_D;\n+\n+\treturn try_cmpxchg64(tablep, &pts->entry, new);\n+}\n+#define pt_entry_make_write_dirty riscvpt_entry_make_write_dirty\n+\n /* --- iommu */\n #include <linux/generic_pt/iommu.h>\n #include <linux/iommu.h>\n",
    "prefixes": [
        "RFC",
        "10/11"
    ]
}