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GET /api/1.1/patches/2229555/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
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Vary: Accept

{
    "id": 2229555,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229555/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260428131359.34872-7-fangyu.yu@linux.alibaba.com/",
    "project": {
        "id": 70,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/70/?format=api",
        "name": "Linux KVM RISC-V",
        "link_name": "kvm-riscv",
        "list_id": "kvm-riscv.lists.infradead.org",
        "list_email": "kvm-riscv@lists.infradead.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260428131359.34872-7-fangyu.yu@linux.alibaba.com>",
    "date": "2026-04-28T13:13:54",
    "name": "[RFC,06/11] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "5dd866b5c7180be4314c4ea39076dec3367c80a5",
    "submitter": {
        "id": 91416,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/91416/?format=api",
        "name": null,
        "email": "fangyu.yu@linux.alibaba.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260428131359.34872-7-fangyu.yu@linux.alibaba.com/mbox/",
    "series": [
        {
            "id": 501850,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/501850/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=501850",
            "date": "2026-04-28T13:13:48",
            "name": "iommu/riscv: Add hardware dirty tracking for second-stage domains",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/501850/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2229555/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2229555/checks/",
    "tags": {},
    "headers": {
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        ],
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        "From": "fangyu.yu@linux.alibaba.com",
        "To": "joro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tpjw@kernel.org,\n\tpalmer@dabbelt.com,\n\taou@eecs.berkeley.edu,\n\talex@ghiti.fr,\n\ttjeznach@rivosinc.com,\n\tjgg@ziepe.ca,\n\tkevin.tian@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tvasant.hegde@amd.com,\n\tanup@brainfault.org,\n\tatish.patra@linux.dev,\n\tskhawaja@google.com,\n\tjgg@nvidia.com",
        "Cc": "guoren@kernel.org,\n\tkvm@vger.kernel.org,\n\tiommu@lists.linux.dev,\n\tkvm-riscv@lists.infradead.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org,\n\tFangyu Yu <fangyu.yu@linux.alibaba.com>",
        "Subject": "[RFC PATCH 06/11] iommu/riscv: Add domain_alloc_paging_flags for\n second-stage domain",
        "Date": "Tue, 28 Apr 2026 21:13:54 +0800",
        "Message-Id": "<20260428131359.34872-7-fangyu.yu@linux.alibaba.com>",
        "X-Mailer": "git-send-email 2.39.3 (Apple Git-146)",
        "In-Reply-To": "<20260428131359.34872-1-fangyu.yu@linux.alibaba.com>",
        "References": "<20260428131359.34872-1-fangyu.yu@linux.alibaba.com>",
        "MIME-Version": "1.0",
        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260428_061430_144760_D8D14EBF ",
        "X-CRM114-Status": "GOOD (  12.63  )",
        "X-Spam-Score": "-17.6 (-----------------)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  From: Fangyu Yu <fangyu.yu@linux.alibaba.com> Replace\n .domain_alloc_paging\n    with .domain_alloc_paging_flags so callers can pass allocation flags to\n select\n    the appropriate page-table type. When IOMMU_HWPT_ALLOC_NEST_PARENT or\n IOMMU_HWPT_ALLOC_DIRTY_TRACKING\n    is set in @flags, allocate a second-stage (iohgatp) domain.\n Content analysis details:   (-17.6 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE     RBL: Sender listed at https://www.dnswl.org/, no\n                             trust\n                             [115.124.30.130 listed in list.dnswl.org]\n -7.5 USER_IN_DEF_SPF_WL     From: address is in the default SPF welcome-list\n  0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS               SPF: sender matches SPF record\n -7.5 USER_IN_DEF_DKIM_WL    From: address is in the default DKIM welcome-list\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]\n  0.0 RCVD_IN_MSPIKE_H2      RBL: Average reputation (+2)\n                             [115.124.30.130 listed in wl.mailspike.net]\n -0.5 ENV_AND_HDR_SPF_MATCH  Env and Hdr From used in default SPF WL Match\n  0.0 UNPARSEABLE_RELAY      Informational: message has unparseable relay\n lines",
        "X-BeenThere": "kvm-riscv@lists.infradead.org",
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        "List-Id": "<kvm-riscv.lists.infradead.org>",
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        "Sender": "\"kvm-riscv\" <kvm-riscv-bounces@lists.infradead.org>",
        "Errors-To": "kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"
    },
    "content": "From: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n\nReplace .domain_alloc_paging with .domain_alloc_paging_flags so callers\ncan pass allocation flags to select the appropriate page-table type.\n\nWhen IOMMU_HWPT_ALLOC_NEST_PARENT or IOMMU_HWPT_ALLOC_DIRTY_TRACKING is\nset in @flags, allocate a second-stage (iohgatp) domain.\n\nWhen @flags is 0 the behaviour is identical to the previous\ndomain_alloc_paging: first-stage (iosatp) domain.\n\nSigned-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n---\n drivers/iommu/riscv/iommu.c | 66 ++++++++++++++++++++++++++++---------\n 1 file changed, 51 insertions(+), 15 deletions(-)",
    "diff": "diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c\nindex 5dadf6d09139..0c13430ecc7f 100644\n--- a/drivers/iommu/riscv/iommu.c\n+++ b/drivers/iommu/riscv/iommu.c\n@@ -1255,23 +1255,50 @@ static const struct iommu_domain_ops riscv_iommu_paging_domain_ops = {\n \t.flush_iotlb_all = riscv_iommu_iotlb_flush_all,\n };\n \n-static struct iommu_domain *riscv_iommu_alloc_paging_domain(struct device *dev)\n+static struct iommu_domain *riscv_iommu_domain_alloc_paging_flags(\n+\t\tstruct device *dev, u32 flags,\n+\t\tconst struct iommu_user_data *user_data)\n {\n+\tconst bool second_stage = flags &\n+\t\t(IOMMU_HWPT_ALLOC_NEST_PARENT | IOMMU_HWPT_ALLOC_DIRTY_TRACKING);\n \tstruct pt_iommu_riscv_64_cfg cfg = {};\n \tstruct riscv_iommu_domain *domain;\n \tstruct riscv_iommu_device *iommu;\n \tint ret;\n \n+\tif (user_data)\n+\t\treturn ERR_PTR(-EOPNOTSUPP);\n+\n \tiommu = dev_to_iommu(dev);\n-\tif (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV57) {\n-\t\tcfg.common.hw_max_vasz_lg2 = 57;\n-\t} else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV48) {\n-\t\tcfg.common.hw_max_vasz_lg2 = 48;\n-\t} else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV39) {\n-\t\tcfg.common.hw_max_vasz_lg2 = 39;\n+\n+\tif (second_stage) {\n+\t\t/*\n+\t\t * Second-stage (iohgatp) page table for KVM VFIO device\n+\t\t * pass-through and dirty tracking. The GPA space is 2 bits\n+\t\t * wider than the corresponding first-stage VA space (x4 root\n+\t\t * page table), so hw_max_vasz_lg2 values are 41/50/59.\n+\t\t */\n+\t\tif (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV57X4) {\n+\t\t\tcfg.common.hw_max_vasz_lg2 = 59;\n+\t\t} else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV48X4) {\n+\t\t\tcfg.common.hw_max_vasz_lg2 = 50;\n+\t\t} else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV39X4) {\n+\t\t\tcfg.common.hw_max_vasz_lg2 = 41;\n+\t\t} else {\n+\t\t\tdev_err(dev, \"cannot find supported second-stage page table mode\\n\");\n+\t\t\treturn ERR_PTR(-ENODEV);\n+\t\t}\n \t} else {\n-\t\tdev_err(dev, \"cannot find supported page table mode\\n\");\n-\t\treturn ERR_PTR(-ENODEV);\n+\t\tif (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV57) {\n+\t\t\tcfg.common.hw_max_vasz_lg2 = 57;\n+\t\t} else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV48) {\n+\t\t\tcfg.common.hw_max_vasz_lg2 = 48;\n+\t\t} else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV39) {\n+\t\t\tcfg.common.hw_max_vasz_lg2 = 39;\n+\t\t} else {\n+\t\t\tdev_err(dev, \"cannot find supported page table mode\\n\");\n+\t\t\treturn ERR_PTR(-ENODEV);\n+\t\t}\n \t}\n \tcfg.common.hw_max_oasz_lg2 = 56;\n \n@@ -1291,11 +1318,20 @@ static struct iommu_domain *riscv_iommu_alloc_paging_domain(struct device *dev)\n \tdomain->riscvpt.iommu.nid = dev_to_node(iommu->dev);\n \tdomain->domain.ops = &riscv_iommu_paging_domain_ops;\n \n-\tdomain->pscid = ida_alloc_range(&riscv_iommu_pscids, 1,\n-\t\t\t\t\tRISCV_IOMMU_MAX_PSCID, GFP_KERNEL);\n-\tif (domain->pscid < 0) {\n-\t\triscv_iommu_free_paging_domain(&domain->domain);\n-\t\treturn ERR_PTR(-ENOMEM);\n+\tif (second_stage) {\n+\t\tdomain->gscid = ida_alloc_range(&riscv_iommu_gscids, 1,\n+\t\t\t\t\t\tRISCV_IOMMU_MAX_GSCID, GFP_KERNEL);\n+\t\tif (domain->gscid < 0) {\n+\t\t\triscv_iommu_free_paging_domain(&domain->domain);\n+\t\t\treturn ERR_PTR(-ENOMEM);\n+\t\t}\n+\t} else {\n+\t\tdomain->pscid = ida_alloc_range(&riscv_iommu_pscids, 1,\n+\t\t\t\t\t\tRISCV_IOMMU_MAX_PSCID, GFP_KERNEL);\n+\t\tif (domain->pscid < 0) {\n+\t\t\triscv_iommu_free_paging_domain(&domain->domain);\n+\t\t\treturn ERR_PTR(-ENOMEM);\n+\t\t}\n \t}\n \n \tret = pt_iommu_riscv_64_init(&domain->riscvpt, &cfg, GFP_KERNEL);\n@@ -1439,7 +1475,7 @@ static const struct iommu_ops riscv_iommu_ops = {\n \t.identity_domain = &riscv_iommu_identity_domain,\n \t.blocked_domain = &riscv_iommu_blocking_domain,\n \t.release_domain = &riscv_iommu_blocking_domain,\n-\t.domain_alloc_paging = riscv_iommu_alloc_paging_domain,\n+\t.domain_alloc_paging_flags = riscv_iommu_domain_alloc_paging_flags,\n \t.device_group = riscv_iommu_device_group,\n \t.probe_device = riscv_iommu_probe_device,\n \t.release_device\t= riscv_iommu_release_device,\n",
    "prefixes": [
        "RFC",
        "06/11"
    ]
}