Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2229440,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229440/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260428-t_power_on_fux-v5-3-f1ef926a91ff@oss.qualcomm.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260428-t_power_on_fux-v5-3-f1ef926a91ff@oss.qualcomm.com>",
    "date": "2026-04-28T08:37:17",
    "name": "[v5,3/3] PCI: qcom: Program T_POWER_ON",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "b9310c122a34479aebb0078c9e7063ecadcbe08d",
    "submitter": {
        "id": 89908,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/89908/?format=api",
        "name": "Krishna Chaitanya Chundru",
        "email": "krishna.chundru@oss.qualcomm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260428-t_power_on_fux-v5-3-f1ef926a91ff@oss.qualcomm.com/mbox/",
    "series": [
        {
            "id": 501799,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/501799/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501799",
            "date": "2026-04-28T08:37:15",
            "name": "PCI: qcom: Program T_POWER_ON value for L1.2 exit timing",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/501799/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2229440/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2229440/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-53315-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=UyjygCdQ;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=FVB9o5YK;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-53315-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"UyjygCdQ\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"FVB9o5YK\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.168.131",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"
        ],
        "Received": [
            "from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4Z4K0W9lz1yHv\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 18:54:25 +1000 (AEST)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 7324E3068500\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 08:39:18 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 4654F3DC4D1;\n\tTue, 28 Apr 2026 08:37:42 +0000 (UTC)",
            "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 074703DC4A1\n\tfor <linux-pci@vger.kernel.org>; Tue, 28 Apr 2026 08:37:41 +0000 (UTC)",
            "from pps.filterd (m0279863.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63S21irZ3123758\n\tfor <linux-pci@vger.kernel.org>; Tue, 28 Apr 2026 08:37:40 GMT",
            "from mail-pl1-f200.google.com (mail-pl1-f200.google.com\n [209.85.214.200])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dt5qgmm6v-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-pci@vger.kernel.org>; Tue, 28 Apr 2026 08:37:40 +0000 (GMT)",
            "by mail-pl1-f200.google.com with SMTP id\n d9443c01a7336-2b465bf993cso114179365ad.1\n        for <linux-pci@vger.kernel.org>; Tue, 28 Apr 2026 01:37:40 -0700 (PDT)",
            "from hu-krichai-hyd.qualcomm.com ([202.46.23.25])\n        by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b97acaaa2asm21645315ad.84.2026.04.28.01.37.35\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Tue, 28 Apr 2026 01:37:38 -0700 (PDT)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777365462; cv=none;\n b=IBIXrY5eCjmvzRsewF2IdbCkG1pSZY6HKW/nRM4rLCvxDgkg0R3XjDHVqZ0yK8PLWb7YognXNFe+FCwnXt83h/dY0cO5DKH9rw2Ksx3csWUHugD4QIULw+xuUUEiub29jOX0sLFPBnKToB0a1PUyF3IGNi8PBxMhX0uIbGpRTwM=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777365462; c=relaxed/simple;\n\tbh=vt5YE7wXt9WaDQtNgVd28OtMNl95FIkNup1m283AaoU=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=ZGuYsa6ajBVh+TZCwnMOfqh/VsXpt89u30v5Kp1Yynq/nmdVK/bXGZycGFUF8hnDKo+SLK5N2lQimojzHyI2E+NDOQhN0yslAQJEV5S8c0CVoHfp9RSzVGrF4gGNDX7tJ9mhF1+hy5gOKYfJssUuk9cs57jdtgpJtMMHvl1g8vM=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=UyjygCdQ;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=FVB9o5YK; arc=none smtp.client-ip=205.220.168.131",
        "DKIM-Signature": [
            "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n\t2Tj44f4tU9rPyjpStS2CB8zxmonpsjSFqeb8FHEyg4c=; b=UyjygCdQFVfTGaGk\n\to25zaijW7QQfU15HqhrTP3j6oTx3xGqDpS/ehgfpM+oIPStUcRQsKfeEWaoJohMd\n\ttFXdaqu3RVEIvvb9wbwW/4uXF/Tt8uTZlCMouW7KVbXnogJhTatwrjgWGu9ZInoy\n\t/NgPtRdXGPO65IYbT/JvcOwnwTpfS2NlQQNmrVJVYVuTGthcubAJaUV9v9dDya2w\n\tB6QXE/gdIk+OeSMR+25XcNG3sPYUVFb72Igne2lTK0dEClgtsYWLh3KMbQs1qM/A\n\thB4JtYyiSbL8TU750SRDneJehjhIF23mCrjYy6IDJE2z9nLMxiiRmKujb+z4h2EA\n\tG+1z3Q==",
            "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=oss.qualcomm.com; s=google; t=1777365460; x=1777970260;\n darn=vger.kernel.org;\n        h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n         :mime-version:subject:date:from:from:to:cc:subject:date:message-id\n         :reply-to;\n        bh=2Tj44f4tU9rPyjpStS2CB8zxmonpsjSFqeb8FHEyg4c=;\n        b=FVB9o5YK8OKv2Swd6JJn0e8BoP+GfldsAqKYWIf4dbN/Ez8gjoVMA/ZBLP8s2zkO84\n         rOn0Q7mjLcZbctWH85ODwCEXzOvYlINL2ADhh/XXjdR/scK6icdGTiHHjPqtDvxk84O0\n         mf72AIdFMdCPP3KJQ65Oxazjax8uAAqFIdmHGRuSYMX1u2RZrpMjzZQLqwrV3w0+tU5n\n         P7FrN59aM5JUf/G1w5YDTI+no4wa7FPh0MTu/fziiPWoiPHrVMDOg8Qp3beF9//RuX9z\n         bDpjXj4VXOWAWHVQH3/GI4ujPRXzrgm2X3HXSTUMYQvdPa5TSF77HPjNy+odlnqJXIpS\n         1WAw=="
        ],
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1777365460; x=1777970260;\n        h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n         :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to\n         :cc:subject:date:message-id:reply-to;\n        bh=2Tj44f4tU9rPyjpStS2CB8zxmonpsjSFqeb8FHEyg4c=;\n        b=beVuRDWAqBW+hXflERzT3V0SpJWhVB/qd5tqPQvY/L+wDKB3mq9iDLzOhupVL7ZIom\n         XScNNXuWnRIGAYRI9ju3GuMQt+bPl2NV7NR6bJTIn5k70zmAG/E2weNsL+xrfKdsnjCN\n         XCEp69cJkD/3JwpgEfDxXLIowhg4mukBHwDF1YtoBaoAaPnXCSPwRRV7GyL29RvLYuMK\n         iTyZ0AsCxBQcTIy4IPyiuUnFLRURJ1W0ZEIlTAS2gLdwSbbjZH4h/dqvfw1JMzEstzcG\n         gLg1Pj/YDS4iHSSAg4CrpPRF76xZ5nK8JKhXtclj3aVymFO35xyuCWd3Md/4YBQkZVzO\n         PXBQ==",
        "X-Gm-Message-State": "AOJu0YwnOCexvRn7rmvWkdUXzprw/J4kNxAhjQGW6fSH9CduOx0zdKlK\n\tCX0BcxNhsCW4/YpkhiKUib7FGLL/HW8/stkmmZMv6xEmMKUVWBx5L9inQ4hE0v0cSsG/bgpJWfm\n\tXTK6dyze5CRLlqqL3MRhjIVFKIhRdaMFFYHdrLJzhuyNMMF5GHIbigds1qhYNxFQ=",
        "X-Gm-Gg": "AeBDiev4cfldJ8y74jGeb8nfhDzbciXZxEIR8NyA2Y2y8d3eVIOFN+dk5g63Rkju/pR\n\tGv0p6kuq85e4/bvcXkogWEazbahcv7aYf6IwydGs2Gg7QtnX6VaZ2r37tlRXQ3TNRcD5l7XB/XT\n\tFx6YdOQtS9pz1DMvbeqYvdDE5HRha3BRE1GLWoCJqVhSVwyG1vJhSl9vjwkATqfarQIMLHZSgNz\n\tl9PgvSplVs2Wy6m8zSDxuMyZbadumiAjlLnpUMdEnH80jQ4kSg3LXIt1LT8+tC9GLJv2XCpP5Me\n\tDzR2Esterce/PEse68LAhT26mtWUGmbcNAdmRIChGO4+4/aIihvkgzKoCdmMuQNfFE8+L6OvJcc\n\tRC8UxEZTx7D+NmV3nqlwHo6HfBHlDyr/+TTlm6ubiy0GNx45cwfhoi+LFGIq0N4H4JMk=",
        "X-Received": [
            "by 2002:a17:902:f785:b0:2b0:608d:d8a8 with SMTP id\n d9443c01a7336-2b97c3a2264mr22624975ad.1.1777365459625;\n        Tue, 28 Apr 2026 01:37:39 -0700 (PDT)",
            "by 2002:a17:902:f785:b0:2b0:608d:d8a8 with SMTP id\n d9443c01a7336-2b97c3a2264mr22624595ad.1.1777365459144;\n        Tue, 28 Apr 2026 01:37:39 -0700 (PDT)"
        ],
        "From": "Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>",
        "Date": "Tue, 28 Apr 2026 14:07:17 +0530",
        "Subject": "[PATCH v5 3/3] PCI: qcom: Program T_POWER_ON",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "7bit",
        "Message-Id": "<20260428-t_power_on_fux-v5-3-f1ef926a91ff@oss.qualcomm.com>",
        "References": "<20260428-t_power_on_fux-v5-0-f1ef926a91ff@oss.qualcomm.com>",
        "In-Reply-To": "<20260428-t_power_on_fux-v5-0-f1ef926a91ff@oss.qualcomm.com>",
        "To": "Manivannan Sadhasivam <mani@kernel.org>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>",
        "Cc": "linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n        linux-kernel@vger.kernel.org, mayank.rana@oss.qualcomm.com,\n        quic_vbadigan@quicinc.com,\n        Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>",
        "X-Mailer": "b4 0.15.2",
        "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777365442; l=2457;\n i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id;\n bh=vt5YE7wXt9WaDQtNgVd28OtMNl95FIkNup1m283AaoU=;\n b=FidNjQAujwlIm+A0h9RRZoa+4kbabjKGMaKc/8qzpAWtr5be0ilcW7O8gNKHjqgkVJdYTVUp8\n m4yODhxBGK5BiIwXU1YNdyAkA7CQCn0yW94tbTr3DKKNJkMmI1OVlvO",
        "X-Developer-Key": "i=krishna.chundru@oss.qualcomm.com; a=ed25519;\n pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg=",
        "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDI4MDA3OSBTYWx0ZWRfX3lKT2yQyAyCl\n S9KjCY9jxylLf60PmOEtIn2vDBIJhjH5Ir/j8Y4MPdKEKqxq1pmkpEFDryb4eNqOeV3qPHU81Hs\n DpMAzb+1qnTMS/Y+5ZDHrcJ4zH4YrS7YJw8M3WHGEQIjiHXHuleFhjWhyTYzzt0O1QSUdpicV9K\n QX978utEID4ZE3sqzlDjrnqrfp6lKcS2DcgRuZlHqkezWmdHKxnGtzpIz5WKagb0i8e3gRRXyHU\n WSQU2W3cdUe4Hapael6K3Bp5ovkPS+7nsYOgsswXbuK41ekRakRUhedrA8fZkTp88O3aShj9vAy\n wHQxzY+nfV0ROfX2FqwflhNpj3f1BJqTzOdvJ8+HDI5X4jhcu1VbHG3TLnXHNZ7tQPcWgCc+cSu\n d76ULZMIZe2/3Y03rg+BejQA+9P3O15UCj66hCiKkaofDu4mk2xaS1n3jnOuLhs+3ZqaanSra7U\n 379DmakLQFXhWpmsP2A==",
        "X-Authority-Analysis": "v=2.4 cv=V69NF+ni c=1 sm=1 tr=0 ts=69f071d4 cx=c_pps\n a=IZJwPbhc+fLeJZngyXXI0A==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22\n a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=wXczfBY3881IDOTkNB0A:9 a=QEXdDO2ut3YA:10\n a=uG9DUKGECoFWVXl0Dc02:22",
        "X-Proofpoint-GUID": "Nepu06I3sx-hguotE_MgAC6xabPPlVWI",
        "X-Proofpoint-ORIG-GUID": "Nepu06I3sx-hguotE_MgAC6xabPPlVWI",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-28_02,2026-04-21_02,2025-10-01_01",
        "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 clxscore=1015 suspectscore=0 adultscore=0 spamscore=0\n phishscore=0 priorityscore=1501 bulkscore=0 impostorscore=0\n lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000\n definitions=main-2604280079"
    },
    "content": "Some platforms have incorrect T_POWER_ON value programmed in hardware.\nGenerally these will be corrected by bootloaders, but not all targets\nsupport bootloaders to program correct values due to that\nLTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which\ncan result in improper L1.2 exit behavior and if AER happens to be\nsupported and enabled, the error may be *reported* via AER.\n\nParse \"t-power-on-us\" property from each root port node and program them\nas part of host initialization using dw_pcie_program_t_power_on() before\nlink training.\n\nThis property in added to the dtschema here[1].\n\nSigned-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>\nLink[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/\n---\n drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++++++++++\n 1 file changed, 14 insertions(+)",
    "diff": "diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c\nindex af6bf5cce65b..4864e152625a 100644\n--- a/drivers/pci/controller/dwc/pcie-qcom.c\n+++ b/drivers/pci/controller/dwc/pcie-qcom.c\n@@ -269,6 +269,7 @@ struct qcom_pcie_perst {\n struct qcom_pcie_port {\n \tstruct list_head list;\n \tstruct phy *phy;\n+\tu32 l1ss_t_power_on;\n \tstruct list_head perst;\n };\n \n@@ -1288,6 +1289,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)\n \treturn 0;\n }\n \n+static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)\n+{\n+\tstruct qcom_pcie_port *port;\n+\n+\tlist_for_each_entry(port, &pcie->ports, list)\n+\t\tdw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);\n+}\n+\n static int qcom_pcie_host_init(struct dw_pcie_rp *pp)\n {\n \tstruct dw_pcie *pci = to_dw_pcie_from_pp(pp);\n@@ -1322,6 +1331,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)\n \tdw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);\n \tdw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);\n \n+\tqcom_pcie_configure_ports(pcie);\n+\n \tqcom_pcie_perst_deassert(pcie);\n \n \tif (pcie->cfg->ops->config_sid) {\n@@ -1764,6 +1775,9 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node\n \tif (ret)\n \t\treturn ret;\n \n+\t/* TODO: Need to move to DWC core once multi Root Port support is added.  */\n+\tof_property_read_u32(node, \"t-power-on-us\", &port->l1ss_t_power_on);\n+\n \tport->phy = phy;\n \tINIT_LIST_HEAD(&port->list);\n \tlist_add_tail(&port->list, &pcie->ports);\n",
    "prefixes": [
        "v5",
        "3/3"
    ]
}