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GET /api/1.1/patches/2229400/?format=api
{ "id": 2229400, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229400/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260428-a9-pinctrl-v1-2-cd611bb5f52d@amlogic.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260428-a9-pinctrl-v1-2-cd611bb5f52d@amlogic.com>", "date": "2026-04-28T08:22:49", "name": "[2/2] pinctrl: meson: support amlogic A9 SoC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "14309e7a72691305b9d059416f632422efcf6d41", "submitter": { "id": 87655, "url": "http://patchwork.ozlabs.org/api/1.1/people/87655/?format=api", "name": "Xianwei Zhao via B4 Relay", "email": "devnull+xianwei.zhao.amlogic.com@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260428-a9-pinctrl-v1-2-cd611bb5f52d@amlogic.com/mbox/", "series": [ { "id": 501792, "url": "http://patchwork.ozlabs.org/api/1.1/series/501792/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501792", "date": "2026-04-28T08:22:49", "name": "pinctrl: add support amlogic a9", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501792/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229400/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229400/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35659-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=klZST4EV;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35659-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"klZST4EV\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4YPb5WYMz1yHv\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 18:24:19 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 33DC83012206\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 08:23:01 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 860033D47A6;\n\tTue, 28 Apr 2026 08:22:55 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 284493D349F;\n\tTue, 28 Apr 2026 08:22:55 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPS id E4E87C2BCF5;\n\tTue, 28 Apr 2026 08:22:54 +0000 (UTC)", "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id D7BD5FF886D;\n\tTue, 28 Apr 2026 08:22:54 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777364575; cv=none;\n b=h+R3PpG9156FqCgNF5cua2fTX85MpMZa51zIZ15KAM49MWAUy2fNlFAfb8h66hPht2+z3acUkddZiiWiT9OYcMFsHkvh0HQ/z/dS3nYdcqbVjop3FoKTXtURa8kA1Ti40UNmxZYKO0Rov5CWWwbGZdO41to+e5UktrLJWWxPC8s=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777364575; c=relaxed/simple;\n\tbh=J7eh+XFrs78utGECZ29cgpAbZ3KJfDOdBszbElZ49jY=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=IPQEsgAr9E5TxxagUvFwift4/jfKejTKqm8L0oERhpcR4SYLeij7YVu1aDdBFw4oPxiTdMA6eUqRvl7SkXSynvX6db5uHA1k7ofVjB2DDjKW6hmHsQRFxhFawSnhSVUWZukmmTMS5kggowFfen1rAprG+H4BUGISMzZ/QRXYzqI=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=klZST4EV; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777364574;\n\tbh=J7eh+XFrs78utGECZ29cgpAbZ3KJfDOdBszbElZ49jY=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=klZST4EVDCkCSERgxKJjmaghR7SS3M6PCM3VxfzV6EmLaj9RfxSpSV5sfWZ0Gcccu\n\t MRbQ3yElKf5P2a9Tx2AYv007AqyrFy5TXznuLH4rHNBxyPP1jC2nXfXljvKm3mQ50/\n\t bpy5nQMVz0cBsQgUsCqLdsmRDbWvxeFOunvQODGlLHtqPgzZ4Ejz0r1a7XBIUYfcss\n\t ne6Q9kwtxKh+qzBg+xd8aEO1Li9vAJcnvJh304F8Iich4IF2dPoNcnk7D9M/NKz0l3\n\t Z6mqfHMif4be2wa4ZbXUTzNnlEmc9qp2VX2T5Xkf9X7b54xWzywFUdOZrTXiXB5BDs\n\t 1mqMV1WAN8TEg==", "From": "Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@kernel.org>", "Date": "Tue, 28 Apr 2026 08:22:49 +0000", "Subject": "[PATCH 2/2] pinctrl: meson: support amlogic A9 SoC", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260428-a9-pinctrl-v1-2-cd611bb5f52d@amlogic.com>", "References": "<20260428-a9-pinctrl-v1-0-cd611bb5f52d@amlogic.com>", "In-Reply-To": "<20260428-a9-pinctrl-v1-0-cd611bb5f52d@amlogic.com>", "To": "Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Kevin Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>,\n Martin Blumenstingl <martin.blumenstingl@googlemail.com>", "Cc": "linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-arm-kernel@lists.infradead.org,\n Xianwei Zhao <xianwei.zhao@amlogic.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777364572; l=4554;\n i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id;\n bh=VUhEj9cKp+FmG7e6Zp2Dxko9ciBXVboEUbRooKfNrpU=;\n b=yqNFNjMSqcesmpLiPuDXeRbBy/kyQ64rWB4GCE6Y1F9HzNjtF9tMcqRjKm2T6SYiQXA5K4XnE\n L6M8w8ghn7uCK4j8bVwg/ZUoZXuyIRAM6s+UyTk/ofXLLYIXcRuWjX4", "X-Developer-Key": "i=xianwei.zhao@amlogic.com; a=ed25519;\n pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k=", "X-Endpoint-Received": "by B4 Relay for xianwei.zhao@amlogic.com/20251216 with\n auth_id=578", "X-Original-From": "Xianwei Zhao <xianwei.zhao@amlogic.com>", "Reply-To": "xianwei.zhao@amlogic.com" }, "content": "From: Xianwei Zhao <xianwei.zhao@amlogic.com>\n\nIn Amlogic A9 SoC, subordinate bank reuse other master bank is\nnot from bit0, and subordinate bank reuse multi master banks.\n\nThis submission implements this situation.\n\nSigned-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>\n---\n drivers/pinctrl/meson/pinctrl-amlogic-a4.c | 61 +++++++++++++++++++++++++++---\n 1 file changed, 56 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-a4.c b/drivers/pinctrl/meson/pinctrl-amlogic-a4.c\nindex e2293a872dcb..256d9787f004 100644\n--- a/drivers/pinctrl/meson/pinctrl-amlogic-a4.c\n+++ b/drivers/pinctrl/meson/pinctrl-amlogic-a4.c\n@@ -55,14 +55,18 @@ struct aml_pio_control {\n * partial bank(subordinate) pins mux config use other bank(main) mux registgers\n * m_bank_id:\tthe main bank which pin_id from 0, but register bit not from bit 0\n * m_bit_offs:\tbit offset the main bank mux register\n+ * s_bit_offs:\tstart bit that subordinate bank use mux register\n * sid: start pin_id of subordinate bank\n * eid: end pin_id of subordinate bank\n+ * next:\tsubordinate bank reused multiple other bank groups.\n */\n struct multi_mux {\n \tunsigned int m_bank_id;\n \tunsigned int m_bit_offs;\n+\tunsigned int s_bit_offs;\n \tunsigned int sid;\n \tunsigned int eid;\n+\tconst struct multi_mux *next;\n };\n \n struct aml_pctl_data {\n@@ -124,12 +128,51 @@ static const char *aml_bank_name[31] = {\n \"GPIOCC\", \"TEST_N\", \"ANALOG\"\n };\n \n+static const struct multi_mux multi_mux_a9[] = {\n+\t{\n+\t\t.m_bank_id = AMLOGIC_GPIO_C,\n+\t\t.m_bit_offs = 4,\n+\t\t.s_bit_offs = 0,\n+\t\t.sid = (AMLOGIC_GPIO_D << 8) + 16,\n+\t\t.eid = (AMLOGIC_GPIO_D << 8) + 16,\n+\t\t.next = &multi_mux_a9[1],\n+\t}, {\n+\t\t.m_bank_id = AMLOGIC_GPIO_AO,\n+\t\t.m_bit_offs = 0,\n+\t\t.s_bit_offs = 52,\n+\t\t.sid = (AMLOGIC_GPIO_D << 8) + 17,\n+\t\t.eid = (AMLOGIC_GPIO_D << 8) + 17,\n+\t\t.next = NULL,\n+\t}, {\n+\t\t.m_bank_id = AMLOGIC_GPIO_A,\n+\t\t.m_bit_offs = 0,\n+\t\t.s_bit_offs = 80,\n+\t\t.sid = (AMLOGIC_GPIO_Y << 8) + 8,\n+\t\t.eid = (AMLOGIC_GPIO_Y << 8) + 9,\n+\t\t.next = NULL,\n+\t}, {\n+\t\t.m_bank_id = AMLOGIC_GPIO_CC,\n+\t\t.m_bit_offs = 24,\n+\t\t.s_bit_offs = 0,\n+\t\t.sid = (AMLOGIC_GPIO_X << 8) + 16,\n+\t\t.eid = (AMLOGIC_GPIO_X << 8) + 17,\n+\t\t.next = NULL,\n+\t},\n+};\n+\n+static const struct aml_pctl_data a9_priv_data = {\n+\t.number = ARRAY_SIZE(multi_mux_a9),\n+\t.p_mux = multi_mux_a9,\n+};\n+\n static const struct multi_mux multi_mux_s7[] = {\n \t{\n \t\t.m_bank_id = AMLOGIC_GPIO_CC,\n \t\t.m_bit_offs = 24,\n+\t\t.s_bit_offs = 0,\n \t\t.sid = (AMLOGIC_GPIO_X << 8) + 16,\n \t\t.eid = (AMLOGIC_GPIO_X << 8) + 19,\n+\t\t.next = NULL,\n \t},\n };\n \n@@ -142,13 +185,17 @@ static const struct multi_mux multi_mux_s6[] = {\n \t{\n \t\t.m_bank_id = AMLOGIC_GPIO_CC,\n \t\t.m_bit_offs = 24,\n+\t\t.s_bit_offs = 0,\n \t\t.sid = (AMLOGIC_GPIO_X << 8) + 16,\n \t\t.eid = (AMLOGIC_GPIO_X << 8) + 19,\n+\t\t.next = NULL,\n \t}, {\n \t\t.m_bank_id = AMLOGIC_GPIO_F,\n \t\t.m_bit_offs = 4,\n+\t\t.s_bit_offs = 0,\n \t\t.sid = (AMLOGIC_GPIO_D << 8) + 6,\n \t\t.eid = (AMLOGIC_GPIO_D << 8) + 6,\n+\t\t.next = NULL,\n \t},\n };\n \n@@ -177,31 +224,34 @@ static int aml_pctl_set_function(struct aml_pinctrl *info,\n \tstruct aml_gpio_bank *bank = gpio_chip_to_bank(range->gc);\n \tunsigned int shift;\n \tint reg;\n-\tint i;\n+\tint i, loop_count;\n \tunsigned int offset = bank->mux_bit_offs;\n \tconst struct multi_mux *p_mux;\n \n \t/* peculiar mux reg set */\n-\tif (bank->p_mux) {\n-\t\tp_mux = bank->p_mux;\n+\tloop_count = 10;\n+\tp_mux = bank->p_mux;\n+\twhile (p_mux && loop_count) {\n \t\tif (pin_id >= p_mux->sid && pin_id <= p_mux->eid) {\n \t\t\tbank = NULL;\n \t\t\tfor (i = 0; i < info->nbanks; i++) {\n \t\t\t\tif (info->banks[i].bank_id == p_mux->m_bank_id) {\n \t\t\t\t\tbank = &info->banks[i];\n-\t\t\t\t\t\tbreak;\n+\t\t\t\t\tbreak;\n \t\t\t\t}\n \t\t\t}\n \n \t\t\tif (!bank || !bank->reg_mux)\n \t\t\t\treturn -EINVAL;\n \n-\t\t\tshift = (pin_id - p_mux->sid) << 2;\n+\t\t\tshift = ((pin_id - p_mux->sid) << 2) + p_mux->s_bit_offs;\n \t\t\treg = (shift / 32) * 4;\n \t\t\toffset = shift % 32;\n \t\t\treturn regmap_update_bits(bank->reg_mux, reg,\n \t\t\t\t\t0xf << offset, (func & 0xf) << offset);\n \t\t}\n+\t\tp_mux = p_mux->next;\n+\t\tloop_count--;\n \t}\n \n \t/* normal mux reg set */\n@@ -1159,6 +1209,7 @@ static int aml_pctl_probe(struct platform_device *pdev)\n \n static const struct of_device_id aml_pctl_of_match[] = {\n \t{ .compatible = \"amlogic,pinctrl-a4\", },\n+\t{ .compatible = \"amlogic,pinctrl-a9\", .data = &a9_priv_data, },\n \t{ .compatible = \"amlogic,pinctrl-s7\", .data = &s7_priv_data, },\n \t{ .compatible = \"amlogic,pinctrl-s6\", .data = &s6_priv_data, },\n \t{ /* sentinel */ }\n", "prefixes": [ "2/2" ] }