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GET /api/1.1/patches/2229222/?format=api
{ "id": 2229222, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229222/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pwm/patch/20260427221155.2144848-19-dakr@kernel.org/", "project": { "id": 38, "url": "http://patchwork.ozlabs.org/api/1.1/projects/38/?format=api", "name": "Linux PWM development", "link_name": "linux-pwm", "list_id": "linux-pwm.vger.kernel.org", "list_email": "linux-pwm@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260427221155.2144848-19-dakr@kernel.org>", "date": "2026-04-27T22:11:16", "name": "[18/24] rust: pci: make Bar lifetime-parameterized", "commit_ref": null, "pull_url": null, "state": "handled-elsewhere", "archived": false, "hash": "b777e569628adeeb12cefb7a84333fda1244b874", "submitter": { "id": 89037, "url": "http://patchwork.ozlabs.org/api/1.1/people/89037/?format=api", "name": "Danilo Krummrich", "email": "dakr@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pwm/patch/20260427221155.2144848-19-dakr@kernel.org/mbox/", "series": [ { "id": 501734, "url": "http://patchwork.ozlabs.org/api/1.1/series/501734/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pwm/list/?series=501734", "date": "2026-04-27T22:10:58", "name": "rust: device: Higher-Ranked Lifetime Types for device drivers", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501734/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229222/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229222/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pwm+bounces-8721-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pwm@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=aHfZXwja;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-pwm+bounces-8721-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"aHfZXwja\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4Hvs039tz1xvV\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 08:16:09 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 964F730253A7\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 22:14:48 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 31FDF3B2FEF;\n\tMon, 27 Apr 2026 22:14:02 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 0BD143ACA6A;\n\tMon, 27 Apr 2026 22:14:01 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id D7A5EC2BCC9;\n\tMon, 27 Apr 2026 22:13:55 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777328042; cv=none;\n b=S7rMJuuRzhyF6A/ovokfYjEw7HxZ/a7LgsV9+LmV7X2x7ztDfEHNyoK4QT4i0UXJCw1RGf2d5rbdLUsyX/DqFftNyeeIOFWp9k3d2PgdYioPr5NMhhYpRT8WjwpW2BNgLHeki/IboJ68GrhbPZ+RJjpM8AnHu3c4lHSSBRVdji0=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777328042; c=relaxed/simple;\n\tbh=XnijSudcWQAapd0374W3K9ATDhBTvKUTXq++FwUr1Nc=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=U1+JxrpBhvI5BazYFjTcJaUd7H0dqJATfvP8vbjMqDJ07geADW4/1fxuNi6mx+yvt3f8o1KdK3C4VYAqmFjiHxw3zdvSBM9Ss1q52X9SHmwjiyXs5eQZzePqfoBjHtqk+07jKwuwuQyGSdPC21RaIsJoELEs3rQVrzD//2Uh80o=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=aHfZXwja; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777328041;\n\tbh=XnijSudcWQAapd0374W3K9ATDhBTvKUTXq++FwUr1Nc=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=aHfZXwjaO1uc4MUkUeMV1jC4RFzG8CO7MSDtbI1XtbRHQrf06dyzI0i05F6kijAZq\n\t Is+160jlrXVeC/mWC4Y6ZmqzWDAJ7e/tSLcZNCg20z7491thkAWCdmh4UlxA7vF9aq\n\t MR3yyVEGFP+pZqJgdMWtzEffcZ5TXD0/U2jO+ytVuL4VjVkLhrZxwL2ZKzQaK1+neq\n\t n97TzPwandrCKrfWwFh7oRuGcF1UCsZ/eG953w28akmWlSKWtppXh9y6m1f2pPSONB\n\t FzcwKUdAUTTy+NK3WfknNrz7+rY1MvYYs8kKqL6Lck1QSy1//BSPuMPCGZ32ET2yQq\n\t znbizWisG8B2w==", "From": "Danilo Krummrich <dakr@kernel.org>", "To": "gregkh@linuxfoundation.org,\n\trafael@kernel.org,\n\tacourbot@nvidia.com,\n\taliceryhl@google.com,\n\tdavid.m.ertman@intel.com,\n\tira.weiny@intel.com,\n\tleon@kernel.org,\n\tviresh.kumar@linaro.org,\n\tm.wilczynski@samsung.com,\n\tukleinek@kernel.org,\n\tbhelgaas@google.com,\n\tkwilczynski@kernel.org,\n\tabdiel.janulgue@gmail.com,\n\trobin.murphy@arm.com,\n\tmarkus.probst@posteo.de,\n\tojeda@kernel.org,\n\tboqun@kernel.org,\n\tgary@garyguo.net,\n\tbjorn3_gh@protonmail.com,\n\tlossin@kernel.org,\n\ta.hindborg@kernel.org,\n\ttmgross@umich.edu", "Cc": "driver-core@lists.linux.dev,\n\tlinux-kernel@vger.kernel.org,\n\tnova-gpu@lists.linux.dev,\n\tdri-devel@lists.freedesktop.org,\n\tlinux-pm@vger.kernel.org,\n\tlinux-pwm@vger.kernel.org,\n\tlinux-pci@vger.kernel.org,\n\trust-for-linux@vger.kernel.org,\n\tDanilo Krummrich <dakr@kernel.org>", "Subject": "[PATCH 18/24] rust: pci: make Bar lifetime-parameterized", "Date": "Tue, 28 Apr 2026 00:11:16 +0200", "Message-ID": "<20260427221155.2144848-19-dakr@kernel.org>", "X-Mailer": "git-send-email 2.54.0", "In-Reply-To": "<20260427221155.2144848-1-dakr@kernel.org>", "References": "<20260427221155.2144848-1-dakr@kernel.org>", "Precedence": "bulk", "X-Mailing-List": "linux-pwm@vger.kernel.org", "List-Id": "<linux-pwm.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pwm+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pwm+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "Convert pci::Bar<SIZE> to pci::Bar<'a, SIZE>, storing &'a Device<Bound>\nto tie the BAR mapping lifetime to the device.\n\niomap_region_sized() now returns Result<Bar<'a, SIZE>> directly instead\nof impl PinInit<Devres<Bar<SIZE>>, Error>.\n\nAdd Bar::into_devres() to consume the bar and register it as a\ndevice-managed resource, returning Devres<Bar<'static, SIZE>>. The\nlifetime is erased to 'static because Devres guarantees the bar does not\nactually outlive the device -- access is revoked on unbind.\n\nSigned-off-by: Danilo Krummrich <dakr@kernel.org>\n---\n drivers/gpu/nova-core/driver.rs | 7 +++--\n rust/kernel/devres.rs | 2 +-\n rust/kernel/pci/io.rs | 50 ++++++++++++++++++---------------\n samples/rust/rust_driver_pci.rs | 5 ++--\n 4 files changed, 35 insertions(+), 29 deletions(-)", "diff": "diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs\nindex 2a17fc99d9b6..149a20748e86 100644\n--- a/drivers/gpu/nova-core/driver.rs\n+++ b/drivers/gpu/nova-core/driver.rs\n@@ -47,7 +47,7 @@ pub(crate) struct NovaCore {\n // DMA addresses. These systems should be quite rare.\n const GPU_DMA_BITS: u32 = 47;\n \n-pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>;\n+pub(crate) type Bar0 = pci::Bar<'static, BAR0_SIZE>;\n \n kernel::pci_device_table!(\n PCI_TABLE,\n@@ -93,8 +93,9 @@ fn probe(\n // other threads of execution.\n unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::<GPU_DMA_BITS>())? };\n \n- let bar = Arc::pin_init(\n- pdev.iomap_region_sized::<BAR0_SIZE>(0, c\"nova-core/bar0\"),\n+ let bar = Arc::new(\n+ pdev.iomap_region_sized::<BAR0_SIZE>(0, c\"nova-core/bar0\")?\n+ .into_devres()?,\n GFP_KERNEL,\n )?;\n \ndiff --git a/rust/kernel/devres.rs b/rust/kernel/devres.rs\nindex 7baabcdb1ad3..6f3c58355d10 100644\n--- a/rust/kernel/devres.rs\n+++ b/rust/kernel/devres.rs\n@@ -305,7 +305,7 @@ pub fn device(&self) -> &Device {\n /// pci, //\n /// };\n ///\n- /// fn from_core(dev: &pci::Device<Core>, devres: Devres<pci::Bar<0x4>>) -> Result {\n+ /// fn from_core(dev: &pci::Device<Core>, devres: Devres<pci::Bar<'_, 0x4>>) -> Result {\n /// let bar = devres.access(dev.as_ref())?;\n ///\n /// let _ = bar.read32(0x0);\ndiff --git a/rust/kernel/pci/io.rs b/rust/kernel/pci/io.rs\nindex ae78676c927f..6116c55412bc 100644\n--- a/rust/kernel/pci/io.rs\n+++ b/rust/kernel/pci/io.rs\n@@ -14,8 +14,7 @@\n Mmio,\n MmioRaw, //\n },\n- prelude::*,\n- sync::aref::ARef, //\n+ prelude::*, //\n };\n use core::{\n marker::PhantomData,\n@@ -146,14 +145,14 @@ impl<'a, S: ConfigSpaceKind> IoKnownSize for ConfigSpace<'a, S> {\n ///\n /// `Bar` always holds an `IoRaw` instance that holds a valid pointer to the start of the I/O\n /// memory mapped PCI BAR and its size.\n-pub struct Bar<const SIZE: usize = 0> {\n- pdev: ARef<Device>,\n+pub struct Bar<'a, const SIZE: usize = 0> {\n+ pdev: &'a Device<device::Bound>,\n io: MmioRaw<SIZE>,\n num: i32,\n }\n \n-impl<const SIZE: usize> Bar<SIZE> {\n- pub(super) fn new(pdev: &Device, num: u32, name: &CStr) -> Result<Self> {\n+impl<'a, const SIZE: usize> Bar<'a, SIZE> {\n+ pub(super) fn new(pdev: &'a Device<device::Bound>, num: u32, name: &CStr) -> Result<Self> {\n let len = pdev.resource_len(num)?;\n if len == 0 {\n return Err(ENOMEM);\n@@ -196,11 +195,7 @@ pub(super) fn new(pdev: &Device, num: u32, name: &CStr) -> Result<Self> {\n }\n };\n \n- Ok(Bar {\n- pdev: pdev.into(),\n- io,\n- num,\n- })\n+ Ok(Bar { pdev, io, num })\n }\n \n /// # Safety\n@@ -219,11 +214,24 @@ unsafe fn do_release(pdev: &Device, ioptr: usize, num: i32) {\n \n fn release(&self) {\n // SAFETY: The safety requirements are guaranteed by the type invariant of `self.pdev`.\n- unsafe { Self::do_release(&self.pdev, self.io.addr(), self.num) };\n+ unsafe { Self::do_release(self.pdev, self.io.addr(), self.num) };\n+ }\n+\n+ /// Consume the `Bar` and register it as a device-managed resource.\n+ ///\n+ /// The returned `Devres<Bar<'static, SIZE>>` can outlive the original lifetime `'a`. Access\n+ /// to the BAR is revoked when the device is unbound.\n+ pub fn into_devres(self) -> Result<Devres<Bar<'static, SIZE>>> {\n+ // SAFETY: Casting to `'static` is sound because `Devres` guarantees the `Bar` does not\n+ // actually outlive the device -- access is revoked and the resource is released when the\n+ // device is unbound.\n+ let bar: Bar<'static, SIZE> = unsafe { core::mem::transmute(self) };\n+ let pdev = bar.pdev;\n+ Devres::new(pdev.as_ref(), bar)\n }\n }\n \n-impl Bar {\n+impl Bar<'_> {\n #[inline]\n pub(super) fn index_is_valid(index: u32) -> bool {\n // A `struct pci_dev` owns an array of resources with at most `PCI_NUM_RESOURCES` entries.\n@@ -231,13 +239,13 @@ pub(super) fn index_is_valid(index: u32) -> bool {\n }\n }\n \n-impl<const SIZE: usize> Drop for Bar<SIZE> {\n+impl<const SIZE: usize> Drop for Bar<'_, SIZE> {\n fn drop(&mut self) {\n self.release();\n }\n }\n \n-impl<const SIZE: usize> Deref for Bar<SIZE> {\n+impl<const SIZE: usize> Deref for Bar<'_, SIZE> {\n type Target = Mmio<SIZE>;\n \n fn deref(&self) -> &Self::Target {\n@@ -252,17 +260,13 @@ impl Device<device::Bound> {\n pub fn iomap_region_sized<'a, const SIZE: usize>(\n &'a self,\n bar: u32,\n- name: &'a CStr,\n- ) -> impl PinInit<Devres<Bar<SIZE>>, Error> + 'a {\n- Devres::new(self.as_ref(), Bar::<SIZE>::new(self, bar, name))\n+ name: &CStr,\n+ ) -> Result<Bar<'a, SIZE>> {\n+ Bar::new(self, bar, name)\n }\n \n /// Maps an entire PCI BAR after performing a region-request on it.\n- pub fn iomap_region<'a>(\n- &'a self,\n- bar: u32,\n- name: &'a CStr,\n- ) -> impl PinInit<Devres<Bar>, Error> + 'a {\n+ pub fn iomap_region<'a>(&'a self, bar: u32, name: &CStr) -> Result<Bar<'a>> {\n self.iomap_region_sized::<0>(bar, name)\n }\n \ndiff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci.rs\nindex 2747beecb5fd..38d639731229 100644\n--- a/samples/rust/rust_driver_pci.rs\n+++ b/samples/rust/rust_driver_pci.rs\n@@ -45,7 +45,7 @@ mod regs {\n pub(super) const END: usize = 0x10;\n }\n \n-type Bar0 = pci::Bar<{ regs::END }>;\n+type Bar0 = pci::Bar<'static, { regs::END }>;\n \n #[derive(Copy, Clone, Debug)]\n struct TestIndex(u8);\n@@ -160,7 +160,8 @@ fn probe(\n pdev.set_master();\n \n Ok(try_pin_init!(Self {\n- bar <- pdev.iomap_region_sized::<{ regs::END }>(0, c\"rust_driver_pci\"),\n+ bar: pdev.iomap_region_sized::<{ regs::END }>(0, c\"rust_driver_pci\")?\n+ .into_devres()?,\n index: *info,\n _: {\n let bar = bar.access(pdev.as_ref())?;\n", "prefixes": [ "18/24" ] }