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GET /api/1.1/patches/2229172/?format=api
{ "id": 2229172, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229172/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427205024.254677-7-superm1@kernel.org/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260427205024.254677-7-superm1@kernel.org>", "date": "2026-04-27T20:50:24", "name": "[v2,6/6] PCI: Put PCIe bridges with downstream devices into D3 at hibernate", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "35c9bfbe16eed287fb02c189783ea608b4c63c0e", "submitter": { "id": 88834, "url": "http://patchwork.ozlabs.org/api/1.1/people/88834/?format=api", "name": "Mario Limonciello (AMD)", "email": "superm1@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427205024.254677-7-superm1@kernel.org/mbox/", "series": [ { "id": 501725, "url": "http://patchwork.ozlabs.org/api/1.1/series/501725/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501725", "date": "2026-04-27T20:50:20", "name": "Improvements to PCI hibernate path", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501725/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229172/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229172/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53258-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=IRboP7d8;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53258-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"IRboP7d8\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4G5d5jvsz1xvV\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 06:54:29 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id D0A483020A49\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 20:51:28 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 78A9939768A;\n\tMon, 27 Apr 2026 20:50:44 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id B03D1396572;\n\tMon, 27 Apr 2026 20:50:41 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id 80F03C19425;\n\tMon, 27 Apr 2026 20:50:38 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777323041; cv=none;\n b=RgoeM1h+fNj5C7ea9QUtxlyKRrOwBxZuF+GsyfzYrBnuunqO03MljTkQMfA92UrwOBe6MuHfH4lRwX80iR7nCt7QAUoYqaEnb8EHTuCzKIjwkcoc832IYq/Py3zeCBlF39GyMJGeaFH7sRLEkGoaV7ddYmImuvef2jxS9kVbgxo=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777323041; c=relaxed/simple;\n\tbh=GL8H8BY8NRdrAifAmpTwvjzlZwOl3aZ/5ExlC2X7Y10=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=IaTTFrcy1yIhhnTXO1UZyLoiuRsOfiWTwd849vuw9qZazJGpwIx9n9+HnYKulmICP94IT4bJkF+3rbuMz6AuMuvSFzmI7/HU28ERFy9Q//dTWiODpbxIbqV7csNMklCSdMC+tg3Zfq51A8l/G4OeimyL6kBfv84LXb9JmJ5IBEY=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=IRboP7d8; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777323039;\n\tbh=GL8H8BY8NRdrAifAmpTwvjzlZwOl3aZ/5ExlC2X7Y10=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=IRboP7d8Yrhhg0Vg5CxvWgGagfQDDHkS9ZvYjSQQUeWS/wL/j6dV2GX5+XeYqOeBx\n\t 6FBJReX/fo5H6H9WIxCo5CE9dza5JfUcOYCb2hJWPBvm1LvmHOYO199zaAZzjBzcJ8\n\t /xHlfm3rdQqDIDDf8Kty1+iei8mgsgTqzuwtMWLzGDR0Y83cCtgEu47ucJqCnKoGWd\n\t KaRnHfOCckc2xU/qW86o8n+zOPwbQOeMo7/wTERfv0V+/WFRNcssfOwWYC34/O4KgY\n\t WHX5XIh8MWnYHVj6sCyNiZsxlyYePu1jRuKMfTrHJrGOnNB8ftkykhne0fVgQxcIX7\n\t KliHMShZPYGMA==", "From": "\"Mario Limonciello (AMD)\" <superm1@kernel.org>", "To": "Bjorn Helgaas <bhelgaas@google.com>,\n\tlinux-pci@vger.kernel.org (open list:PCI SUBSYSTEM)", "Cc": "linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM),\n linux-kernel@vger.kernel.org (open list),\n \"Rafael J . Wysocki\" <rafael@kernel.org>, Lukas Wunner <lukas@wunner.de>,\n linux-pm@vger.kernel.org, \"Mario Limonciello (AMD)\" <superm1@kernel.org>,\n AceLan Kao <acelan.kao@canonical.com>, Kai-Heng Feng <kaihengf@nvidia.com>,\n Mark Pearson <mpearson-lenovo@squebb.ca>,\n Denis Benato <benato.denis96@gmail.com>,\n =?utf-8?q?Merthan_Karaka=C5=9F?= <m3rthn.k@gmail.com>,\n Eric Naim <dnaim@cachyos.org>", "Subject": "[PATCH v2 6/6] PCI: Put PCIe bridges with downstream devices into D3\n at hibernate", "Date": "Mon, 27 Apr 2026 15:50:24 -0500", "Message-ID": "<20260427205024.254677-7-superm1@kernel.org>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260427205024.254677-1-superm1@kernel.org>", "References": "<20260427205024.254677-1-superm1@kernel.org>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit" }, "content": "During suspend, PCIe bridges with downstream devices are transitioned into\na low power state (D3hot or D3cold) depending on platform capabilities.\nHowever, during hibernate, these bridges remain in D0, which can lead to\nunnecessary power consumption.\n\nAlign the hibernate flow with suspend by updating pci_pm_poweroff_noirq()\nto use pci_pm_suspend_noirq_common(). This ensures that PCIe bridges with\nactive downstream devices are properly transitioned to a low power state\nduring hibernate.\n\nThis change introduces a functional update: the hibernate path will now\ninvoke pci_save_state(), and — unless bus-level power management is\nskipped — will transition the bridge into D3hot or D3cold as appropriate.\n\nCc: AceLan Kao <acelan.kao@canonical.com>\nCc: Kai-Heng Feng <kaihengf@nvidia.com>\nCc: Mark Pearson <mpearson-lenovo@squebb.ca>\nCc: Denis Benato <benato.denis96@gmail.com>\nCc: Merthan Karakaş <m3rthn.k@gmail.com>\nTested-by: Eric Naim <dnaim@cachyos.org>\nSigned-off-by: Mario Limonciello (AMD) <superm1@kernel.org>\n---\n drivers/pci/pci-driver.c | 13 +++++++++----\n 1 file changed, 9 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c\nindex 3c82d818ee15b..50eca518493b8 100644\n--- a/drivers/pci/pci-driver.c\n+++ b/drivers/pci/pci-driver.c\n@@ -788,7 +788,7 @@ static void pci_pm_complete(struct device *dev)\n \n #endif /* !CONFIG_PM_SLEEP */\n \n-#if defined(CONFIG_SUSPEND)\n+#if defined(CONFIG_SUSPEND) || defined(CONFIG_HIBERNATE_CALLBACKS)\n /**\n * pci_pm_suspend_noirq_common\n * @pci_dev: pci device\n@@ -834,7 +834,7 @@ static void pci_pm_suspend_noirq_common(struct pci_dev *pci_dev, bool *skip_bus_\n \n \tpci_pm_set_unknown_state(pci_dev);\n }\n-#endif /* CONFIG_SUSPEND */\n+#endif /* CONFIG_SUSPEND || CONFIG_HIBERNATE_CALLBACKS */\n \n #ifdef CONFIG_SUSPEND\n static void pcie_pme_root_status_cleanup(struct pci_dev *pci_dev)\n@@ -1191,6 +1191,8 @@ static int pci_pm_poweroff(struct device *dev)\n \tif (device_may_wakeup(dev) && system_state == SYSTEM_POWER_OFF)\n \t\tdevice_set_wakeup_enable(dev, false);\n \n+\tpci_dev->skip_bus_pm = false;\n+\n \tif (pci_has_legacy_pm_support(pci_dev))\n \t\treturn pci_legacy_suspend(dev, PMSG_HIBERNATE);\n \n@@ -1233,6 +1235,7 @@ static int pci_pm_poweroff_noirq(struct device *dev)\n {\n \tstruct pci_dev *pci_dev = to_pci_dev(dev);\n \tconst struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;\n+\tbool skip_bus_pm = false;\n \n \tif (dev_pm_skip_suspend(dev))\n \t\treturn 0;\n@@ -1254,8 +1257,9 @@ static int pci_pm_poweroff_noirq(struct device *dev)\n \t\t\treturn error;\n \t}\n \n-\tif (!pci_dev->state_saved && pci_power_manageable(pci_dev))\n-\t\tpci_prepare_to_sleep(pci_dev);\n+\tpci_pm_suspend_noirq_common(pci_dev, &skip_bus_pm);\n+\tif (skip_bus_pm)\n+\t\tgoto Fixup;\n \n \t/*\n \t * The reason for doing this here is the same as for the analogous code\n@@ -1264,6 +1268,7 @@ static int pci_pm_poweroff_noirq(struct device *dev)\n \tif (pci_dev->class == PCI_CLASS_SERIAL_USB_EHCI)\n \t\tpci_write_config_word(pci_dev, PCI_COMMAND, 0);\n \n+Fixup:\n \tpci_fixup_device(pci_fixup_suspend_late, pci_dev);\n \n \treturn 0;\n", "prefixes": [ "v2", "6/6" ] }