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GET /api/1.1/patches/2229167/?format=api
{ "id": 2229167, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229167/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427205024.254677-4-superm1@kernel.org/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260427205024.254677-4-superm1@kernel.org>", "date": "2026-04-27T20:50:21", "name": "[v2,3/6] PCI/PM: Split out code from pci_pm_suspend_noirq() into helper", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d7a449b14abe1e4d1b0783bb60550d132122c73a", "submitter": { "id": 88834, "url": "http://patchwork.ozlabs.org/api/1.1/people/88834/?format=api", "name": "Mario Limonciello (AMD)", "email": "superm1@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427205024.254677-4-superm1@kernel.org/mbox/", "series": [ { "id": 501725, "url": "http://patchwork.ozlabs.org/api/1.1/series/501725/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501725", "date": "2026-04-27T20:50:20", "name": "Improvements to PCI hibernate path", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501725/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229167/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229167/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53255-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=Fo/3HMmH;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-53255-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"Fo/3HMmH\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4G1c4C8pz1xvV\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 06:51:00 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 2BEE3302B504\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 20:50:51 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id D7491393DF1;\n\tMon, 27 Apr 2026 20:50:38 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E68D3932DE;\n\tMon, 27 Apr 2026 20:50:37 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id 59FB4C19425;\n\tMon, 27 Apr 2026 20:50:35 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777323037; cv=none;\n b=Lq4TCbBNkTyIukgEFapxOMLBjduKPpgXNfN6qiusm1RLBVDQu8S100XdaqGFFu+oLQ/nsoDkVRWXZUPFaum9rEjS/BZQg5tWT/49+8yvU6eI4pMum4fhq4XWAnEi2+qGFtC4oI+a6Zl0azJqryUqCO56Jcq8iOroxphBOCMr4e0=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777323037; c=relaxed/simple;\n\tbh=5Y464RxfkYaVjfPS8WDmHrw2cCY0IY0otufG9P72hYc=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=RBHubJWBjiO32cZSZrfS6Ue6yyqSc798Rvi4oo/JXIsF0rFXNBTFPxgJ57TQNuRULGpp+1mQuN1b9wZVDsA2XWLgIqfx2r1wkdbFCxE7jQvd9MNmDYdf4igu8UF6lMmGKW54xBZXGQwBkBPwy7RG3xaiswFP8OXn05fxwvbpTVw=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=Fo/3HMmH; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777323036;\n\tbh=5Y464RxfkYaVjfPS8WDmHrw2cCY0IY0otufG9P72hYc=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=Fo/3HMmH7nGH7qiUkAFsdLI21ttLngbBU3V/MW3X/4+Mpy9VMPbDTj+Ifx+gCLPQV\n\t ahEvJOprRPaKfO9MKumU0Q2vyFsWw+kZly0iGYsVNTKIIGDh+t/zjueJzIkZNpba0q\n\t wJqv1ywqIKq3fCrnvBjCzVS7ovLR2wU8rFXIdF+0KNpDfPHgm7X63YSyNVJJ3wuhTA\n\t PLYNNEriSL5Va6O6UE1sZcnKalKeRJzeKt/Z7nxSDb3pEU/TGAVEL3tDFE/W16ZDQW\n\t R3RpBCewYW8mL5PJEt3lXVDdq0GrpXNTmJ1mPuewtE5PBJHeTb4abIvM2L2G1oZcbW\n\t Th63kVwe9ef/g==", "From": "\"Mario Limonciello (AMD)\" <superm1@kernel.org>", "To": "Bjorn Helgaas <bhelgaas@google.com>,\n\tlinux-pci@vger.kernel.org (open list:PCI SUBSYSTEM)", "Cc": "linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM),\n\tlinux-kernel@vger.kernel.org (open list),\n\t\"Rafael J . Wysocki\" <rafael@kernel.org>,\n\tLukas Wunner <lukas@wunner.de>,\n\tlinux-pm@vger.kernel.org,\n\t\"Mario Limonciello (AMD)\" <superm1@kernel.org>,\n\tEric Naim <dnaim@cachyos.org>", "Subject": "[PATCH v2 3/6] PCI/PM: Split out code from pci_pm_suspend_noirq()\n into helper", "Date": "Mon, 27 Apr 2026 15:50:21 -0500", "Message-ID": "<20260427205024.254677-4-superm1@kernel.org>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260427205024.254677-1-superm1@kernel.org>", "References": "<20260427205024.254677-1-superm1@kernel.org>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "In order to unify suspend and hibernate codepaths without code duplication\nthe common code should be in common helpers. Move it from\npci_pm_suspend_noirq() into a helper. No intended functional changes.\n\nTested-by: Eric Naim <dnaim@cachyos.org>\nSigned-off-by: Mario Limonciello (AMD) <superm1@kernel.org>\n---\n drivers/pci/pci-driver.c | 86 +++++++++++++++++++++++++---------------\n 1 file changed, 54 insertions(+), 32 deletions(-)", "diff": "diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c\nindex a43ee7bbfb3f5..bfb521eb0eed7 100644\n--- a/drivers/pci/pci-driver.c\n+++ b/drivers/pci/pci-driver.c\n@@ -788,6 +788,54 @@ static void pci_pm_complete(struct device *dev)\n \n #endif /* !CONFIG_PM_SLEEP */\n \n+#if defined(CONFIG_SUSPEND)\n+/**\n+ * pci_pm_suspend_noirq_common\n+ * @pci_dev: pci device\n+ * @skip_bus_pm: pointer to a boolean indicating whether to skip bus PM\n+ *\n+ * Prepare the device to go into a low power state by saving state and\n+ * deciding whether to skip bus PM.\n+ *\n+ */\n+static void pci_pm_suspend_noirq_common(struct pci_dev *pci_dev, bool *skip_bus_pm)\n+{\n+\tif (!pci_dev->state_saved) {\n+\t\tpci_save_state(pci_dev);\n+\n+\t\t/*\n+\t\t * If the device is a bridge with a child in D0 below it,\n+\t\t * it needs to stay in D0, so check skip_bus_pm to avoid\n+\t\t * putting it into a low-power state in that case.\n+\t\t */\n+\t\tif (!pci_dev->skip_bus_pm && pci_power_manageable(pci_dev))\n+\t\t\tpci_prepare_to_sleep(pci_dev);\n+\t}\n+\n+\tpci_dbg(pci_dev, \"PCI PM: Sleep power state: %s\\n\",\n+\t\tpci_power_name(pci_dev->current_state));\n+\n+\tif (pci_dev->current_state == PCI_D0) {\n+\t\tpci_dev->skip_bus_pm = true;\n+\t\t/*\n+\t\t * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any\n+\t\t * downstream device is in D0, so avoid changing the power state\n+\t\t * of the parent bridge by setting the skip_bus_pm flag for it.\n+\t\t */\n+\t\tif (pci_dev->bus->self)\n+\t\t\tpci_dev->bus->self->skip_bus_pm = true;\n+\t}\n+\n+\tif (pci_dev->skip_bus_pm && pm_suspend_no_platform()) {\n+\t\tpci_dbg(pci_dev, \"PCI PM: Skipped\\n\");\n+\t\t*skip_bus_pm = true;\n+\t\treturn;\n+\t}\n+\n+\tpci_pm_set_unknown_state(pci_dev);\n+}\n+#endif /* CONFIG_SUSPEND */\n+\n #ifdef CONFIG_SUSPEND\n static void pcie_pme_root_status_cleanup(struct pci_dev *pci_dev)\n {\n@@ -877,6 +925,7 @@ static int pci_pm_suspend_noirq(struct device *dev)\n {\n \tstruct pci_dev *pci_dev = to_pci_dev(dev);\n \tconst struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;\n+\tbool skip_bus_pm = false;\n \n \tif (dev_pm_skip_suspend(dev))\n \t\treturn 0;\n@@ -886,7 +935,8 @@ static int pci_pm_suspend_noirq(struct device *dev)\n \n \tif (!pm) {\n \t\tpci_save_state(pci_dev);\n-\t\tgoto set_unknown;\n+\t\tpci_pm_set_unknown_state(pci_dev);\n+\t\tgoto Ehci_workaround;\n \t}\n \n \tif (pm->suspend_noirq) {\n@@ -907,40 +957,12 @@ static int pci_pm_suspend_noirq(struct device *dev)\n \t\t}\n \t}\n \n-\tif (!pci_dev->state_saved) {\n-\t\tpci_save_state(pci_dev);\n-\n-\t\t/*\n-\t\t * If the device is a bridge with a child in D0 below it,\n-\t\t * it needs to stay in D0, so check skip_bus_pm to avoid\n-\t\t * putting it into a low-power state in that case.\n-\t\t */\n-\t\tif (!pci_dev->skip_bus_pm && pci_power_manageable(pci_dev))\n-\t\t\tpci_prepare_to_sleep(pci_dev);\n-\t}\n-\n-\tpci_dbg(pci_dev, \"PCI PM: Suspend power state: %s\\n\",\n-\t\tpci_power_name(pci_dev->current_state));\n+\tpci_pm_suspend_noirq_common(pci_dev, &skip_bus_pm);\n \n-\tif (pci_dev->current_state == PCI_D0) {\n-\t\tpci_dev->skip_bus_pm = true;\n-\t\t/*\n-\t\t * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any\n-\t\t * downstream device is in D0, so avoid changing the power state\n-\t\t * of the parent bridge by setting the skip_bus_pm flag for it.\n-\t\t */\n-\t\tif (pci_dev->bus->self)\n-\t\t\tpci_dev->bus->self->skip_bus_pm = true;\n-\t}\n-\n-\tif (pci_dev->skip_bus_pm && pm_suspend_no_platform()) {\n-\t\tpci_dbg(pci_dev, \"PCI PM: Skipped\\n\");\n+\tif (skip_bus_pm)\n \t\tgoto Fixup;\n-\t}\n-\n-set_unknown:\n-\tpci_pm_set_unknown_state(pci_dev);\n \n+Ehci_workaround:\n \t/*\n \t * Some BIOSes from ASUS have a bug: If a USB EHCI host controller's\n \t * PCI COMMAND register isn't 0, the BIOS assumes that the controller\n", "prefixes": [ "v2", "3/6" ] }