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GET /api/1.1/patches/2229092/?format=api
{ "id": 2229092, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229092/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260427-mainline-send-v1-sending-v2-3-dcaa9178007b@alex-min.fr/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260427-mainline-send-v1-sending-v2-3-dcaa9178007b@alex-min.fr>", "date": "2026-04-27T19:34:49", "name": "[v2,3/8] pinctrl: qcom: Register functions before enabling pinctrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7c293d2eb44162dbaf28c53eeaa4fb00afe6ae2a", "submitter": { "id": 93203, "url": "http://patchwork.ozlabs.org/api/1.1/people/93203/?format=api", "name": "Alexandre MINETTE via B4 Relay", "email": "devnull+contact.alex-min.fr@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260427-mainline-send-v1-sending-v2-3-dcaa9178007b@alex-min.fr/mbox/", "series": [ { "id": 501713, "url": "http://patchwork.ozlabs.org/api/1.1/series/501713/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501713", "date": "2026-04-27T19:34:50", "name": "Add Samsung Galaxy S4 support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501713/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229092/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229092/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35615-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=CLiokm3z;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35615-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"CLiokm3z\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4DMK1kPkz1yHX\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 05:36:13 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 0053D3062C24\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 19:34:54 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 48A5E4218B9;\n\tMon, 27 Apr 2026 19:34:51 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id D9CD53914E9;\n\tMon, 27 Apr 2026 19:34:50 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPS id 9FCA8C2BCB7;\n\tMon, 27 Apr 2026 19:34:50 +0000 (UTC)", "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id 98D52FF8870;\n\tMon, 27 Apr 2026 19:34:50 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777318490; cv=none;\n b=CGTRHhrnU8ASI992jQTnw+dDvOYiTQsPX81at1mI54LPn1XYv5kIYfmXQwGSFikgwWl2w0/5X5icx9MikioT8x6+HwPBHqXR0aArmVKW49z+qkK9m7A4ec5UOOFjSphOioG13A/yRm6+KuXTu64sWyHSbZNMoj7WRjeAPLfjTYE=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777318490; c=relaxed/simple;\n\tbh=7DeREkHBuy3CC/OxlxoJowva/HyNWfGd+W2ZNWZknP8=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=CusYQZQV7+gPjRVJn7IiG0YrW8PAxxm5HGW3X3p3n+tu30BkWc7w19gOHZipLTO7uwMYUu9sPBqRhLhu38lIYBPUB7zuy8lITrCgCUUAIe698J31zKZ6swCn2EyOx3PJWNmlPULP29/yZ9QrRUPa3MCtwLpjaEIExb0e8LHj6Nk=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=CLiokm3z; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777318490;\n\tbh=7DeREkHBuy3CC/OxlxoJowva/HyNWfGd+W2ZNWZknP8=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=CLiokm3zJp5RtPy1k9AdAo6Qo2XAeWOZZdG4XTw9BMfwzG/GL9TCLlQZE6t6DyLCS\n\t Tlx6GS7DvA++YmtmyNAf2KSJVCav75vB7ZC45khsfX6J9gPI87bRxsMhZqEHkdvwr5\n\t SSe6TPZyBIPcMtLOd1oiYsqoHk/ez8fnaYhggXQyPTVrsjwQrViI8/sY1yJyIVduwz\n\t CGwfN6pR/EDxdTeZdqpICkwRJ42/HnfoqVd7FM8X7Kbth4jMX07GGPNuu6/hs6qcP9\n\t tZxmMyVftPLIfhy4Rcxesh7G7pVpynq3L++Cho1PQ64zp+Jaaw5WUKUXUC5tGFx7Wg\n\t vhSWkcp5BVWHA==", "From": "Alexandre MINETTE via B4 Relay <devnull+contact.alex-min.fr@kernel.org>", "Date": "Mon, 27 Apr 2026 21:34:49 +0200", "Subject": "[PATCH v2 3/8] pinctrl: qcom: Register functions before enabling\n pinctrl", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260427-mainline-send-v1-sending-v2-3-dcaa9178007b@alex-min.fr>", "References": "<20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr>", "In-Reply-To": "<20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr>", "To": "Bjorn Andersson <andersson@kernel.org>,\n Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, MyungJoo Ham <myungjoo.ham@samsung.com>,\n Chanwoo Choi <cw00.choi@samsung.com>,\n Guru Das Srinagesh <linux@gurudas.dev>, Linus Walleij <linusw@kernel.org>,\n Rob Clark <robin.clark@oss.qualcomm.com>, Joerg Roedel <joro@8bytes.org>,\n Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>,\n Kees Cook <kees@kernel.org>, Tony Luck <tony.luck@intel.com>,\n \"Guilherme G. Piccoli\" <gpiccoli@igalia.com>", "Cc": "linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,\n iommu@lists.linux.dev, phone-devel@vger.kernel.org,\n Alexandre MINETTE <contact@alex-min.fr>", "X-Mailer": "b4 0.13.0", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777318488; l=2004;\n i=contact@alex-min.fr; s=20260421; h=from:subject:message-id;\n bh=gqK5qmgCceA2ln5R06RBqAB8HOklQ9gk21qwB8S51xo=;\n b=oOWG34jZy36RGXXAHLq5QkZ6h3qiGytJ7F+UT5O5j57647flrE8MXSuHSuDk/C3BpUuYHsd+Y\n 3GNF3MxsuCRB3xQLR/it0HBYwwA+q1E+5mxpRqUbYAGLRKCi+ZAebw3", "X-Developer-Key": "i=contact@alex-min.fr; a=ed25519;\n pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4=", "X-Endpoint-Received": "by B4 Relay for contact@alex-min.fr/20260421 with\n auth_id=743", "X-Original-From": "Alexandre MINETTE <contact@alex-min.fr>", "Reply-To": "contact@alex-min.fr" }, "content": "From: Alexandre MINETTE <contact@alex-min.fr>\n\npinctrl consumers can request states while the pinctrl core enables the\ncontroller. On Qualcomm pinctrl drivers this can happen before the SoC\nfunction list has been registered, which leaves the function table\nincomplete during state lookup.\n\nOn APQ8064 this can fail while claiming pinctrl hogs:\n\n apq8064-pinctrl 800000.pinctrl: invalid function ps_hold in map table\n apq8064-pinctrl 800000.pinctrl: error claiming hogs: -22\n apq8064-pinctrl 800000.pinctrl: could not claim hogs: -22\n\nRegister Qualcomm pinctrl with devm_pinctrl_register_and_init(), add the\nSoC pin functions, and only then enable the pinctrl device.\n\nSigned-off-by: Alexandre MINETTE <contact@alex-min.fr>\n---\n drivers/pinctrl/qcom/pinctrl-msm.c | 15 ++++++++++-----\n 1 file changed, 10 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c\nindex 45b3a2763eb8..a2a1e0835735 100644\n--- a/drivers/pinctrl/qcom/pinctrl-msm.c\n+++ b/drivers/pinctrl/qcom/pinctrl-msm.c\n@@ -1593,11 +1593,11 @@ int msm_pinctrl_probe(struct platform_device *pdev,\n \tpctrl->desc.pins = pctrl->soc->pins;\n \tpctrl->desc.npins = pctrl->soc->npins;\n \n-\tpctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);\n-\tif (IS_ERR(pctrl->pctrl)) {\n-\t\tdev_err(&pdev->dev, \"Couldn't register pinctrl driver\\n\");\n-\t\treturn PTR_ERR(pctrl->pctrl);\n-\t}\n+\tret = devm_pinctrl_register_and_init(&pdev->dev, &pctrl->desc,\n+\t\t\t\t\t pctrl, &pctrl->pctrl);\n+\tif (ret)\n+\t\treturn dev_err_probe(&pdev->dev, ret,\n+\t\t\t\t \"Couldn't register pinctrl driver\\n\");\n \n \tfor (i = 0; i < soc_data->nfunctions; i++) {\n \t\tfunc = &soc_data->functions[i];\n@@ -1607,6 +1607,11 @@ int msm_pinctrl_probe(struct platform_device *pdev,\n \t\t\treturn ret;\n \t}\n \n+\tret = pinctrl_enable(pctrl->pctrl);\n+\tif (ret)\n+\t\treturn dev_err_probe(&pdev->dev, ret,\n+\t\t\t\t \"Couldn't enable pinctrl driver\\n\");\n+\n \tret = msm_gpio_init(pctrl);\n \tif (ret)\n \t\treturn ret;\n", "prefixes": [ "v2", "3/8" ] }