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GET /api/1.1/patches/2228871/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2228871,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228871/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-50-peter.maydell@linaro.org/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260427124738.966578-50-peter.maydell@linaro.org>",
    "date": "2026-04-27T12:47:23",
    "name": "[PULL,49/63] target/arm: migrate Granule Protection traps to registerfields",
    "commit_ref": null,
    "pull_url": null,
    "state": "not-applicable",
    "archived": false,
    "hash": "77041ea755dffc195936be51b771ebf61d6bc317",
    "submitter": {
        "id": 5111,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api",
        "name": "Peter Maydell",
        "email": "peter.maydell@linaro.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-50-peter.maydell@linaro.org/mbox/",
    "series": [
        {
            "id": 501642,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/501642/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501642",
            "date": "2026-04-27T12:46:34",
            "name": "[PULL,01/63] docs/system: add FEAT_AA32 and FEAT_AA64 to emulation list",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/501642/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2228871/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2228871/checks/",
    "tags": {},
    "headers": {
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        "From": "Peter Maydell <peter.maydell@linaro.org>",
        "To": "qemu-devel@nongnu.org",
        "Subject": "[PULL 49/63] target/arm: migrate Granule Protection traps to\n registerfields",
        "Date": "Mon, 27 Apr 2026 13:47:23 +0100",
        "Message-ID": "<20260427124738.966578-50-peter.maydell@linaro.org>",
        "X-Mailer": "git-send-email 2.43.0",
        "In-Reply-To": "<20260427124738.966578-1-peter.maydell@linaro.org>",
        "References": "<20260427124738.966578-1-peter.maydell@linaro.org>",
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    },
    "content": "From: Alex Bennée <alex.bennee@linaro.org>\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nMessage-id: 20260422125250.1303100-10-alex.bennee@linaro.org\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n target/arm/syndrome.h | 30 +++++++++++++++++++++++++++---\n 1 file changed, 27 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h\nindex 6fcf0ac757..bc65106c61 100644\n--- a/target/arm/syndrome.h\n+++ b/target/arm/syndrome.h\n@@ -462,12 +462,36 @@ static inline uint32_t syn_bxjtrap(int cv, int cond, int rm)\n     return res;\n }\n \n+/*\n+ * ISS encoding for a Granule Protection Check exception\n+ *\n+ * These are only reported to EL3\n+ */\n+FIELD(GPC_ISS, xFSC, 0, 6)\n+FIELD(GPC_ISS, WnR, 6, 1) /* Write not Read */\n+FIELD(GPC_ISS, S1PTW, 7, 1)\n+FIELD(GPC_ISS, CM, 8, 1)\n+FIELD(GPC_ISS, VNCR, 13, 1)\n+FIELD(GPC_ISS, GPCSC, 14, 6)\n+FIELD(GPC_ISS, InD, 20, 1) /* Instruction not Data access */\n+FIELD(GPC_ISS, S2PTW, 21, 1)\n+\n static inline uint32_t syn_gpc(int s2ptw, int ind, int gpcsc, int vncr,\n                                int cm, int s1ptw, int wnr, int fsc)\n {\n-    return (EC_GPC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (s2ptw << 21)\n-        | (ind << 20) | (gpcsc << 14) | (vncr << 13) | (cm << 8)\n-        | (s1ptw << 7) | (wnr << 6) | fsc;\n+    uint32_t res = syn_set_ec(0, EC_GPC);\n+    res = FIELD_DP32(res, SYNDROME, IL, 1);\n+\n+    res = FIELD_DP32(res, GPC_ISS, S2PTW, s2ptw);\n+    res = FIELD_DP32(res, GPC_ISS, InD, ind);\n+    res = FIELD_DP32(res, GPC_ISS, GPCSC, gpcsc);\n+    res = FIELD_DP32(res, GPC_ISS, VNCR, vncr);\n+    res = FIELD_DP32(res, GPC_ISS, CM, cm);\n+    res = FIELD_DP32(res, GPC_ISS, S1PTW, s1ptw);\n+    res = FIELD_DP32(res, GPC_ISS, WnR, wnr);\n+    res = FIELD_DP32(res, GPC_ISS, xFSC, fsc);\n+\n+    return res;\n }\n \n static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)\n",
    "prefixes": [
        "PULL",
        "49/63"
    ]
}