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GET /api/1.1/patches/2228845/?format=api
{ "id": 2228845, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228845/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-38-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260427124738.966578-38-peter.maydell@linaro.org>", "date": "2026-04-27T12:47:11", "name": "[PULL,37/63] Revert \"target/arm: Reinstate bogus AArch32 DBGDTRTX register for migration compat\"", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "7eb134918a2dc21eedd6759b8e598dce459425e9", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-38-peter.maydell@linaro.org/mbox/", "series": [ { "id": 501642, "url": "http://patchwork.ozlabs.org/api/1.1/series/501642/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501642", "date": "2026-04-27T12:46:34", "name": "[PULL,01/63] docs/system: add FEAT_AA32 and FEAT_AA64 to emulation list", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501642/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228845/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228845/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=XhAaqXET;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g43T13Dytz23Zb\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 22:55:33 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wHLQz-0002sh-OP; Mon, 27 Apr 2026 08:51:34 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wHLNy-00087g-WC\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:48:31 -0400", "from mail-wm1-x330.google.com ([2a00:1450:4864:20::330])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wHLNr-0005hI-Up\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:48:25 -0400", "by mail-wm1-x330.google.com with SMTP id\n 5b1f17b1804b1-488af96f6b2so134257745e9.0\n for <qemu-devel@nongnu.org>; Mon, 27 Apr 2026 05:48:15 -0700 (PDT)", "from lanath.. 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We don't need that commit\nanymore as the AArch32 DBGDTRTX register is declared to\nbe safe to ignore in the incoming migration stream.\n\nSigned-off-by: Eric Auger <eric.auger@redhat.com>\nReviewed-by: Sebastian Ott <sebott@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 20260420140552.104369-8-eric.auger@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n target/arm/debug_helper.c | 29 -----------------------------\n 1 file changed, 29 deletions(-)", "diff": "diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c\nindex 352c8e5c8e..8477ca5def 100644\n--- a/target/arm/debug_helper.c\n+++ b/target/arm/debug_helper.c\n@@ -171,13 +171,6 @@ static void dbgclaimclr_write(CPUARMState *env, const ARMCPRegInfo *ri,\n env->cp15.dbgclaim &= ~(value & 0xFF);\n }\n \n-static CPAccessResult access_bogus(CPUARMState *env, const ARMCPRegInfo *ri,\n- bool isread)\n-{\n- /* Always UNDEF, as if this cpreg didn't exist */\n- return CP_ACCESS_UNDEFINED;\n-}\n-\n static const ARMCPRegInfo debug_cp_reginfo[] = {\n /*\n * DBGDRAR, DBGDSAR: always RAZ since we don't implement memory mapped\n@@ -240,28 +233,6 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {\n .opc0 = 2, .opc1 = 3, .crn = 0, .crm = 4, .opc2 = 0,\n .access = PL0_RW, .accessfn = access_tdcc,\n .type = ARM_CP_CONST, .resetvalue = 0 },\n- /*\n- * This is not a real AArch32 register. We used to incorrectly expose\n- * this due to a QEMU bug; to avoid breaking migration compatibility we\n- * need to continue to provide it so that we don't fail the inbound\n- * migration when it tells us about a sysreg that we don't have.\n- * We set an always-fails .accessfn, which means that the guest doesn't\n- * actually see this register (it will always UNDEF, identically to if\n- * there were no cpreg definition for it other than that we won't print\n- * a LOG_UNIMP message about it), and we set the ARM_CP_NO_GDB flag so the\n- * gdbstub won't see it either.\n- * (We can't just set .access = 0, because add_cpreg_to_hashtable()\n- * helpfully ignores cpregs which aren't accessible to the highest\n- * implemented EL.)\n- *\n- * TODO: implement a system for being able to describe \"this register\n- * can be ignored if it appears in the inbound stream\"; then we can\n- * remove this temporary hack.\n- */\n- { .name = \"BOGUS_DBGDTR_EL0\", .state = ARM_CP_STATE_AA32,\n- .cp = 14, .opc1 = 3, .crn = 0, .crm = 5, .opc2 = 0,\n- .access = PL0_RW, .accessfn = access_bogus,\n- .type = ARM_CP_CONST | ARM_CP_NO_GDB, .resetvalue = 0 },\n /*\n * OSECCR_EL1 provides a mechanism for an operating system\n * to access the contents of EDECCR. EDECCR is not implemented though,\n", "prefixes": [ "PULL", "37/63" ] }