Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2228815/?format=api
{ "id": 2228815, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228815/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-7-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260427124738.966578-7-peter.maydell@linaro.org>", "date": "2026-04-27T12:46:40", "name": "[PULL,06/63] hw/arm/fsl-imx8mm: Implemented support for SNVS", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "f86f26c75dfc1b1e5a04da5222ec49e3fea04129", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-7-peter.maydell@linaro.org/mbox/", "series": [ { "id": 501642, "url": "http://patchwork.ozlabs.org/api/1.1/series/501642/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501642", "date": "2026-04-27T12:46:34", "name": "[PULL,01/63] docs/system: add FEAT_AA32 and FEAT_AA64 to emulation list", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501642/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228815/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228815/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=lcFLd+Uj;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g43KV1F54z1yHX\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 22:49:02 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wHLOG-0008ND-TJ; Mon, 27 Apr 2026 08:48:44 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wHLNO-0007m1-BJ\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:47:51 -0400", "from mail-wm1-x329.google.com ([2a00:1450:4864:20::329])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wHLNL-0005TP-04\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:47:50 -0400", "by mail-wm1-x329.google.com with SMTP id\n 5b1f17b1804b1-4891e5b9c1fso86366585e9.2\n for <qemu-devel@nongnu.org>; Mon, 27 Apr 2026 05:47:45 -0700 (PDT)", "from lanath.. (wildly.archaic.org.uk. [81.2.115.145])\n by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-488ffc5e3f4sm448974115e9.2.2026.04.27.05.47.43\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Mon, 27 Apr 2026 05:47:44 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1777294065; x=1777898865; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:from:to:cc:subject:date:message-id\n :reply-to; bh=OaA4SrpRYNI755AyNOvMWIZPb6FG92odJC0438gwgBQ=;\n b=lcFLd+UjWtxoVB2+tfkVLF8nij+CAI1TZuYrXt3BThMncjCEbFzlXBR/ZiOr5k8hwQ\n 65bsRrC2HWVOEFgm292W3CgyHxROAXhhyim7UPLqB1kmP67JiFOYBlDQWv22xACifzs+\n rrYsl4NzN/7fTcx6r71xeOrzamJszI2qCuibkmvrwfGT1Ci3HZ11al6/byMAfA9XlzH1\n 6+exmIyIwRbWQG5/5RPkxrAzIlBVB4n45/1tk5wqyBwK3kGCPu3SHKoOoPSZUVgyWLu2\n ZuMDXKc6c2pwJyQUPdC/LzBuNj8elbJzmlYd+HxP0biIxWrA/RxKlNl+niNqFqsRb/eF\n D48w==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777294065; x=1777898865;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=OaA4SrpRYNI755AyNOvMWIZPb6FG92odJC0438gwgBQ=;\n b=NR0Vk04jaznZkVuDTZyEnmqO6MjUVW0DTuUcF6q3y3zay+4s7++eGw1pjzUCnc/5Y+\n F5ttu04ylCXVzJgZhy8g5kGnlRgaZahYWPzDTrOhNEVL9MoGG4FfNd88Noo+yIOQ3oBF\n fXwUfjLEZTtJZRcfMjQo+oy+gfyms1H5YjrYzItvKEmGk9SePNmGBL09zma+fSg3CVdq\n Hj46TPqOzqrAIljGFePEPq677udUGyaoRhwxdbagIxHqBxBUa4HVtvl9/1W61XMiGbdO\n bxpvMC7lX/o5DUR4HRks9LpSi6/gJuO6rc2U/Z1oVAGw2olTXY0Hm1B/RwU+pTGLKxHT\n jr6w==", "X-Gm-Message-State": "AOJu0YyXEB+abhY4c6dd8tP97Oo/BhetCxSZ/gW3q18xqxPaHbcCmXs0\n MxwvBHfnVvlBVi+lfQpAf4olLJL/+Mn1gNYBJpDo7as3iMAt0P1qSG0JbrUIEXYZaNDBQ5jqx1t\n AVmr+", "X-Gm-Gg": "AeBDies6flJc2vrRz5hxxlwxjMNuOjPlPvVDKRNjYllHjp00ni+eLXMGNrNBLXu0rvI\n JQr6glyN3ITJpDnChOi06mWH04Wi9P0VdwW0Pgm1mCv5MlI4IYGONrha5ekgrxW7UJNvfVmUvRs\n c0VoB//GfcxAUKH1WoVGDEx54bnAoglJhYtOaTeymnmeN73Y5qTIF2yoglkP1DzArmj9J9bysp5\n RBlE2tBRPxwBtVme436+iN5v1tc5vWWR/oHgOdxUnJmnW2nH2A0A8TKV5OUpXFfuRs0+McRuZ+l\n GRW7XrsXPOJUwFWeWbbsuAdl49uJj2Auh9UpR+J6nDVtivwvWn/ky7+gN+qSTBSXl9vTUjorK5A\n PVlpGbuSb04KxRzSz3S3FFIrxJFREl3GShZm8TVo2dixZd5Snc7U3yfvC+Lk5IjQ9DoOjNyVBc1\n 7YX2Ujea8SWSuzjf96KSux1M7gLZh0yaMiiCBWP1LwaxKhf2QmASScMDFrZ8AVgD3LNpRB75QIO\n VF43kyC0KAxUwAqDXdGE130UJfAXd93Yvv/wn9kh8WlF67k4EPw", "X-Received": "by 2002:a05:600c:c0c8:b0:488:ab1d:dcc5 with SMTP id\n 5b1f17b1804b1-488fb787ba3mr442359235e9.27.1777294064663;\n Mon, 27 Apr 2026 05:47:44 -0700 (PDT)", "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 06/63] hw/arm/fsl-imx8mm: Implemented support for SNVS", "Date": "Mon, 27 Apr 2026 13:46:40 +0100", "Message-ID": "<20260427124738.966578-7-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260427124738.966578-1-peter.maydell@linaro.org>", "References": "<20260427124738.966578-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::329;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Gaurav Sharma <gaurav.sharma_7@nxp.com>\n\nSNVS contains an RTC which allows Linux to deal correctly with time\n\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Bernhard Beschow <shentey@gmail.com>\nSigned-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n hw/arm/fsl-imx8mm.c | 10 ++++++++++\n include/hw/arm/fsl-imx8mm.h | 2 ++\n 2 files changed, 12 insertions(+)", "diff": "diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c\nindex 053434412c..8999bc701e 100644\n--- a/hw/arm/fsl-imx8mm.c\n+++ b/hw/arm/fsl-imx8mm.c\n@@ -173,6 +173,8 @@ static void fsl_imx8mm_init(Object *obj)\n \n object_initialize_child(obj, \"analog\", &s->analog, TYPE_IMX8MP_ANALOG);\n \n+ object_initialize_child(obj, \"snvs\", &s->snvs, TYPE_IMX7_SNVS);\n+\n for (i = 0; i < FSL_IMX8MM_NUM_UARTS; i++) {\n g_autofree char *name = g_strdup_printf(\"uart%d\", i + 1);\n object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);\n@@ -355,6 +357,13 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n fsl_imx8mm_memmap[FSL_IMX8MM_OCRAM].addr,\n &s->ocram);\n \n+ /* SNVS */\n+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {\n+ return;\n+ }\n+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0,\n+ fsl_imx8mm_memmap[FSL_IMX8MM_SNVS_HP].addr);\n+\n /* Unimplemented devices */\n for (i = 0; i < ARRAY_SIZE(fsl_imx8mm_memmap); i++) {\n switch (i) {\n@@ -364,6 +373,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n case FSL_IMX8MM_GIC_REDIST:\n case FSL_IMX8MM_RAM:\n case FSL_IMX8MM_OCRAM:\n+ case FSL_IMX8MM_SNVS_HP:\n case FSL_IMX8MM_UART1 ... FSL_IMX8MM_UART4:\n /* device implemented and treated above */\n break;\ndiff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h\nindex df35f0f5ac..8a172b89e0 100644\n--- a/include/hw/arm/fsl-imx8mm.h\n+++ b/include/hw/arm/fsl-imx8mm.h\n@@ -13,6 +13,7 @@\n #include \"cpu.h\"\n #include \"hw/char/imx_serial.h\"\n #include \"hw/intc/arm_gicv3_common.h\"\n+#include \"hw/misc/imx7_snvs.h\"\n #include \"hw/misc/imx8mp_analog.h\"\n #include \"hw/misc/imx8mp_ccm.h\"\n #include \"qom/object.h\"\n@@ -37,6 +38,7 @@ struct FslImx8mmState {\n GICv3State gic;\n IMX8MPCCMState ccm;\n IMX8MPAnalogState analog;\n+ IMX7SNVSState snvs;\n IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];\n MemoryRegion ocram;\n };\n", "prefixes": [ "PULL", "06/63" ] }