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GET /api/1.1/patches/2228745/?format=api
{ "id": 2228745, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228745/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427095747.1070244-8-thuth@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260427095747.1070244-8-thuth@redhat.com>", "date": "2026-04-27T09:57:44", "name": "[PULL,07/10] hw/core/register: add register_array_get_owner", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "73d91a7832dc71bf9aab2802b1888ef0433f48ab", "submitter": { "id": 66152, "url": "http://patchwork.ozlabs.org/api/1.1/people/66152/?format=api", "name": "Thomas Huth", "email": "thuth@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427095747.1070244-8-thuth@redhat.com/mbox/", "series": [ { "id": 501616, "url": "http://patchwork.ozlabs.org/api/1.1/series/501616/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501616", "date": "2026-04-27T09:57:40", "name": "[PULL,01/10] meson.build: Bump the minimum GCC version to v10.4", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501616/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228745/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228745/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=KyKOXd4F;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3zYk6bTcz1xvV\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 19:59:22 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wHIjV-0007yU-4S; Mon, 27 Apr 2026 05:58:29 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <thuth@redhat.com>) id 1wHIjO-0007la-Ba\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 05:58:24 -0400", "from us-smtp-delivery-124.mimecast.com ([170.10.133.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <thuth@redhat.com>) id 1wHIjM-000889-MR\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 05:58:22 -0400", "from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com\n (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by\n relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,\n cipher=TLS_AES_256_GCM_SHA384) id us-mta-404-zedaxh50O-2-XZY2BpetJg-1; Mon,\n 27 Apr 2026 05:58:18 -0400", "from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com\n (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS\n id 2AB671800451; Mon, 27 Apr 2026 09:58:17 +0000 (UTC)", "from thuth-p1g4.redhat.com (unknown [10.44.48.146])\n by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP\n id 517053000709; Mon, 27 Apr 2026 09:58:13 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1777283900;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=F4/PW9AX1SjdG091xg18qEgQhoURcREzm5rwdhlIg+A=;\n b=KyKOXd4FqduSyGLtASby2jnyJi+qu0zvDAMIxNZik6AF+wJ6cb8xoFmxripd+h8QNIaOZ/\n EKGpoIN6+PGKzeCm1U9O6Z3vcFbaf7ZhsaKc6ma7QDAy5k0Y9kEoeGIU7mfM6NcpshfN0S\n Ky13B20e0e0Q7Ufp15IxM2o4ANvhI8Y=", "X-MC-Unique": "zedaxh50O-2-XZY2BpetJg-1", "X-Mimecast-MFC-AGG-ID": "zedaxh50O-2-XZY2BpetJg_1777283897", "From": "Thomas Huth <thuth@redhat.com>", "To": "Stefan Hajnoczi <stefanha@redhat.com>", "Cc": "qemu-devel@nongnu.org, Luc Michel <luc.michel@amd.com>,\n Alistair Francis <alistair.francis@wdc.com>, =?utf-8?q?Philippe_Mathieu-Dau?=\n\t=?utf-8?q?d=C3=A9?= <philmd@linaro.org>", "Subject": "[PULL 07/10] hw/core/register: add register_array_get_owner", "Date": "Mon, 27 Apr 2026 11:57:44 +0200", "Message-ID": "<20260427095747.1070244-8-thuth@redhat.com>", "In-Reply-To": "<20260427095747.1070244-1-thuth@redhat.com>", "References": "<20260427095747.1070244-1-thuth@redhat.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.30.177.4", "Received-SPF": "pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-30", "X-Spam_score": "-3.1", "X-Spam_bar": "---", "X-Spam_report": "(-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=-1, RCVD_IN_MSPIKE_WL=-0.01,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Luc Michel <luc.michel@amd.com>\n\nAdd the register_array_get_owner function to the register API. This\nfunction can be used to retrieve the device owning the given\nRegisterInfoArray.\n\nThis was previously done inline by some devices.\n5c6367bc1c8850f74812eeaaf87cff9911be58de modified the way register\nblocks are created and parented to the device. Since this is an\nimplementation detail of the register API, it makes sense to have a\nfunction for this.\n\nUse it in the Versal OSPI and Versal/ZynqMP eFuse models instead of\ntinkering with the API internals.\n\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3421\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3422\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3423\nSigned-off-by: Luc Michel <luc.michel@amd.com>\nTested-by: Thomas Huth <thuth@redhat.com>\nReviewed-by: Alistair Francis <alistair.francis@wdc.com>\nFixes: 5c6367bc1c8 (\"hw/core/register: add the REGISTER_ARRAY type\")\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nMessage-ID: <20260424155646.533334-1-luc.michel@amd.com>\nSigned-off-by: Thomas Huth <thuth@redhat.com>\n---\n include/hw/core/register.h | 11 +++++++++++\n hw/core/register.c | 5 +++++\n hw/nvram/xlnx-versal-efuse-ctrl.c | 4 ++--\n hw/nvram/xlnx-zynqmp-efuse.c | 4 ++--\n hw/ssi/xlnx-versal-ospi.c | 10 +++-------\n 5 files changed, 23 insertions(+), 11 deletions(-)", "diff": "diff --git a/include/hw/core/register.h b/include/hw/core/register.h\nindex 1f265f4ed71..c6f648fe95e 100644\n--- a/include/hw/core/register.h\n+++ b/include/hw/core/register.h\n@@ -209,4 +209,15 @@ RegisterInfoArray *register_init_block64(DeviceState *owner,\n bool debug_enabled,\n uint64_t memory_size);\n \n+/**\n+ * register_array_get_owner\n+ *\n+ * Retrieve the device owning the register info array @reg_array.\n+ *\n+ * @reg_array The register info array to retrieve the owner from\n+ *\n+ * Returns: the device owning @reg_array\n+ */\n+DeviceState *register_array_get_owner(const RegisterInfoArray *reg_array);\n+\n #endif\ndiff --git a/hw/core/register.c b/hw/core/register.c\nindex c3f3c936e70..99ca5e17758 100644\n--- a/hw/core/register.c\n+++ b/hw/core/register.c\n@@ -322,6 +322,11 @@ static void register_array_finalize(Object *obj)\n g_free(r_array->r);\n }\n \n+DeviceState *register_array_get_owner(const RegisterInfoArray *reg_array)\n+{\n+ return DEVICE(OBJECT(reg_array)->parent);\n+}\n+\n static const TypeInfo register_array_info = {\n .name = TYPE_REGISTER_ARRAY,\n .parent = TYPE_OBJECT,\ndiff --git a/hw/nvram/xlnx-versal-efuse-ctrl.c b/hw/nvram/xlnx-versal-efuse-ctrl.c\nindex 69acdfa3047..f5d5587cb65 100644\n--- a/hw/nvram/xlnx-versal-efuse-ctrl.c\n+++ b/hw/nvram/xlnx-versal-efuse-ctrl.c\n@@ -619,11 +619,11 @@ static void efuse_ctrl_reg_write(void *opaque, hwaddr addr,\n {\n RegisterInfoArray *reg_array = opaque;\n XlnxVersalEFuseCtrl *s;\n- Object *dev;\n+ DeviceState *dev;\n \n assert(reg_array != NULL);\n \n- dev = reg_array->mem.owner;\n+ dev = register_array_get_owner(reg_array);\n assert(dev);\n \n s = XLNX_VERSAL_EFUSE_CTRL(dev);\ndiff --git a/hw/nvram/xlnx-zynqmp-efuse.c b/hw/nvram/xlnx-zynqmp-efuse.c\nindex e6bc54fc6bd..028120f824d 100644\n--- a/hw/nvram/xlnx-zynqmp-efuse.c\n+++ b/hw/nvram/xlnx-zynqmp-efuse.c\n@@ -724,11 +724,11 @@ static void zynqmp_efuse_reg_write(void *opaque, hwaddr addr,\n {\n RegisterInfoArray *reg_array = opaque;\n XlnxZynqMPEFuse *s;\n- Object *dev;\n+ DeviceState *dev;\n \n assert(reg_array != NULL);\n \n- dev = reg_array->mem.owner;\n+ dev = register_array_get_owner(reg_array);\n assert(dev);\n \n s = XLNX_ZYNQMP_EFUSE(dev);\ndiff --git a/hw/ssi/xlnx-versal-ospi.c b/hw/ssi/xlnx-versal-ospi.c\nindex 467f0ce7033..e25e4c26c2e 100644\n--- a/hw/ssi/xlnx-versal-ospi.c\n+++ b/hw/ssi/xlnx-versal-ospi.c\n@@ -1569,15 +1569,11 @@ static RegisterAccessInfo ospi_regs_info[] = {\n };\n \n /* Return dev-obj from reg-region created by register_init_block32 */\n-static XlnxVersalOspi *xilinx_ospi_of_mr(void *mr_accessor)\n+static XlnxVersalOspi *xilinx_ospi_of_mr(void *opaque)\n {\n- RegisterInfoArray *reg_array = mr_accessor;\n- Object *dev;\n+ RegisterInfoArray *reg_array = REGISTER_ARRAY(opaque);\n \n- dev = reg_array->mem.owner;\n- assert(dev);\n-\n- return XILINX_VERSAL_OSPI(dev);\n+ return XILINX_VERSAL_OSPI(register_array_get_owner(reg_array));\n }\n \n static void ospi_write(void *opaque, hwaddr addr, uint64_t value,\n", "prefixes": [ "PULL", "07/10" ] }