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GET /api/1.1/patches/2228314/?format=api
{ "id": 2228314, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228314/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260425233845.459175-1-marek.vasut+renesas@mailbox.org/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260425233845.459175-1-marek.vasut+renesas@mailbox.org>", "date": "2026-04-25T23:38:28", "name": "PCI: rcar-gen4: Limit Max_Read_Request_Size and Max_Payload_Size to 256 Bytes", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d6785dcdb3362158573184b0a3675821408c2504", "submitter": { "id": 85650, "url": "http://patchwork.ozlabs.org/api/1.1/people/85650/?format=api", "name": "Marek Vasut", "email": "marek.vasut+renesas@mailbox.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260425233845.459175-1-marek.vasut+renesas@mailbox.org/mbox/", "series": [ { "id": 501491, "url": "http://patchwork.ozlabs.org/api/1.1/series/501491/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501491", "date": "2026-04-25T23:38:28", "name": "PCI: rcar-gen4: Limit Max_Read_Request_Size and Max_Payload_Size to 256 Bytes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501491/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228314/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228314/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53174-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=mailbox.org header.i=@mailbox.org header.a=rsa-sha256\n header.s=mail20150812 header.b=AurzOrSo;\n\tdkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org\n header.a=rsa-sha256 header.s=mail20150812 header.b=g6eecBUm;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; 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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org;\n s=mail20150812;\n\tt=1777160331;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\t to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n\t content-transfer-encoding:content-transfer-encoding;\n\tbh=sAz7g1dUi5hi0b+215Mn7DEKA29E+hd6TPfNhohZZAY=;\n\tb=g6eecBUmvcWtI59d4IpWU1TpbMNTB5i+jzsa0jQE+2d6U9w8EmjsR+UdJRkTGA6quZgmOn\n\toRYXLTiYA0Wo5/1tQkoOTfnYX48hN1/bcrk1FhFJxnFHYBbU2wkrCIDvHfCTne02qw4Vrl\n\t1XP4qfWugCp1YNBdBpxSCJEYp3VXmN3nytWSiYPhO+fawEJZlTlIqhV7zqAphqUEXmBHxx\n\tSqGSW1weZXcTcCPU6jNBHRhKFivMNjJDXppqyBXE4xfEYBQN8NjA7P7fgIG21wV86z7tBc\n\tp0gHhGhpmRSAjOVcxM/4oUJ/h421aZM1QFV2CsTT6dKRyUIKFf3j1v9j22TCGw==" ], "From": "Marek Vasut <marek.vasut+renesas@mailbox.org>", "To": "linux-pci@vger.kernel.org", "Cc": "Marek Vasut <marek.vasut+renesas@mailbox.org>, stable@vger.kernel.org,\n\t=?utf-8?q?Krzysztof_Wilczy=C5=84ski?= <kwilczynski@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>,\n Geert Uytterhoeven <geert+renesas@glider.be>,\n Koichiro Den <den@valinux.co.jp>, Lorenzo Pieralisi <lpieralisi@kernel.org>,\n Magnus Damm <magnus.damm@gmail.com>, Manivannan Sadhasivam <mani@kernel.org>,\n Rob Herring <robh@kernel.org>,\n Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,\n linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org", "Subject": "[PATCH] PCI: rcar-gen4: Limit Max_Read_Request_Size and\n Max_Payload_Size to 256 Bytes", "Date": "Sun, 26 Apr 2026 01:38:28 +0200", "Message-ID": "<20260425233845.459175-1-marek.vasut+renesas@mailbox.org>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-MBO-RS-ID": "457bd6f4a564d15300f", "X-MBO-RS-META": "r11zh8f91w5eo8fpxks54nrjtcmwxayk" }, "content": "R-Car Gen4 PCIe controller has a hardware limitation of 256 Bytes\nmaximum payload size. The PCIe DMA generates requests of size up\nto minimum(Max_Read_Request_Size, Max_Payload_Size). Force limit\nboth Max_Read_Request_Size and Max_Payload_Size to 256 Bytes and\npropagate this limit to all downstream devices.\n\nThis limitation can be triggered for example by using an NVMe SSD\nwhich does not use host memory buffer, Samsung 980 PRO is such an\nSSD. Affected SSD reports 'hmpre' field as 0:\n\"\n$ nvme id-ctrl /dev/nvme0 | grep hmpre\nhmpre : 0\n\"\n\nThe symptom is a read from the SSD which wraps around at 256 Byte\nboundary. The test for this symptom can be implemented by writing\n512 Byte of random data into the SSD and reading the data back. If\nthe read back data repeat after 256 Bytes, the device is affected.\n\"\n$ dd if=/dev/urandom of=/tmp/data.bin bs=256 count=2 \\\n dd if=/tmp/data.bin of=/dev/nvme0n1 bs=256 count=2 \\\n dd if=/dev/nvme0n1 bs=256 count=2 of=/tmp/readback.bin\n\"\n\nExpected data:\n\"\n$ hexdump -vC /tmp/data.bin\n00000000 97 81 b7 3b 0e 38 2b 4d a7 d3 e0 47 ff c2 4b ca\n00000010 c1 85 98 f0 4a ac 03 a0 3b ab f3 19 44 dd 06 8b\n...\n00000100 7a ce 3c b2 e1 d5 d9 11 88 63 10 59 76 3c dc 32 <-- random\n00000110 72 32 2a 7d a3 e1 aa 13 7c da 58 a1 7b 21 11 50 <-- data\n\"\n\nFaulty readback, collected without this change in place:\n\"\n$ hexdump -vC /tmp/readback.bin\n00000000 97 81 b7 3b 0e 38 2b 4d a7 d3 e0 47 ff c2 4b ca <---.\n00000010 c1 85 98 f0 4a ac 03 a0 3b ab f3 19 44 dd 06 8b <-. |\n... | |\n00000100 97 81 b7 3b 0e 38 2b 4d a7 d3 e0 47 ff c2 4b ca <-:-+- repeated\n00000110 c1 85 98 f0 4a ac 03 a0 3b ab f3 19 44 dd 06 8b <-+--- data\n ^^^\n |\n '--- Repeat starts at offset 0x100 = 256 Bytes\n\"\n\nFixes: 0d0c551011df (\"PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode\")\nCc: stable@vger.kernel.org\nSigned-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>\n---\nCc: \"Krzysztof Wilczyński\" <kwilczynski@kernel.org>\nCc: Bjorn Helgaas <bhelgaas@google.com>\nCc: Geert Uytterhoeven <geert+renesas@glider.be>\nCc: Koichiro Den <den@valinux.co.jp>\nCc: Lorenzo Pieralisi <lpieralisi@kernel.org>\nCc: Magnus Damm <magnus.damm@gmail.com>\nCc: Manivannan Sadhasivam <mani@kernel.org>\nCc: Rob Herring <robh@kernel.org>\nCc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>\nCc: linux-kernel@vger.kernel.org\nCc: linux-pci@vger.kernel.org\nCc: linux-renesas-soc@vger.kernel.org\n---\n drivers/pci/controller/dwc/pcie-rcar-gen4.c | 56 +++++++++++++++++++++\n 1 file changed, 56 insertions(+)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c\nindex 8b03c42f8c84c..82f0a074a71da 100644\n--- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c\n+++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c\n@@ -576,6 +576,7 @@ static int r8a779f0_pcie_ltssm_control(struct rcar_gen4_pcie *rcar, bool enable)\n static void rcar_gen4_pcie_additional_common_init(struct rcar_gen4_pcie *rcar)\n {\n \tstruct dw_pcie *dw = &rcar->dw;\n+\tu16 offset = dw_pcie_find_capability(dw, PCI_CAP_ID_EXP);\n \tu32 val;\n \n \tval = dw_pcie_readl_dbi(dw, PCIE_PORT_LANE_SKEW);\n@@ -584,11 +585,66 @@ static void rcar_gen4_pcie_additional_common_init(struct rcar_gen4_pcie *rcar)\n \t\tval |= BIT(6);\n \tdw_pcie_writel_dbi(dw, PCIE_PORT_LANE_SKEW, val);\n \n+\tval = dw_pcie_readl_dbi(dw, offset + PCI_EXP_DEVCTL);\n+\tval &= ~(PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ);\n+\tval |= PCI_EXP_DEVCTL_PAYLOAD_256B | PCI_EXP_DEVCTL_READRQ_256B;\n+\tdw_pcie_writel_dbi(dw, offset + PCI_EXP_DEVCTL, val);\n+\n \tval = readl(rcar->base + PCIEPWRMNGCTRL);\n \tval |= APP_CLK_REQ_N | APP_CLK_PM_EN;\n \twritel(val, rcar->base + PCIEPWRMNGCTRL);\n }\n \n+static void rcar_gen4_rc_pcie_quirk(struct pci_dev *dev)\n+{\n+\tstatic const struct pci_device_id rcar_gen4_pcie_rc_devid = {\n+\t\tPCI_DEVICE(PCI_VENDOR_ID_RENESAS, 0x0030),\n+\t\t.class = PCI_CLASS_BRIDGE_PCI_NORMAL, .class_mask = ~0\n+\t};\n+\tstruct pci_bus *bus = dev->bus;\n+\tstruct pci_dev *bridge;\n+\n+\tif (pci_is_root_bus(bus))\n+\t\tbridge = dev;\n+\n+\t/* Look for the host bridge */\n+\twhile (!pci_is_root_bus(bus)) {\n+\t\tbridge = bus->self;\n+\t\tbus = bus->parent;\n+\t}\n+\n+\tif (!bridge)\n+\t\treturn;\n+\n+\tif (!pci_match_one_device(&rcar_gen4_pcie_rc_devid, bridge))\n+\t\treturn;\n+\n+\t/*\n+\t * R-Car Gen4 PCIe controller has a hardware limitation of 256 Bytes\n+\t * maximum payload size. The PCIe DMA generates requests of size up\n+\t * to minimum(Max_Read_Request_Size, Max_Payload_Size). Force limit\n+\t * both Max_Read_Request_Size and Max_Payload_Size to 256 Bytes and\n+\t * propagate this limit to all downstream devices.\n+\t *\n+\t * For details, refer to:\n+\t * R-Car S4 R19UH0161EJ0130 Rev.1.30 Jun. 16, 2025 or\n+\t * R-Car V4H R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 or\n+\t * R-Car V4M R19UH0217EJ0100 Rev.1.00 Dec. 12, 2025,\n+\t * chapters 104.1.1 Features and 104.3.9 DMA Transfer\n+\t * section DMA Read Transfer.\n+\t */\n+\tif (pcie_get_readrq(dev) > 256) {\n+\t\tdev_info(&dev->dev, \"Limiting MRRS to 256 bytes\\n\");\n+\t\tpcie_set_readrq(dev, 256);\n+\t}\n+\n+\tif (pcie_get_mps(dev) > 256) {\n+\t\tdev_info(&dev->dev, \"Limiting MPS to 256 bytes\\n\");\n+\t\tpcie_set_mps(dev, 256);\n+\t}\n+}\n+DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, rcar_gen4_rc_pcie_quirk);\n+\n static void rcar_gen4_pcie_phy_reg_update_bits(struct rcar_gen4_pcie *rcar,\n \t\t\t\t\t u32 offset, u32 mask, u32 val)\n {\n", "prefixes": [] }