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GET /api/1.1/patches/2228208/?format=api
{ "id": 2228208, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228208/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260425-imx8m-of-upstream-v1-4-07527be92e5d@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260425-imx8m-of-upstream-v1-4-07527be92e5d@nxp.com>", "date": "2026-04-25T00:36:56", "name": "[04/13] imx8mq: librem5: Switch to OF_UPSTREAM", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6626fbd827b261da311990d09a8db7f76f140e22", "submitter": { "id": 80723, "url": "http://patchwork.ozlabs.org/api/1.1/people/80723/?format=api", "name": "Peng Fan (OSS)", "email": "peng.fan@oss.nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260425-imx8m-of-upstream-v1-4-07527be92e5d@nxp.com/mbox/", "series": [ { "id": 501451, "url": "http://patchwork.ozlabs.org/api/1.1/series/501451/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=501451", "date": "2026-04-25T00:37:04", "name": "iMX8M: Covert to OF_UPSTREAM", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501451/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228208/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228208/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector1-NXP1-onmicrosoft-com\n header.b=X7mgklKe;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260425-imx8m-of-upstream-v1-4-07527be92e5d@nxp.com>", "References": "<20260425-imx8m-of-upstream-v1-0-07527be92e5d@nxp.com>", "In-Reply-To": "<20260425-imx8m-of-upstream-v1-0-07527be92e5d@nxp.com>", "To": "\"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>, u-boot@lists.denx.de,\n kernel@puri.sm, u-boot@dh-electronics.com", "Cc": "Stefano Babic <sbabic@nabladev.com>, Fabio Estevam <festevam@gmail.com>,\n Tom Rini <trini@konsulko.com>, \"Lukas F. Hartmann\" <lukas@mntre.com>,\n Patrick Wildt <patrick@blueri.se>, Ye Li <ye.li@nxp.com>,\n Frieder Schrempf <frieder.schrempf@kontron.de>,\n Benjamin Hahn <B.Hahn@phytec.de>, Alice Guo <alice.guo@nxp.com>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Marco Franchi <marcofrk@gmail.com>, Alifer Moraes <alifer.wsdm@gmail.com>,\n Angus Ainslie <angus@akkea.ca>, Heiko Thiery <heiko.thiery@gmail.com>,\n Olaf Mandel <o.mandel@menlosystems.com>,\n Jagan Teki <jagan@amarulasolutions.com>,\n Matteo Lisi <matteo.lisi@engicam.com>,\n Manoj Sai <abbaraju.manojsai@amarulasolutions.com>,\n Emanuele Ghidoli <emanuele.ghidoli@toradex.com>,\n Parth Pancholi <parth.pancholi@toradex.com>, Peng Fan <peng.fan@nxp.com>", "X-Mailer": "b4 0.14.3", "X-ClientProxiedBy": "SI2PR01CA0020.apcprd01.prod.exchangelabs.com\n (2603:1096:4:192::6) To PAXPR04MB8459.eurprd04.prod.outlook.com\n (2603:10a6:102:1da::15)", "MIME-Version": "1.0", "X-MS-Exchange-MessageSentRepresentingType": "1", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "\n PAXPR04MB8459:EE_|AM8PR04MB7876:EE_|PAXPR04MB8427:EE_|DU4PR04MB10551:EE_", "X-MS-Office365-Filtering-Correlation-Id": "97f7e660-4e03-485b-4d88-08dea2581d36", "X-MS-Exchange-SharedMailbox-RoutingAgent-Processed": "True", "X-LD-Processed": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|7416014|376014|52116014|1800799024|19092799006|366016|56012099003|18002099003|22082099003|38350700014;", "X-Microsoft-Antispam-Message-Info": "\n 8vCaiTRmYqWqF+ku1/2DIvEQca12fYrv3rJHJiTQgPPA2GD2OOqHRD46hoht6GB0ZHj1qiO6IIXC1k+J39MAW953hRu/K/bVQYfBvi3/Tlohgnzer5K6TPannjk5LNVliXhpwUM7B5JBvwPz/50G5InLNIsCq69QMYQLDgt3G5M2ryshaPFb6/7qQGCu9q4HFA/Gi+CRvWrJCeBvCqjbFo3Nukm/e5XOdaukom6yEMWl6nkwkm5coph9Kc/cTcyFj+xRBNGwKbg6d26UG+B0DRUNkn83Ogxhy4rl6RgMWt5+GMx1JMussYUFodSJrwvXz8NZnXwr2wIalYnU+TuBXWIYWffilMz0QWaRiPjvZ30/13WWEDh3HRuAKn6kjjeDBk5tW+bshMdT/KwtBg7AokgGyY2Nv78OPYwoMT1oiOPKhvG+kQTYIRtr5kPMiOG+91VS/IDvUJ4vah0mbU9VaZzU4/4W7usdL7sQDfBkX48QD/aTZU9dn2ijDAViG06JkGE9G2ZD4rPyg46B0YnBNug1OY6fLB6q7G4zywygnswLfiv4/vPy27WUlowhkJ2ESYmsGVW1iX2kKraPn4R+xu7ITWoervDATol7rwYpetc5MqD0rTZbc7tUeI3LE/yEvcxBb2EZDVjgLJAqE3TsjeQJB6OJND1RwgRdbtH+4YzjI/n9JTlY09s3Q1P1RFMZUxo6xu2eFoLw2TQH482yaZSk/zX9QanpkHmaD9ytj4W38jixNQUoJ9cc1QSnshkh8/pc6fKoSa+CQsH2etxfHSu0YkQ4UOIErUz9hZoyX+M=", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; 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So switch to\nOF_UPSTREAM by dropping the U-Boot copy of the dts, enabling OF_UPSTREAM and\nupdating CONFIG_DEFAULT_DEVICE_TREE.\n\nSigned-off-by: Peng Fan <peng.fan@nxp.com>\n---\n arch/arm/dts/Makefile | 3 +-\n arch/arm/dts/imx8mq-librem5-r3.dtsi | 45 --\n arch/arm/dts/imx8mq-librem5-r4.dts | 27 -\n arch/arm/dts/imx8mq-librem5.dtsi | 1382 -----------------------------------\n arch/arm/mach-imx/imx8m/Kconfig | 1 +\n board/purism/librem5/MAINTAINERS | 1 -\n configs/librem5_defconfig | 2 +-\n 7 files changed, 3 insertions(+), 1458 deletions(-)", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex 019928af9df..2cdcfa9f92e 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -889,8 +889,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \\\n \timx8mp-dhcom-picoitx.dtb \\\n \timx8mp-icore-mx8mp-edimm2.2.dtb \\\n \timx8mp-msc-sm2s.dtb \\\n-\timx8mq-kontron-pitx-imx8m.dtb \\\n-\timx8mq-librem5-r4.dtb\n+\timx8mq-kontron-pitx-imx8m.dtb\n \n dtb-$(CONFIG_ARCH_IMX9) += \\\n \timx93-11x11-frdm.dtb \\\ndiff --git a/arch/arm/dts/imx8mq-librem5-r3.dtsi b/arch/arm/dts/imx8mq-librem5-r3.dtsi\ndeleted file mode 100644\nindex e4f8b47cce4..00000000000\n--- a/arch/arm/dts/imx8mq-librem5-r3.dtsi\n+++ /dev/null\n@@ -1,45 +0,0 @@\n-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n-// Copyright (C) 2021 Purism SPC <kernel@puri.sm>\n-\n-/dts-v1/;\n-\n-/*\n- * This file describes hardware that is shared among r3 (\"Dogwood\") and\n- * later revisions of the Librem 5 so it has to be included in dts there.\n- */\n-\n-#include \"imx8mq-librem5.dtsi\"\n-\n-/ {\n-\tmodel = \"Purism Librem 5r3\";\n-\tcompatible = \"purism,librem5r3\", \"purism,librem5\", \"fsl,imx8mq\";\n-};\n-\n-&accel_gyro {\n-\tmount-matrix = \"1\", \"0\", \"0\",\n-\t\t\t\"0\", \"1\", \"0\",\n-\t\t\t\"0\", \"0\", \"-1\";\n-};\n-\n-&bq25895 {\n-\tti,battery-regulation-voltage = <4200000>; /* uV */\n-\tti,charge-current = <1500000>; /* uA */\n-\tti,termination-current = <144000>; /* uA */\n-};\n-\n-&camera_front {\n-\tpinctrl-0 = <&pinctrl_csi1>, <&pinctrl_r3_camera_pwr>;\n-\tshutdown-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;\n-};\n-\n-&iomuxc {\n-\tpinctrl_r3_camera_pwr: r3camerapwrgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4\t\t0x83\n-\t\t>;\n-\t};\n-};\n-\n-&proximity {\n-\tproximity-near-level = <25>;\n-};\ndiff --git a/arch/arm/dts/imx8mq-librem5-r4.dts b/arch/arm/dts/imx8mq-librem5-r4.dts\ndeleted file mode 100644\nindex 1056b7981bd..00000000000\n--- a/arch/arm/dts/imx8mq-librem5-r4.dts\n+++ /dev/null\n@@ -1,27 +0,0 @@\n-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n-// Copyright (C) 2021 Purism SPC <kernel@puri.sm>\n-\n-/dts-v1/;\n-\n-#include \"imx8mq-librem5-r3.dtsi\"\n-\n-/ {\n-\tmodel = \"Purism Librem 5r4\";\n-\tcompatible = \"purism,librem5r4\", \"purism,librem5\", \"fsl,imx8mq\";\n-};\n-\n-&bat {\n-\tmaxim,rsns-microohm = <1667>;\n-};\n-\n-&led_backlight {\n-\tled-max-microamp = <25000>;\n-};\n-\n-&lcd_panel {\n-\tcompatible = \"ys,ys57pss36bh5gq\";\n-};\n-\n-&proximity {\n-\tproximity-near-level = <10>;\n-};\ndiff --git a/arch/arm/dts/imx8mq-librem5.dtsi b/arch/arm/dts/imx8mq-librem5.dtsi\ndeleted file mode 100644\nindex ae08556b2ef..00000000000\n--- a/arch/arm/dts/imx8mq-librem5.dtsi\n+++ /dev/null\n@@ -1,1382 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+\n-/*\n- * Copyright 2018-2020 Purism SPC\n- */\n-\n-/dts-v1/;\n-\n-#include \"dt-bindings/input/input.h\"\n-#include <dt-bindings/interrupt-controller/irq.h>\n-#include <dt-bindings/leds/common.h>\n-#include \"dt-bindings/pwm/pwm.h\"\n-#include \"dt-bindings/usb/pd.h\"\n-#include \"imx8mq.dtsi\"\n-\n-/ {\n-\tmodel = \"Purism Librem 5\";\n-\tcompatible = \"purism,librem5\", \"fsl,imx8mq\";\n-\tchassis-type = \"handset\";\n-\n-\tbacklight_dsi: backlight-dsi {\n-\t\tcompatible = \"led-backlight\";\n-\t\tleds = <&led_backlight>;\n-\t};\n-\n-\tpmic_osc: clock-pmic {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <32768>;\n-\t\tclock-output-names = \"pmic_osc\";\n-\t};\n-\n-\tchosen {\n-\t\tstdout-path = &uart1;\n-\t};\n-\n-\tgpio-keys {\n-\t\tcompatible = \"gpio-keys\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_keys>;\n-\n-\t\tkey-vol-down {\n-\t\t\tlabel = \"VOL_DOWN\";\n-\t\t\tgpios = <&gpio1 17 GPIO_ACTIVE_LOW>;\n-\t\t\tlinux,code = <KEY_VOLUMEDOWN>;\n-\t\t\tdebounce-interval = <50>;\n-\t\t\twakeup-source;\n-\t\t};\n-\n-\t\tkey-vol-up {\n-\t\t\tlabel = \"VOL_UP\";\n-\t\t\tgpios = <&gpio1 16 GPIO_ACTIVE_LOW>;\n-\t\t\tlinux,code = <KEY_VOLUMEUP>;\n-\t\t\tdebounce-interval = <50>;\n-\t\t\twakeup-source;\n-\t\t};\n-\t};\n-\n-\tled-controller {\n-\t\tcompatible = \"pwm-leds\";\n-\n-\t\tled-0 {\n-\t\t\tfunction = LED_FUNCTION_STATUS;\n-\t\t\tcolor = <LED_COLOR_ID_BLUE>;\n-\t\t\tmax-brightness = <248>;\n-\t\t\tpwms = <&pwm2 0 50000 0>;\n-\t\t};\n-\n-\t\tled-1 {\n-\t\t\tfunction = LED_FUNCTION_STATUS;\n-\t\t\tcolor = <LED_COLOR_ID_GREEN>;\n-\t\t\tmax-brightness = <248>;\n-\t\t\tpwms = <&pwm4 0 50000 0>;\n-\t\t};\n-\n-\t\tled-2 {\n-\t\t\tfunction = LED_FUNCTION_STATUS;\n-\t\t\tcolor = <LED_COLOR_ID_RED>;\n-\t\t\tmax-brightness = <248>;\n-\t\t\tpwms = <&pwm3 0 50000 0>;\n-\t\t};\n-\t};\n-\n-\treg_aud_1v8: regulator-audio-1v8 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_audiopwr>;\n-\t\tregulator-name = \"AUDIO_PWR_EN\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tgpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\t/*\n-\t * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC\n-\t * since we can't have it twice in the 2 different regulator nodes.\n-\t */\n-\treg_csi_1v8: regulator-csi-1v8 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"CAMERA_VDDIO_1V8\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tvin-supply = <®_vdd_3v3>;\n-\t\tgpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\t/* controlled by the CAMERA_POWER_KEY HKS */\n-\treg_vcam_1v2: regulator-vcam-1v2 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"CAMERA_VDDD_1V2\";\n-\t\tregulator-min-microvolt = <1200000>;\n-\t\tregulator-max-microvolt = <1200000>;\n-\t\tvin-supply = <®_vdd_1v8>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_vcam_2v8: regulator-vcam-2v8 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"CAMERA_VDDA_2V8\";\n-\t\tregulator-min-microvolt = <2800000>;\n-\t\tregulator-max-microvolt = <2800000>;\n-\t\tvin-supply = <®_vdd_3v3>;\n-\t\tgpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_gnss: regulator-gnss {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_gnsspwr>;\n-\t\tregulator-name = \"GNSS\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_hub: regulator-hub {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_hub_pwr>;\n-\t\tregulator-name = \"HUB\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_lcd_1v8: regulator-lcd-1v8 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_dsien>;\n-\t\tregulator-name = \"LCD_1V8\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tvin-supply = <®_vdd_1v8>;\n-\t\tgpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t\t/* Otherwise i2c3 is not functional */\n-\t\tregulator-always-on;\n-\t};\n-\n-\treg_lcd_3v4: regulator-lcd-3v4 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"LCD_3V4\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_dsibiasen>;\n-\t\tvin-supply = <®_vsys_3v4>;\n-\t\tgpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_vdd_sen: regulator-vdd-sen {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"VDD_SEN\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t};\n-\n-\treg_vdd_1v8: regulator-vdd-1v8 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"VDD_1V8\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tvin-supply = <&buck7_reg>;\n-\t};\n-\n-\treg_vdd_3v3: regulator-vdd-3v3 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"VDD_3V3\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t};\n-\n-\treg_vsys_3v4: regulator-vsys-3v4 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"VSYS_3V4\";\n-\t\tregulator-min-microvolt = <3400000>;\n-\t\tregulator-max-microvolt = <3400000>;\n-\t\tregulator-always-on;\n-\t};\n-\n-\treg_wifi_3v3: regulator-wifi-3v3 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_wifi_pwr>;\n-\t\tregulator-name = \"3V3_WIFI\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t\tvin-supply = <®_vdd_3v3>;\n-\t};\n-\n-\tsound {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_hp>;\n-\t\tsimple-audio-card,name = \"Librem 5\";\n-\t\tsimple-audio-card,format = \"i2s\";\n-\t\tsimple-audio-card,widgets =\n-\t\t\t\"Headphone\", \"Headphones\",\n-\t\t\t\"Microphone\", \"Headset Mic\",\n-\t\t\t\"Microphone\", \"Digital Mic\",\n-\t\t\t\"Speaker\", \"Speaker\";\n-\t\tsimple-audio-card,routing =\n-\t\t\t\"Headphones\", \"HPOUTL\",\n-\t\t\t\"Headphones\", \"HPOUTR\",\n-\t\t\t\"Speaker\", \"SPKOUTL\",\n-\t\t\t\"Speaker\", \"SPKOUTR\",\n-\t\t\t\"Headset Mic\", \"MICBIAS\",\n-\t\t\t\"IN3R\", \"Headset Mic\",\n-\t\t\t\"DMICDAT\", \"Digital Mic\";\n-\t\tsimple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;\n-\n-\t\tsimple-audio-card,cpu {\n-\t\t\tsound-dai = <&sai2>;\n-\t\t};\n-\n-\t\tsimple-audio-card,codec {\n-\t\t\tsound-dai = <&codec>;\n-\t\t\tclocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;\n-\t\t\tframe-master;\n-\t\t\tbitclock-master;\n-\t\t};\n-\t};\n-\n-\tsound-wwan {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"Modem\";\n-\t\tsimple-audio-card,format = \"i2s\";\n-\n-\t\tsimple-audio-card,cpu {\n-\t\t\tsound-dai = <&sai6>;\n-\t\t\tframe-inversion;\n-\t\t};\n-\n-\t\tsimple-audio-card,codec {\n-\t\t\tsound-dai = <&bm818_codec>;\n-\t\t\tframe-master;\n-\t\t\tbitclock-master;\n-\t\t};\n-\t};\n-\n-\tusdhc2_pwrseq: pwrseq {\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;\n-\t\tcompatible = \"mmc-pwrseq-simple\";\n-\t\treset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,\n-\t\t\t <&gpio4 29 GPIO_ACTIVE_HIGH>;\n-\t};\n-\n-\tbm818_codec: sound-wwan-codec {\n-\t\tcompatible = \"broadmobi,bm818\", \"option,gtm601\";\n-\t\t#sound-dai-cells = <0>;\n-\t};\n-\n-\tvibrator {\n-\t\tcompatible = \"pwm-vibrator\";\n-\t\tpwms = <&pwm1 0 1000000000 0>;\n-\t\tpwm-names = \"enable\";\n-\t\tvcc-supply = <®_vdd_3v3>;\n-\t};\n-};\n-\n-&A53_0 {\n-\tcpu-supply = <&buck2_reg>;\n-};\n-\n-&A53_1 {\n-\tcpu-supply = <&buck2_reg>;\n-};\n-\n-&A53_2 {\n-\tcpu-supply = <&buck2_reg>;\n-};\n-\n-&A53_3 {\n-\tcpu-supply = <&buck2_reg>;\n-};\n-\n-&csi1 {\n-\tstatus = \"okay\";\n-};\n-\n-&ddrc {\n-\toperating-points-v2 = <&ddrc_opp_table>;\n-\tstatus = \"okay\";\n-\n-\tddrc_opp_table: opp-table {\n-\t\tcompatible = \"operating-points-v2\";\n-\n-\t\topp-25M {\n-\t\t\topp-hz = /bits/ 64 <25000000>;\n-\t\t};\n-\n-\t\topp-100M {\n-\t\t\topp-hz = /bits/ 64 <100000000>;\n-\t\t};\n-\n-\t\topp-800M {\n-\t\t\topp-hz = /bits/ 64 <800000000>;\n-\t\t};\n-\t};\n-};\n-\n-&dphy {\n-\tstatus = \"okay\";\n-};\n-\n-&ecspi1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_ecspi1>;\n-\tcs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;\n-\t#address-cells = <1>;\n-\t#size-cells = <0>;\n-\tstatus = \"okay\";\n-\n-\tnor_flash: flash@0 {\n-\t\tcompatible = \"jedec,spi-nor\";\n-\t\treg = <0>;\n-\t\tspi-max-frequency = <1000000>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <1>;\n-\n-\t\tpartition@0 {\n-\t\t\tlabel = \"protected0\";\n-\t\t\treg = <0x0 0x30000>;\n-\t\t\tread-only;\n-\t\t};\n-\n-\t\tpartition@30000 {\n-\t\t\tlabel = \"firmware\";\n-\t\t\treg = <0x30000 0x1d0000>;\n-\t\t\tread-only;\n-\t\t};\n-\t};\n-};\n-\n-&gpio1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_pmic_5v>;\n-\n-\tpmic-5v-hog {\n-\t\tgpio-hog;\n-\t\tgpios = <1 GPIO_ACTIVE_HIGH>;\n-\t\tinput;\n-\t\tlane-mapping = \"pmic-5v\";\n-\t};\n-};\n-\n-&iomuxc {\n-\tpinctrl_audiopwr: audiopwrgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* AUDIO_POWER_EN_3V3 */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_bl: blgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* BACKLINGE_EN */\n-\t\t\tMX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_bt: btgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* BT_REG_ON */\n-\t\t\tMX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_camera_pwr: camerapwrgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* CAMERA_PWR_EN_3V3 */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_csi1: csi1grp {\n-\t\tfsl,pins = <\n-\t\t\t/* CSI1_NRST */\n-\t\t\tMX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_charger_in: chargeringrp {\n-\t\tfsl,pins = <\n-\t\t\t/* CHRG_INT */\n-\t\t\tMX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_dsibiasen: dsibiasengrp {\n-\t\tfsl,pins = <\n-\t\t\t/* DSI_BIAS_EN */\n-\t\t\tMX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_dsien: dsiengrp {\n-\t\tfsl,pins = <\n-\t\t\t/* DSI_EN_3V3 */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_dsirst: dsirstgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* DSI_RST */\n-\t\t\tMX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29\t0x83\n-\t\t\t/* DSI_TE */\n-\t\t\tMX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28\t0x83\n-\t\t\t/* TP_RST */\n-\t\t\tMX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_ecspi1: ecspigrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI\t0x83\n-\t\t\tMX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO\t0x83\n-\t\t\tMX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9\t0x19\n-\t\t\tMX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_gauge: gaugegrp {\n-\t\tfsl,pins = <\n-\t\t\t/* BAT_LOW */\n-\t\t\tMX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_gnsspwr: gnsspwrgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* GPS3V3_EN */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_haptic: hapticgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* MOTO */\n-\t\t\tMX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_hp: hpgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* HEADPHONE_DET_1V8 */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9\t0x180\n-\t\t>;\n-\t};\n-\n-\tpinctrl_hub_pwr: hubpwrgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* HUB_PWR_3V3_EN */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c1: i2c1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL\t\t0x40000026\n-\t\t\tMX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA\t\t0x40000026\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c2: i2c2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL\t\t0x40000026\n-\t\t\tMX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA\t\t0x40000026\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c3: i2c3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL\t\t0x40000026\n-\t\t\tMX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA\t\t0x40000026\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c4: i2c4grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL\t\t0x40000026\n-\t\t\tMX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA\t\t0x40000026\n-\t\t>;\n-\t};\n-\n-\tpinctrl_keys: keysgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* VOL- */\n-\t\t\tMX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17\t0x01C0\n-\t\t\t/* VOL+ */\n-\t\t\tMX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16\t0x01C0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_led_b: ledbgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* LED_B */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT\t0x06\n-\t\t>;\n-\t};\n-\n-\tpinctrl_led_g: ledggrp {\n-\t\tfsl,pins = <\n-\t\t\t/* LED_G */\n-\t\t\tMX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT\t\t0x06\n-\t\t>;\n-\t};\n-\n-\tpinctrl_led_r: ledrgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* LED_R */\n-\t\t\tMX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT\t\t0x06\n-\t\t>;\n-\t};\n-\n-\tpinctrl_mag: maggrp {\n-\t\tfsl,pins = <\n-\t\t\t/* INT_MAG */\n-\t\t\tMX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pmic: pmicgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* PMIC_NINT */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pmic_5v: pmic5vgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* PMIC_5V */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_prox: proxgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* INT_LIGHT */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_rtc: rtcgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* RTC_INT */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_sai2: sai2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK\t0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_sai6: sai6grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK\t0xd6\n-\t\t\tMX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0\t0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_tcpc: tcpcgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* TCPC_INT */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10\t0x01C0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_touch: touchgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* TP_INT */\n-\t\t\tMX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27\t0x80\n-\t\t>;\n-\t};\n-\n-\tpinctrl_typec: typecgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* TYPEC_MUX_EN */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart1: uart1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX\t0x49\n-\t\t\tMX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart2: uart2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX\t0x49\n-\t\t\tMX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart3: uart3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX\t0x49\n-\t\t\tMX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart4: uart4grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B\t0x49\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B\t\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc1: usdhc1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK\t\t\t0x83\n-\t\t\tMX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD\t\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE\t\t0x83\n-\t\t\tMX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc1_100mhz: usdhc1grp100mhz {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK\t\t\t0x8d\n-\t\t\tMX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD\t\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE\t\t0x8d\n-\t\t\tMX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc1_200mhz: usdhc1grp200mhz {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK\t\t\t0x9f\n-\t\t\tMX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD\t\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE\t\t0x9f\n-\t\t\tMX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2: usdhc2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12\t0x80\n-\t\t\tMX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK\t\t0x83\n-\t\t\tMX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_100mhz: usdhc2grp100mhz {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12\t0x80\n-\t\t\tMX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK\t\t0x8d\n-\t\t\tMX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_200mhz: usdhc2grp200mhz {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12\t0x80\n-\t\t\tMX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK\t\t0x9f\n-\t\t\tMX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD\t\t0xcf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0xcf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0xcf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0xcf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0xcf\n-\t\t\tMX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_wifi_disable: wifidisablegrp {\n-\t\tfsl,pins = <\n-\t\t\t/* WIFI_REG_ON */\n-\t\t\tMX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_wifi_pwr: wifipwrgrp {\n-\t\tfsl,pins = <\n-\t\t\t/* WIFI3V3_EN */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10\t0x83\n-\t\t>;\n-\t};\n-\n-\tpinctrl_wdog: wdoggrp {\n-\t\tfsl,pins = <\n-\t\t\t/* nWDOG */\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B\t0x1f\n-\t\t>;\n-\t};\n-};\n-\n-&i2c1 {\n-\tclock-frequency = <387000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c1>;\n-\tstatus = \"okay\";\n-\n-\ttypec_pd: usb-pd@3f {\n-\t\tcompatible = \"ti,tps6598x\";\n-\t\treg = <0x3f>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;\n-\t\tinterrupt-parent = <&gpio1>;\n-\t\tinterrupts = <10 IRQ_TYPE_LEVEL_LOW>;\n-\t\tinterrupt-names = \"irq\";\n-\n-\t\tconnector {\n-\t\t\tcompatible = \"usb-c-connector\";\n-\t\t\tlabel = \"USB-C\";\n-\t\t\tdata-role = \"dual\";\n-\n-\t\t\tports {\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\n-\t\t\t\tport@0 {\n-\t\t\t\t\treg = <0>;\n-\n-\t\t\t\t\tusb_con_hs: endpoint {\n-\t\t\t\t\t\tremote-endpoint = <&typec_hs>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\n-\t\t\t\tport@1 {\n-\t\t\t\t\treg = <1>;\n-\n-\t\t\t\t\tusb_con_ss: endpoint {\n-\t\t\t\t\t\tremote-endpoint = <&typec_ss>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\t\t\t};\n-\t\t};\n-\t};\n-\n-\tpmic: pmic@4b {\n-\t\tcompatible = \"rohm,bd71837\";\n-\t\treg = <0x4b>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;\n-\t\tclocks = <&pmic_osc>;\n-\t\tclock-names = \"osc\";\n-\t\tclock-output-names = \"pmic_clk\";\n-\t\tinterrupt-parent = <&gpio1>;\n-\t\tinterrupts = <7 IRQ_TYPE_LEVEL_LOW>;\n-\t\trohm,reset-snvs-powered;\n-\n-\t\tregulators {\n-\t\t\tbuck1_reg: BUCK1 {\n-\t\t\t\tregulator-name = \"buck1\";\n-\t\t\t\tregulator-min-microvolt = <700000>;\n-\t\t\t\tregulator-max-microvolt = <1300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-ramp-delay = <1250>;\n-\t\t\t\trohm,dvs-run-voltage = <900000>;\n-\t\t\t\trohm,dvs-idle-voltage = <850000>;\n-\t\t\t\trohm,dvs-suspend-voltage = <800000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tbuck2_reg: BUCK2 {\n-\t\t\t\tregulator-name = \"buck2\";\n-\t\t\t\tregulator-min-microvolt = <700000>;\n-\t\t\t\tregulator-max-microvolt = <1300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-ramp-delay = <1250>;\n-\t\t\t\trohm,dvs-run-voltage = <1000000>;\n-\t\t\t\trohm,dvs-idle-voltage = <900000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tbuck3_reg: BUCK3 {\n-\t\t\t\tregulator-name = \"buck3\";\n-\t\t\t\tregulator-min-microvolt = <700000>;\n-\t\t\t\tregulator-max-microvolt = <1300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\trohm,dvs-run-voltage = <900000>;\n-\t\t\t};\n-\n-\t\t\tbuck4_reg: BUCK4 {\n-\t\t\t\tregulator-name = \"buck4\";\n-\t\t\t\tregulator-min-microvolt = <700000>;\n-\t\t\t\tregulator-max-microvolt = <1300000>;\n-\t\t\t\trohm,dvs-run-voltage = <1000000>;\n-\t\t\t};\n-\n-\t\t\tbuck5_reg: BUCK5 {\n-\t\t\t\tregulator-name = \"buck5\";\n-\t\t\t\tregulator-min-microvolt = <700000>;\n-\t\t\t\tregulator-max-microvolt = <1350000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tbuck6_reg: BUCK6 {\n-\t\t\t\tregulator-name = \"buck6\";\n-\t\t\t\tregulator-min-microvolt = <3000000>;\n-\t\t\t\tregulator-max-microvolt = <3300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tbuck7_reg: BUCK7 {\n-\t\t\t\tregulator-name = \"buck7\";\n-\t\t\t\tregulator-min-microvolt = <1605000>;\n-\t\t\t\tregulator-max-microvolt = <1995000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tbuck8_reg: BUCK8 {\n-\t\t\t\tregulator-name = \"buck8\";\n-\t\t\t\tregulator-min-microvolt = <800000>;\n-\t\t\t\tregulator-max-microvolt = <1400000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo1_reg: LDO1 {\n-\t\t\t\tregulator-name = \"ldo1\";\n-\t\t\t\tregulator-min-microvolt = <3000000>;\n-\t\t\t\tregulator-max-microvolt = <3300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\t/* leave on for snvs power button */\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo2_reg: LDO2 {\n-\t\t\t\tregulator-name = \"ldo2\";\n-\t\t\t\tregulator-min-microvolt = <900000>;\n-\t\t\t\tregulator-max-microvolt = <900000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\t/* leave on for snvs power button */\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo3_reg: LDO3 {\n-\t\t\t\tregulator-name = \"ldo3\";\n-\t\t\t\tregulator-min-microvolt = <1800000>;\n-\t\t\t\tregulator-max-microvolt = <3300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo4_reg: LDO4 {\n-\t\t\t\tregulator-name = \"ldo4\";\n-\t\t\t\tregulator-min-microvolt = <900000>;\n-\t\t\t\tregulator-max-microvolt = <1800000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo5_reg: LDO5 {\n-\t\t\t\t/* VDD_PHY_0V9 - MIPI and HDMI domains */\n-\t\t\t\tregulator-name = \"ldo5\";\n-\t\t\t\tregulator-min-microvolt = <1800000>;\n-\t\t\t\tregulator-max-microvolt = <3300000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo6_reg: LDO6 {\n-\t\t\t\t/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */\n-\t\t\t\tregulator-name = \"ldo6\";\n-\t\t\t\tregulator-min-microvolt = <900000>;\n-\t\t\t\tregulator-max-microvolt = <1800000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tldo7_reg: LDO7 {\n-\t\t\t\t/* VDD_PHY_3V3 - USB domain */\n-\t\t\t\tregulator-name = \"ldo7\";\n-\t\t\t\tregulator-min-microvolt = <1800000>;\n-\t\t\t\tregulator-max-microvolt = <3300000>;\n-\t\t\t\tregulator-boot-on;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\t\t};\n-\t};\n-\n-\trtc@68 {\n-\t\tcompatible = \"microcrystal,rv4162\";\n-\t\treg = <0x68>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_rtc>;\n-\t\tinterrupt-parent = <&gpio1>;\n-\t\tinterrupts = <9 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-&i2c2 {\n-\tclock-frequency = <387000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c2>;\n-\tstatus = \"okay\";\n-\n-\tmagnetometer@1e\t{\n-\t\tcompatible = \"st,lsm9ds1-magn\";\n-\t\treg = <0x1e>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_mag>;\n-\t\tinterrupt-parent = <&gpio3>;\n-\t\tinterrupts = <22 IRQ_TYPE_LEVEL_HIGH>;\n-\t\tvdd-supply = <®_vdd_sen>;\n-\t\tvddio-supply = <®_vdd_1v8>;\n-\t};\n-\n-\tregulator@3e {\n-\t\tcompatible = \"tps65132\";\n-\t\treg = <0x3e>;\n-\n-\t\treg_lcd_avdd: outp {\n-\t\t\tregulator-name = \"LCD_AVDD\";\n-\t\t\tvin-supply = <®_lcd_3v4>;\n-\t\t};\n-\n-\t\treg_lcd_avee: outn {\n-\t\t\tregulator-name = \"LCD_AVEE\";\n-\t\t\tvin-supply = <®_lcd_3v4>;\n-\t\t};\n-\t};\n-\n-\tproximity: prox@60 {\n-\t\tcompatible = \"vishay,vcnl4040\";\n-\t\treg = <0x60>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_prox>;\n-\t\tinterrupt-parent = <&gpio3>;\n-\t\tinterrupts = <7 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-\n-\taccel_gyro: accel-gyro@6a\t{\n-\t\tcompatible = \"st,lsm9ds1-imu\";\n-\t\treg = <0x6a>;\n-\t\tvdd-supply = <®_vdd_sen>;\n-\t\tvddio-supply = <®_vdd_1v8>;\n-\t};\n-};\n-\n-&i2c3 {\n-\tclock-frequency = <387000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c3>;\n-\tstatus = \"okay\";\n-\n-\tcodec: audio-codec@1a {\n-\t\tcompatible = \"wlf,wm8962\";\n-\t\treg = <0x1a>;\n-\t\tclocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;\n-\t\tassigned-clocks = <&clk IMX8MQ_CLK_SAI2>;\n-\t\tassigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;\n-\t\tassigned-clock-rates = <24576000>;\n-\t\t#sound-dai-cells = <0>;\n-\t\tmic-cfg = <0x200>;\n-\t\tDCVDD-supply = <®_aud_1v8>;\n-\t\tDBVDD-supply = <®_aud_1v8>;\n-\t\tAVDD-supply = <®_aud_1v8>;\n-\t\tCPVDD-supply = <®_aud_1v8>;\n-\t\tMICVDD-supply = <®_aud_1v8>;\n-\t\tPLLVDD-supply = <®_aud_1v8>;\n-\t\tSPKVDD1-supply = <®_vsys_3v4>;\n-\t\tSPKVDD2-supply = <®_vsys_3v4>;\n-\t\tgpio-cfg = <\n-\t\t\t0x0000 /* n/c */\n-\t\t\t0x0001 /* gpio2, 1: default */\n-\t\t\t0x0013 /* gpio3, 2: dmicclk */\n-\t\t\t0x0000 /* n/c, 3: default */\n-\t\t\t0x8014 /* gpio5, 4: dmic_dat */\n-\t\t\t0x0000 /* gpio6, 5: default */\n-\t\t>;\n-\t};\n-\n-\tcamera_front: camera@20 {\n-\t\tcompatible = \"hynix,hi846\";\n-\t\treg = <0x20>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_csi1>;\n-\t\tclocks = <&clk IMX8MQ_CLK_CLKO2>;\n-\t\tassigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;\n-\t\tassigned-clock-rates = <25000000>;\n-\t\treset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;\n-\t\tvdda-supply = <®_vcam_2v8>;\n-\t\tvddd-supply = <®_vcam_1v2>;\n-\t\tvddio-supply = <®_csi_1v8>;\n-\t\trotation = <90>;\n-\t\torientation = <0>;\n-\n-\t\tport {\n-\t\t\tcamera1_ep: endpoint {\n-\t\t\t\tdata-lanes = <1 2>;\n-\t\t\t\tlink-frequencies = /bits/ 64\n-\t\t\t\t\t<80000000 200000000 300000000>;\n-\t\t\t\tremote-endpoint = <&mipi1_sensor_ep>;\n-\t\t\t};\n-\t\t};\n-\t};\n-\n-\tbacklight@36 {\n-\t\tcompatible = \"ti,lm36922\";\n-\t\treg = <0x36>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_bl>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\tenable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;\n-\t\tvled-supply = <®_vsys_3v4>;\n-\t\tti,ovp-microvolt = <25000000>;\n-\n-\t\tled_backlight: led@0 {\n-\t\t\treg = <0>;\n-\t\t\tlabel = \":backlight\";\n-\t\t\tlinux,default-trigger = \"backlight\";\n-\t\t\tled-max-microamp = <20000>;\n-\t\t};\n-\t};\n-\n-\ttouchscreen@38 {\n-\t\tcompatible = \"edt,edt-ft5506\";\n-\t\treg = <0x38>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_touch>;\n-\t\tinterrupt-parent = <&gpio1>;\n-\t\tinterrupts = <27 IRQ_TYPE_EDGE_FALLING>;\n-\t\ttouchscreen-size-x = <720>;\n-\t\ttouchscreen-size-y = <1440>;\n-\t\tvcc-supply = <®_lcd_1v8>;\n-\t};\n-};\n-\n-&i2c4 {\n-\tclock-frequency = <387000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c4>;\n-\tstatus = \"okay\";\n-\n-\tvcm@c {\n-\t\tcompatible = \"dongwoon,dw9714\";\n-\t\treg = <0x0c>;\n-\t\tvcc-supply = <®_csi_1v8>;\n-\t};\n-\n-\tbat: fuel-gauge@36 {\n-\t\tcompatible = \"maxim,max17055\";\n-\t\treg = <0x36>;\n-\t\tinterrupt-parent = <&gpio3>;\n-\t\tinterrupts = <20 IRQ_TYPE_LEVEL_LOW>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_gauge>;\n-\t\tpower-supplies = <&bq25895>;\n-\t\tmaxim,over-heat-temp = <700>;\n-\t\tmaxim,over-volt = <4500>;\n-\t\tmaxim,rsns-microohm = <5000>;\n-\t};\n-\n-\tbq25895: charger@6a {\n-\t\tcompatible = \"ti,bq25895\", \"ti,bq25890\";\n-\t\treg = <0x6a>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_charger_in>;\n-\t\tinterrupt-parent = <&gpio3>;\n-\t\tinterrupts = <3 IRQ_TYPE_EDGE_FALLING>;\n-\t\tphys = <&usb3_phy0>;\n-\t\tti,precharge-current = <130000>; /* uA */\n-\t\tti,minimum-sys-voltage = <3700000>; /* uV */\n-\t\tti,boost-voltage = <5000000>; /* uV */\n-\t\tti,boost-max-current = <1500000>; /* uA */\n-\t\tti,use-vinmin-threshold = <1>; /* enable VINDPM */\n-\t\tti,vinmin-threshold = <3900000>; /* uV */\n-\t\tmonitored-battery = <&bat>;\n-\t\tpower-supplies = <&typec_pd>;\n-\t};\n-};\n-\n-&lcdif {\n-\tstatus = \"okay\";\n-};\n-\n-&mipi_csi1 {\n-\tstatus = \"okay\";\n-\n-\tports {\n-\t\tport@0 {\n-\t\t\treg = <0>;\n-\n-\t\t\tmipi1_sensor_ep: endpoint {\n-\t\t\t\tremote-endpoint = <&camera1_ep>;\n-\t\t\t\tdata-lanes = <1 2>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-&mipi_dsi {\n-\t#address-cells = <1>;\n-\t#size-cells = <0>;\n-\tstatus = \"okay\";\n-\n-\tlcd_panel: panel@0 {\n-\t\tcompatible = \"mantix,mlaf057we51-x\";\n-\t\treg = <0>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_dsirst>;\n-\t\tavdd-supply = <®_lcd_avdd>;\n-\t\tavee-supply = <®_lcd_avee>;\n-\t\tvddi-supply = <®_lcd_1v8>;\n-\t\tbacklight = <&backlight_dsi>;\n-\t\treset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;\n-\t\tmantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;\n-\n-\t\tport {\n-\t\t\tpanel_in: endpoint {\n-\t\t\t\tremote-endpoint = <&mipi_dsi_out>;\n-\t\t\t};\n-\t\t};\n-\t};\n-\n-\tports {\n-\t\tport@1 {\n-\t\t\treg = <1>;\n-\n-\t\t\tmipi_dsi_out: endpoint {\n-\t\t\t\tremote-endpoint = <&panel_in>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-&pgc_gpu {\n-\tpower-supply = <&buck3_reg>;\n-};\n-\n-&pgc_mipi {\n-\tpower-supply = <&ldo5_reg>;\n-};\n-\n-&pgc_vpu {\n-\tpower-supply = <&buck4_reg>;\n-};\n-\n-&pwm1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_haptic>;\n-\tstatus = \"okay\";\n-};\n-\n-&pwm2 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_led_b>;\n-\tstatus = \"okay\";\n-};\n-\n-&pwm3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_led_r>;\n-\tstatus = \"okay\";\n-};\n-\n-&pwm4 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_led_g>;\n-\tstatus = \"okay\";\n-};\n-\n-&sai2 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_sai2>;\n-\tassigned-clocks = <&clk IMX8MQ_CLK_SAI2>;\n-\tassigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tstatus = \"okay\";\n-};\n-\n-&sai6 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_sai6>;\n-\tassigned-clocks = <&clk IMX8MQ_CLK_SAI6>;\n-\tassigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tfsl,sai-synchronous-rx;\n-\tstatus = \"okay\";\n-};\n-\n-&snvs_pwrkey {\n-\tstatus = \"okay\";\n-};\n-\n-&snvs_rtc {\n-\tstatus = \"disabled\";\n-};\n-\n-&uart1 { /* console */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart1>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart2 { /* TPS - GPS - DEBUG */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart2>;\n-\tstatus = \"okay\";\n-\n-\tgnss {\n-\t\tcompatible = \"globaltop,pa6h\";\n-\t\tvcc-supply = <®_gnss>;\n-\t\tcurrent-speed = <9600>;\n-\t};\n-};\n-\n-&uart3 { /* SMC */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart3>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart4 { /* BT */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart4>;\n-\tuart-has-rtscts;\n-\tstatus = \"okay\";\n-};\n-\n-&usb3_phy0 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb3_phy1 {\n-\tvbus-supply = <®_hub>;\n-\tstatus = \"okay\";\n-};\n-\n-&usb_dwc3_0 {\n-\t#address-cells = <1>;\n-\t#size-cells = <0>;\n-\tdr_mode = \"otg\";\n-\tsnps,dis_u3_susphy_quirk;\n-\tusb-role-switch;\n-\tstatus = \"okay\";\n-\n-\tport@0 {\n-\t\treg = <0>;\n-\n-\t\ttypec_hs: endpoint {\n-\t\t\tremote-endpoint = <&usb_con_hs>;\n-\t\t};\n-\t};\n-\n-\tport@1 {\n-\t\treg = <1>;\n-\n-\t\ttypec_ss: endpoint {\n-\t\t\tremote-endpoint = <&usb_con_ss>;\n-\t\t};\n-\t};\n-};\n-\n-&usb_dwc3_1 {\n-\tdr_mode = \"host\";\n-\tstatus = \"okay\";\n-\t#address-cells = <1>;\n-\t#size-cells = <0>;\n-\n-\t/* Microchip USB2642 */\n-\thub@1 {\n-\t\tcompatible = \"usb424,2640\";\n-\t\treg = <1>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tmass-storage@1 {\n-\t\t\tcompatible = \"usb424,4041\";\n-\t\t\treg = <1>;\n-\t\t};\n-\t};\n-};\n-\n-&usdhc1 {\n-\tassigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;\n-\tassigned-clock-rates = <400000000>;\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc1>;\n-\tpinctrl-1 = <&pinctrl_usdhc1_100mhz>;\n-\tpinctrl-2 = <&pinctrl_usdhc1_200mhz>;\n-\tbus-width = <8>;\n-\tvmmc-supply = <®_vdd_3v3>;\n-\tpower-supply = <®_vdd_1v8>;\n-\tnon-removable;\n-\tstatus = \"okay\";\n-};\n-\n-&usdhc2 {\n-\tassigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;\n-\tassigned-clock-rates = <200000000>;\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc2>;\n-\tpinctrl-1 = <&pinctrl_usdhc2_100mhz>;\n-\tpinctrl-2 = <&pinctrl_usdhc2_200mhz>;\n-\tbus-width = <4>;\n-\tvmmc-supply = <®_wifi_3v3>;\n-\tmmc-pwrseq = <&usdhc2_pwrseq>;\n-\tpost-power-on-delay-ms = <1000>;\n-\tcd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;\n-\tmax-frequency = <50000000>;\n-\tdisable-wp;\n-\tcap-sdio-irq;\n-\tkeep-power-in-suspend;\n-\twakeup-source;\n-\tstatus = \"okay\";\n-};\n-\n-&wdog1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_wdog>;\n-\tfsl,ext-reset-output;\n-\tstatus = \"okay\";\n-};\ndiff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig\nindex 6b5903104a5..dd720b819db 100644\n--- a/arch/arm/mach-imx/imx8m/Kconfig\n+++ b/arch/arm/mach-imx/imx8m/Kconfig\n@@ -429,6 +429,7 @@ config TARGET_LIBREM5\n \tselect IMX8MQ\n \tselect SUPPORT_SPL\n \tselect IMX8M_LPDDR4\n+\timply OF_UPSTREAM\n \n endchoice\n \ndiff --git a/board/purism/librem5/MAINTAINERS b/board/purism/librem5/MAINTAINERS\nindex 09e7f20e33c..818e1850302 100644\n--- a/board/purism/librem5/MAINTAINERS\n+++ b/board/purism/librem5/MAINTAINERS\n@@ -2,7 +2,6 @@ PURISM LIBREM5 PHONE\n M:\tAngus Ainslie <angus@akkea.ca>\n R:\tkernel@puri.sm\n S:\tSupported\n-F:\tarch/arm/dts/imx8mq-librem5*\n F:\tboard/purism/librem5/\n F:\tconfigs/librem5_defconfig\n F:\tinclude/configs/librem5.h\ndiff --git a/configs/librem5_defconfig b/configs/librem5_defconfig\nindex d9d32bf5a50..d01041a67a2 100644\n--- a/configs/librem5_defconfig\n+++ b/configs/librem5_defconfig\n@@ -11,7 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C2=y\n CONFIG_SYS_I2C_MXC_I2C3=y\n CONFIG_SYS_I2C_MXC_I2C4=y\n CONFIG_DM_GPIO=y\n-CONFIG_DEFAULT_DEVICE_TREE=\"imx8mq-librem5-r4\"\n+CONFIG_DEFAULT_DEVICE_TREE=\"freescale/imx8mq-librem5-r4\"\n CONFIG_TARGET_LIBREM5=y\n CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=524288\n", "prefixes": [ "04/13" ] }