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GET /api/1.1/patches/2228197/?format=api
{ "id": 2228197, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228197/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260425-imx8m-of-upstream-v1-8-07527be92e5d@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260425-imx8m-of-upstream-v1-8-07527be92e5d@nxp.com>", "date": "2026-04-25T00:37:00", "name": "[08/13] imx8mm/n: Drop unused dtsi", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "045bd000d447f8cf023a419262a18e558bdc083f", "submitter": { "id": 80723, "url": "http://patchwork.ozlabs.org/api/1.1/people/80723/?format=api", "name": "Peng Fan (OSS)", "email": "peng.fan@oss.nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260425-imx8m-of-upstream-v1-8-07527be92e5d@nxp.com/mbox/", "series": [ { "id": 501451, "url": "http://patchwork.ozlabs.org/api/1.1/series/501451/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=501451", "date": "2026-04-25T00:37:04", "name": "iMX8M: Covert to OF_UPSTREAM", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501451/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228197/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228197/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector1-NXP1-onmicrosoft-com\n header.b=jDXv2iII;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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mx.microsoft.com 1; spf=pass\n smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com;\n dkim=pass header.d=oss.nxp.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com;\n s=selector1-NXP1-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=RUJh5ve+4geS0rrUON5BgbrFt40Tx3xQDcvdq28ySRQ=;\n b=jDXv2iIItoAbkx4AHUivzG0LFroVMyuDVteT0Deu0ghmrffMi0OUfyIz+IhTUaXqx8PAd6slKQOtaastTb5K3/tioa44reM16fTzkntBqRCgyQgMh7tUk7DG79wZllN9/IrNREqsVZZBR/STpzEvCU5V5Av/4XBAnLLXgPQgSfbqctcYnUwwE+GS4Jxdvi++j5GEok/NaEXuJppqK3UYEpjVj3rZTTAp3svuuw3fqIuqhW86K+HPxlroQR7ianBzL+HY4ZwNT6NUqj+rUZEx0QxTiMLoah7L2itTQfts7McNPG6x8wJ6MNIYqG64vMc8sbNzLPPkHOZyMq6fxncIUQ==", "From": "\"Peng Fan (OSS)\" <peng.fan@oss.nxp.com>", "Date": "Sat, 25 Apr 2026 08:37:00 +0800", "Subject": "[PATCH 08/13] imx8mm/n: Drop unused dtsi", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260425-imx8m-of-upstream-v1-8-07527be92e5d@nxp.com>", "References": "<20260425-imx8m-of-upstream-v1-0-07527be92e5d@nxp.com>", "In-Reply-To": "<20260425-imx8m-of-upstream-v1-0-07527be92e5d@nxp.com>", "To": "\"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>, u-boot@lists.denx.de,\n kernel@puri.sm, u-boot@dh-electronics.com", "Cc": "Stefano Babic <sbabic@nabladev.com>, Fabio Estevam <festevam@gmail.com>,\n Tom Rini <trini@konsulko.com>, \"Lukas F. Hartmann\" <lukas@mntre.com>,\n Patrick Wildt <patrick@blueri.se>, Ye Li <ye.li@nxp.com>,\n Frieder Schrempf <frieder.schrempf@kontron.de>,\n Benjamin Hahn <B.Hahn@phytec.de>, Alice Guo <alice.guo@nxp.com>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Marco Franchi <marcofrk@gmail.com>, Alifer Moraes <alifer.wsdm@gmail.com>,\n Angus Ainslie <angus@akkea.ca>, Heiko Thiery <heiko.thiery@gmail.com>,\n Olaf Mandel <o.mandel@menlosystems.com>,\n Jagan Teki <jagan@amarulasolutions.com>,\n Matteo Lisi <matteo.lisi@engicam.com>,\n Manoj Sai <abbaraju.manojsai@amarulasolutions.com>,\n Emanuele Ghidoli <emanuele.ghidoli@toradex.com>,\n Parth Pancholi <parth.pancholi@toradex.com>, Peng Fan <peng.fan@nxp.com>", "X-Mailer": "b4 0.14.3", "X-ClientProxiedBy": "SI2PR01CA0020.apcprd01.prod.exchangelabs.com\n (2603:1096:4:192::6) To PAXPR04MB8459.eurprd04.prod.outlook.com\n (2603:10a6:102:1da::15)", "MIME-Version": "1.0", "X-MS-Exchange-MessageSentRepresentingType": "1", "X-MS-PublicTrafficType": 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"X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 92feb916-c038-49fd-eb40-08dea2582c5a", "X-MS-Exchange-CrossTenant-AuthSource": "PAXPR04MB8459.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Apr 2026 23:21:12.0973 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n e82l3KlubIZDrZbfJmYZ8j7fDjM/I6cVp2iZBHuflXO9UzUJKJqJuGgKa1Ppyvw/V0dYMhtqTnaFGrxDw5BIcA==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM8PR04MB7876", "X-OriginatorOrg": "oss.nxp.com", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Peng Fan <peng.fan@nxp.com>\n\nimx8m[m,n]-beacon-baseboard.dtsi was missed to be deleted in\ncommit f5585124c90a (\"arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM\")\ncommit a64feb974f66 (\"arm64: imx: imx8mn-beacon: Migrate to OF_UPSTREAM\")\n\narch/arm/dts/imx8mn-evk.dtsi was missed to be deleted in\ncommit 73d57e0aa45f (\"imx: imx8mn-evk: convert to OF_UPSTREAM\")\n\nDrop them.\n\nSigned-off-by: Peng Fan <peng.fan@nxp.com>\n---\n arch/arm/dts/imx8mm-beacon-baseboard.dtsi | 437 ------------------------\n arch/arm/dts/imx8mn-beacon-baseboard.dtsi | 309 -----------------\n arch/arm/dts/imx8mn-evk.dtsi | 533 ------------------------------\n 3 files changed, 1279 deletions(-)", "diff": "diff --git a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi\ndeleted file mode 100644\nindex 03266bd90a0..00000000000\n--- a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi\n+++ /dev/null\n@@ -1,437 +0,0 @@\n-// SPDX-License-Identifier: (GPL-2.0 OR MIT)\n-/*\n- * Copyright 2020 Compass Electronics Group, LLC\n- */\n-\n-#include <dt-bindings/phy/phy-imx8-pcie.h>\n-\n-/ {\n-\tleds {\n-\t\tcompatible = \"gpio-leds\";\n-\n-\t\tled0 {\n-\t\t\tlabel = \"gen_led0\";\n-\t\t\tgpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"off\";\n-\t\t};\n-\n-\t\tled1 {\n-\t\t\tlabel = \"gen_led1\";\n-\t\t\tgpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"off\";\n-\t\t};\n-\n-\t\tled2 {\n-\t\t\tlabel = \"gen_led2\";\n-\t\t\tgpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"off\";\n-\t\t};\n-\n-\t\tled3 {\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_led3>;\n-\t\t\tlabel = \"heartbeat\";\n-\t\t\tgpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;\n-\t\t\tlinux,default-trigger = \"heartbeat\";\n-\t\t};\n-\t};\n-\n-\tpcie0_refclk: pcie0-refclk {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <100000000>;\n-\t};\n-\n-\tpcie0_refclk_gated: pcie0-refclk-gated {\n-\t\tcompatible = \"gpio-gate-clock\";\n-\t\tclocks = <&pcie0_refclk>;\n-\t\t#clock-cells = <0>;\n-\t\tenable-gpios = <&pca6416_1 2 GPIO_ACTIVE_LOW>;\n-\t};\n-\n-\treg_audio: regulator-audio {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"3v3_aud\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_usbotg1: regulator-usbotg1 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_reg_usb_otg1>;\n-\t\tregulator-name = \"usb_otg_vbus\";\n-\t\tregulator-min-microvolt = <5000000>;\n-\t\tregulator-max-microvolt = <5000000>;\n-\t\tgpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_camera: regulator-camera {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"mipi_pwr\";\n-\t\tregulator-min-microvolt = <2800000>;\n-\t\tregulator-max-microvolt = <2800000>;\n-\t\tgpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t\tstartup-delay-us = <100000>;\n-\t};\n-\n-\treg_pcie0: regulator-pcie {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"pci_pwr_en\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tenable-active-high;\n-\t\tgpio = <&pca6416_1 1 GPIO_ACTIVE_HIGH>;\n-\t\tstartup-delay-us = <100000>;\n-\t};\n-\n-\treg_usdhc2_vmmc: regulator-usdhc2 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"VSD_3V3\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tsound {\n-\t\tcompatible = \"fsl,imx-audio-wm8962\";\n-\t\tmodel = \"wm8962-audio\";\n-\t\taudio-cpu = <&sai3>;\n-\t\taudio-codec = <&wm8962>;\n-\t\taudio-routing =\n-\t\t\t\"Headphone Jack\", \"HPOUTL\",\n-\t\t\t\"Headphone Jack\", \"HPOUTR\",\n-\t\t\t\"Ext Spk\", \"SPKOUTL\",\n-\t\t\t\"Ext Spk\", \"SPKOUTR\",\n-\t\t\t\"AMIC\", \"MICBIAS\",\n-\t\t\t\"IN3R\", \"AMIC\";\n-\t};\n-};\n-\n-&csi {\n-\tstatus = \"okay\";\n-};\n-\n-&ecspi2 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_espi2>;\n-\tcs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;\n-\tstatus = \"okay\";\n-\n-\teeprom@0 {\n-\t\tcompatible = \"microchip,at25160bn\", \"atmel,at25\";\n-\t\treg = <0>;\n-\t\tspi-max-frequency = <5000000>;\n-\t\tspi-cpha;\n-\t\tspi-cpol;\n-\t\tpagesize = <32>;\n-\t\tsize = <2048>;\n-\t\taddress-width = <16>;\n-\t};\n-};\n-\n-&i2c2 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c2>;\n-\tstatus = \"okay\";\n-\n-\tcamera@3c {\n-\t\tcompatible = \"ovti,ov5640\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_ov5640>;\n-\t\treg = <0x3c>;\n-\t\tclocks = <&clk IMX8MM_CLK_CLKO1>;\n-\t\tclock-names = \"xclk\";\n-\t\tassigned-clocks = <&clk IMX8MM_CLK_CLKO1>;\n-\t\tassigned-clock-parents = <&clk IMX8MM_CLK_24M>;\n-\t\tassigned-clock-rates = <24000000>;\n-\t\tAVDD-supply = <®_camera>; /* 2.8v */\n-\t\tpowerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;\n-\t\treset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;\n-\n-\t\tport {\n-\t\t\t/* MIPI CSI-2 bus endpoint */\n-\t\t\tov5640_to_mipi_csi2: endpoint {\n-\t\t\t\tremote-endpoint = <&imx8mm_mipi_csi_in>;\n-\t\t\t\tclock-lanes = <0>;\n-\t\t\t\tdata-lanes = <1 2>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-&i2c4 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c4>;\n-\tstatus = \"okay\";\n-\n-\twm8962: audio-codec@1a {\n-\t\tcompatible = \"wlf,wm8962\";\n-\t\treg = <0x1a>;\n-\t\tclocks = <&clk IMX8MM_CLK_SAI3_ROOT>;\n-\t\tDCVDD-supply = <®_audio>;\n-\t\tDBVDD-supply = <®_audio>;\n-\t\tAVDD-supply = <®_audio>;\n-\t\tCPVDD-supply = <®_audio>;\n-\t\tMICVDD-supply = <®_audio>;\n-\t\tPLLVDD-supply = <®_audio>;\n-\t\tSPKVDD1-supply = <®_audio>;\n-\t\tSPKVDD2-supply = <®_audio>;\n-\t\tgpio-cfg = <\n-\t\t\t0x0000 /* 0:Default */\n-\t\t\t0x0000 /* 1:Default */\n-\t\t\t0x0000 /* 2:FN_DMICCLK */\n-\t\t\t0x0000 /* 3:Default */\n-\t\t\t0x0000 /* 4:FN_DMICCDAT */\n-\t\t\t0x0000 /* 5:Default */\n-\t\t>;\n-\t};\n-\n-\tpca6416_0: gpio@20 {\n-\t\tcompatible = \"nxp,pcal6416\";\n-\t\treg = <0x20>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_pcal6414>;\n-\t\tgpio-controller;\n-\t\t#gpio-cells = <2>;\n-\t\tinterrupt-parent = <&gpio4>;\n-\t\tinterrupts = <27 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-\n-\tpca6416_1: gpio@21 {\n-\t\tcompatible = \"nxp,pcal6416\";\n-\t\treg = <0x21>;\n-\t\tgpio-controller;\n-\t\t#gpio-cells = <2>;\n-\t\tinterrupt-parent = <&gpio4>;\n-\t\tinterrupts = <27 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-&mipi_csi {\n-\tstatus = \"okay\";\n-\tports {\n-\t\tport@0 {\n-\t\t\timx8mm_mipi_csi_in: endpoint {\n-\t\t\t\tremote-endpoint = <&ov5640_to_mipi_csi2>;\n-\t\t\t\tdata-lanes = <1 2>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-&pcie_phy {\n-\tfsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;\n-\tfsl,tx-deemph-gen1 = <0x2d>;\n-\tfsl,tx-deemph-gen2 = <0xf>;\n-\tfsl,clkreq-unsupported;\n-\tclocks = <&pcie0_refclk_gated>;\n-\tclock-names = \"ref\";\n-\tstatus = \"okay\";\n-};\n-\n-&pcie0 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_pcie0>;\n-\treset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;\n-\tclocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,\n-\t\t <&pcie0_refclk_gated>;\n-\tclock-names = \"pcie\", \"pcie_aux\", \"pcie_bus\";\n-\tassigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,\n-\t\t\t <&clk IMX8MM_CLK_PCIE1_CTRL>;\n-\tassigned-clock-rates = <10000000>, <250000000>;\n-\tassigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,\n-\t\t\t\t <&clk IMX8MM_SYS_PLL2_250M>;\n-\tvpcie-supply = <®_pcie0>;\n-\tstatus = \"okay\";\n-};\n-\n-&sai3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_sai3>;\n-\tassigned-clocks = <&clk IMX8MM_CLK_SAI3>;\n-\tassigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tfsl,sai-mclk-direction-output;\n-\tstatus = \"okay\";\n-};\n-\n-&snvs_pwrkey {\n-\tstatus = \"okay\";\n-};\n-\n-&uart2 { /* console */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart2>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart3>;\n-\tassigned-clocks = <&clk IMX8MM_CLK_UART3>;\n-\tassigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;\n-\tuart-has-rtscts;\n-\tstatus = \"okay\";\n-};\n-\n-&usbotg1 {\n-\tvbus-supply = <®_usbotg1>;\n-\tdisable-over-current;\n-\tdr_mode = \"otg\";\n-\tstatus = \"okay\";\n-};\n-\n-&usbotg2 {\n-\tpinctrl-names = \"default\";\n-\tdisable-over-current;\n-\tdr_mode = \"host\";\n-\tstatus = \"okay\";\n-};\n-\n-&usbphynop2 {\n-\treset-gpios = <&pca6416_1 7 GPIO_ACTIVE_HIGH>;\n-};\n-\n-&usdhc2 {\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;\n-\tpinctrl-1 = <&pinctrl_usdhc2_100mhz>;\n-\tpinctrl-2 = <&pinctrl_usdhc2_200mhz>;\n-\tbus-width = <4>;\n-\tvmmc-supply = <®_usdhc2_vmmc>;\n-\tstatus = \"okay\";\n-};\n-\n-&iomuxc {\n-\tpinctrl_espi2: espi2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK\t\t0x82\n-\t\t\tMX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI\t\t0x82\n-\t\t\tMX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO\t\t0x82\n-\t\t\tMX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9\t\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c2: i2c2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_I2C2_SCL_I2C2_SCL\t\t0x400001c3\n-\t\t\tMX8MM_IOMUXC_I2C2_SDA_I2C2_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c4: i2c4grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_I2C4_SCL_I2C4_SCL\t\t0x400001c3\n-\t\t\tMX8MM_IOMUXC_I2C4_SDA_I2C4_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_led3: led3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_ov5640: ov5640grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7\t\t0x19\n-\t\t\tMX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6\t\t0x19\n-\t\t\tMX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1\t0x59\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pcal6414: pcal6414-gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27\t\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_reg_usb_otg1: usbotg1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pcie0: pcie0grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_sai3: sai3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6\n-\t\t\tMX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6\n-\t\t\tMX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6\n-\t\t\tMX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6\n-\t\t\tMX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0\t0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart2: uart2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX\t0x140\n-\t\t\tMX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX\t0x140\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart3: uart3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX\t0x40\n-\t\t\tMX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX\t0x40\n-\t\t\tMX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B\t0x40\n-\t\t\tMX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B\t0x40\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_gpio: usdhc2gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B\t0x41\n-\t\t\tMX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2: usdhc2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SD2_CLK_USDHC2_CLK\t0x190\n-\t\t\tMX8MM_IOMUXC_SD2_CMD_USDHC2_CMD\t0x1d0\n-\t\t\tMX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d0\n-\t\t\tMX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d0\n-\t\t\tMX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d0\n-\t\t\tMX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d0\n-\t\t\tMX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SD2_CLK_USDHC2_CLK\t0x194\n-\t\t\tMX8MM_IOMUXC_SD2_CMD_USDHC2_CMD\t0x1d4\n-\t\t\tMX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d4\n-\t\t\tMX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d4\n-\t\t\tMX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d4\n-\t\t\tMX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d4\n-\t\t\tMX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MM_IOMUXC_SD2_CLK_USDHC2_CLK\t0x196\n-\t\t\tMX8MM_IOMUXC_SD2_CMD_USDHC2_CMD\t0x1d6\n-\t\t\tMX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d6\n-\t\t\tMX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d6\n-\t\t\tMX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d6\n-\t\t\tMX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d6\n-\t\t\tMX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-};\ndiff --git a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi\ndeleted file mode 100644\nindex 9e82069c941..00000000000\n--- a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi\n+++ /dev/null\n@@ -1,309 +0,0 @@\n-// SPDX-License-Identifier: (GPL-2.0 OR MIT)\n-/*\n- * Copyright 2020 Compass Electronics Group, LLC\n- */\n-\n-/ {\n-\tleds {\n-\t\tcompatible = \"gpio-leds\";\n-\n-\t\tled-0 {\n-\t\t\tlabel = \"gen_led0\";\n-\t\t\tgpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"off\";\n-\t\t};\n-\n-\t\tled-1 {\n-\t\t\tlabel = \"gen_led1\";\n-\t\t\tgpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"off\";\n-\t\t};\n-\n-\t\tled-2 {\n-\t\t\tlabel = \"gen_led2\";\n-\t\t\tgpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"off\";\n-\t\t};\n-\n-\t\tled-3 {\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_led3>;\n-\t\t\tlabel = \"heartbeat\";\n-\t\t\tgpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;\n-\t\t\tlinux,default-trigger = \"heartbeat\";\n-\t\t};\n-\t};\n-\n-\treg_audio: regulator-audio {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"3v3_aud\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_usdhc2_vmmc: regulator-usdhc2 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"vsd_3v3\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\treg_usb_otg_vbus: regulator-usb {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_reg_usb_otg>;\n-\t\tregulator-name = \"usb_otg_vbus\";\n-\t\tregulator-min-microvolt = <5000000>;\n-\t\tregulator-max-microvolt = <5000000>;\n-\t\tgpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tsound {\n-\t\tcompatible = \"fsl,imx-audio-wm8962\";\n-\t\tmodel = \"wm8962-audio\";\n-\t\taudio-cpu = <&sai3>;\n-\t\taudio-codec = <&wm8962>;\n-\t\taudio-routing =\n-\t\t\t\"Headphone Jack\", \"HPOUTL\",\n-\t\t\t\"Headphone Jack\", \"HPOUTR\",\n-\t\t\t\"Ext Spk\", \"SPKOUTL\",\n-\t\t\t\"Ext Spk\", \"SPKOUTR\",\n-\t\t\t\"AMIC\", \"MICBIAS\",\n-\t\t\t\"IN3R\", \"AMIC\";\n-\t};\n-};\n-\n-&ecspi2 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_espi2>;\n-\tcs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;\n-\tstatus = \"okay\";\n-\n-\teeprom@0 {\n-\t\tcompatible = \"microchip,at25160bn\", \"atmel,at25\";\n-\t\treg = <0>;\n-\t\tspi-max-frequency = <5000000>;\n-\t\tspi-cpha;\n-\t\tspi-cpol;\n-\t\tpagesize = <32>;\n-\t\tsize = <2048>;\n-\t\taddress-width = <16>;\n-\t};\n-};\n-\n-&i2c4 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c4>;\n-\tstatus = \"okay\";\n-\n-\tpca6416_0: gpio@20 {\n-\t\tcompatible = \"nxp,pcal6416\";\n-\t\treg = <0x20>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_pcal6414>;\n-\t\tgpio-controller;\n-\t\t#gpio-cells = <2>;\n-\t\tinterrupt-parent = <&gpio4>;\n-\t\tinterrupts = <27 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-\n-\tpca6416_1: gpio@21 {\n-\t\tcompatible = \"nxp,pcal6416\";\n-\t\treg = <0x21>;\n-\t\tgpio-controller;\n-\t\t#gpio-cells = <2>;\n-\t\tinterrupt-parent = <&gpio4>;\n-\t\tinterrupts = <27 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-\n-\twm8962: audio-codec@1a {\n-\t\tcompatible = \"wlf,wm8962\";\n-\t\treg = <0x1a>;\n-\t\tclocks = <&clk IMX8MN_CLK_SAI3_ROOT>;\n-\t\tDCVDD-supply = <®_audio>;\n-\t\tDBVDD-supply = <®_audio>;\n-\t\tAVDD-supply = <®_audio>;\n-\t\tCPVDD-supply = <®_audio>;\n-\t\tMICVDD-supply = <®_audio>;\n-\t\tPLLVDD-supply = <®_audio>;\n-\t\tSPKVDD1-supply = <®_audio>;\n-\t\tSPKVDD2-supply = <®_audio>;\n-\t\tgpio-cfg = <\n-\t\t\t0x0000 /* 0:Default */\n-\t\t\t0x0000 /* 1:Default */\n-\t\t\t0x0000 /* 2:FN_DMICCLK */\n-\t\t\t0x0000 /* 3:Default */\n-\t\t\t0x0000 /* 4:FN_DMICCDAT */\n-\t\t\t0x0000 /* 5:Default */\n-\t\t>;\n-\t};\n-};\n-\n-&easrc {\n-\tfsl,asrc-rate = <48000>;\n-\tstatus = \"okay\";\n-};\n-\n-&sai3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_sai3>;\n-\tassigned-clocks = <&clk IMX8MN_CLK_SAI3>;\n-\tassigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tfsl,sai-mclk-direction-output;\n-\tstatus = \"okay\";\n-};\n-\n-&snvs_pwrkey {\n-\tstatus = \"okay\";\n-};\n-\n-&uart2 { /* console */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart2>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart3>;\n-\tassigned-clocks = <&clk IMX8MN_CLK_UART3>;\n-\tassigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;\n-\tuart-has-rtscts;\n-\tstatus = \"okay\";\n-};\n-\n-&usbotg1 {\n-\tvbus-supply = <®_usb_otg_vbus>;\n-\tdisable-over-current;\n-\tdr_mode = \"otg\";\n-\tstatus = \"okay\";\n-};\n-\n-&usdhc2 {\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;\n-\tpinctrl-1 = <&pinctrl_usdhc2_100mhz>;\n-\tpinctrl-2 = <&pinctrl_usdhc2_200mhz>;\n-\tbus-width = <4>;\n-\tvmmc-supply = <®_usdhc2_vmmc>;\n-\tstatus = \"okay\";\n-};\n-\n-&iomuxc {\n-\tpinctrl_espi2: espi2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK\t\t0x82\n-\t\t\tMX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI\t\t0x82\n-\t\t\tMX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO\t\t0x82\n-\t\t\tMX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9\t\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c2: i2c2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_I2C2_SCL_I2C2_SCL\t\t0x400001c3\n-\t\t\tMX8MN_IOMUXC_I2C2_SDA_I2C2_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c4: i2c4grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_I2C4_SCL_I2C4_SCL\t\t0x400001c3\n-\t\t\tMX8MN_IOMUXC_I2C4_SDA_I2C4_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_led3: led3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pcal6414: pcal6414-gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27\t\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_reg_usb_otg: reg-otggrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_sai3: sai3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0\t0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart2: uart2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX\t0x140\n-\t\t\tMX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX\t0x140\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart3: uart3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX\t0x40\n-\t\t\tMX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX\t0x40\n-\t\t\tMX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B\t0x40\n-\t\t\tMX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B\t0x40\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_gpio: usdhc2gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B\t0x41\n-\t\t\tMX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2: usdhc2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CLK_USDHC2_CLK\t0x190\n-\t\t\tMX8MN_IOMUXC_SD2_CMD_USDHC2_CMD\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d0\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CLK_USDHC2_CLK\t0x194\n-\t\t\tMX8MN_IOMUXC_SD2_CMD_USDHC2_CMD\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d4\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CLK_USDHC2_CLK\t0x196\n-\t\t\tMX8MN_IOMUXC_SD2_CMD_USDHC2_CMD\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d6\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-};\ndiff --git a/arch/arm/dts/imx8mn-evk.dtsi b/arch/arm/dts/imx8mn-evk.dtsi\ndeleted file mode 100644\nindex 261c3654007..00000000000\n--- a/arch/arm/dts/imx8mn-evk.dtsi\n+++ /dev/null\n@@ -1,533 +0,0 @@\n-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n-/*\n- * Copyright 2019 NXP\n- */\n-\n-#include <dt-bindings/usb/pd.h>\n-#include \"imx8mn.dtsi\"\n-\n-/ {\n-\tchosen {\n-\t\tstdout-path = &uart2;\n-\t};\n-\n-\tgpio-leds {\n-\t\tcompatible = \"gpio-leds\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_gpio_led>;\n-\n-\t\tstatus {\n-\t\t\tlabel = \"yellow:status\";\n-\t\t\tgpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;\n-\t\t\tdefault-state = \"on\";\n-\t\t};\n-\t};\n-\n-\tmemory@40000000 {\n-\t\tdevice_type = \"memory\";\n-\t\treg = <0x0 0x40000000 0 0x80000000>;\n-\t};\n-\n-\treg_usdhc2_vmmc: regulator-usdhc2 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;\n-\t\tregulator-name = \"VSD_3V3\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tir-receiver {\n-\t\tcompatible = \"gpio-ir-receiver\";\n-\t\tgpios = <&gpio1 13 GPIO_ACTIVE_LOW>;\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_ir>;\n-\t\tlinux,autosuspend-period = <125>;\n-\t};\n-\n-\taudio_codec_bt_sco: audio-codec-bt-sco {\n-\t\tcompatible = \"linux,bt-sco\";\n-\t\t#sound-dai-cells = <1>;\n-\t};\n-\n-\twm8524: audio-codec {\n-\t\t#sound-dai-cells = <0>;\n-\t\tcompatible = \"wlf,wm8524\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_gpio_wlf>;\n-\t\twlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;\n-\t\tclocks = <&clk IMX8MN_CLK_SAI3_ROOT>;\n-\t\tclock-names = \"mclk\";\n-\t};\n-\n-\tsound-bt-sco {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"bt-sco-audio\";\n-\t\tsimple-audio-card,format = \"dsp_a\";\n-\t\tsimple-audio-card,bitclock-inversion;\n-\t\tsimple-audio-card,frame-master = <&btcpu>;\n-\t\tsimple-audio-card,bitclock-master = <&btcpu>;\n-\n-\t\tbtcpu: simple-audio-card,cpu {\n-\t\t\tsound-dai = <&sai2>;\n-\t\t\tdai-tdm-slot-num = <2>;\n-\t\t\tdai-tdm-slot-width = <16>;\n-\t\t};\n-\n-\t\tsimple-audio-card,codec {\n-\t\t\tsound-dai = <&audio_codec_bt_sco 1>;\n-\t\t};\n-\t};\n-\n-\tsound-wm8524 {\n-\t\tcompatible = \"fsl,imx-audio-wm8524\";\n-\t\tmodel = \"wm8524-audio\";\n-\t\taudio-cpu = <&sai3>;\n-\t\taudio-codec = <&wm8524>;\n-\t\taudio-asrc = <&easrc>;\n-\t\taudio-routing =\n-\t\t\t\"Line Out Jack\", \"LINEVOUTL\",\n-\t\t\t\"Line Out Jack\", \"LINEVOUTR\";\n-\t};\n-\n-\tsound-spdif {\n-\t\tcompatible = \"fsl,imx-audio-spdif\";\n-\t\tmodel = \"imx-spdif\";\n-\t\tspdif-controller = <&spdif1>;\n-\t\tspdif-out;\n-\t\tspdif-in;\n-\t};\n-};\n-\n-&easrc {\n-\tfsl,asrc-rate = <48000>;\n-\tstatus = \"okay\";\n-};\n-\n-&fec1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_fec1>;\n-\tphy-mode = \"rgmii-id\";\n-\tphy-handle = <ðphy0>;\n-\tfsl,magic-packet;\n-\tstatus = \"okay\";\n-\n-\tmdio {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tethphy0: ethernet-phy@0 {\n-\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n-\t\t\treg = <0>;\n-\t\t\treset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;\n-\t\t\treset-assert-us = <10000>;\n-\t\t\tqca,disable-smarteee;\n-\t\t\tvddio-supply = <&vddio>;\n-\n-\t\t\tvddio: vddio-regulator {\n-\t\t\t\tregulator-min-microvolt = <1800000>;\n-\t\t\t\tregulator-max-microvolt = <1800000>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-&flexspi {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_flexspi>;\n-\tstatus = \"okay\";\n-\n-\tflash0: flash@0 {\n-\t\tcompatible = \"jedec,spi-nor\";\n-\t\treg = <0>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <1>;\n-\t\tspi-max-frequency = <166000000>;\n-\t\tspi-tx-bus-width = <4>;\n-\t\tspi-rx-bus-width = <4>;\n-\t};\n-};\n-\n-&i2c1 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c1>;\n-\tstatus = \"okay\";\n-};\n-\n-&i2c2 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c2>;\n-\tstatus = \"okay\";\n-\n-\tptn5110: tcpc@50 {\n-\t\tcompatible = \"nxp,ptn5110\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_typec1>;\n-\t\treg = <0x50>;\n-\t\tinterrupt-parent = <&gpio2>;\n-\t\tinterrupts = <11 IRQ_TYPE_LEVEL_LOW>;\n-\t\tstatus = \"okay\";\n-\n-\t\tport {\n-\t\t\ttypec1_dr_sw: endpoint {\n-\t\t\t\tremote-endpoint = <&usb1_drd_sw>;\n-\t\t\t};\n-\t\t};\n-\n-\t\ttypec1_con: connector {\n-\t\t\tcompatible = \"usb-c-connector\";\n-\t\t\tlabel = \"USB-C\";\n-\t\t\tpower-role = \"dual\";\n-\t\t\tdata-role = \"dual\";\n-\t\t\ttry-power-role = \"sink\";\n-\t\t\tsource-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;\n-\t\t\tsink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)\n-\t\t\t\t PDO_VAR(5000, 20000, 3000)>;\n-\t\t\top-sink-microwatt = <15000000>;\n-\t\t\tself-powered;\n-\t\t};\n-\t};\n-};\n-\n-&i2c3 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c3>;\n-\tstatus = \"okay\";\n-\n-\tpca6416: gpio@20 {\n-\t\tcompatible = \"ti,tca6416\";\n-\t\treg = <0x20>;\n-\t\tgpio-controller;\n-\t\t#gpio-cells = <2>;\n-\t};\n-};\n-\n-&sai2 {\n-\t#sound-dai-cells = <0>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_sai2>;\n-\tassigned-clocks = <&clk IMX8MN_CLK_SAI2>;\n-\tassigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tstatus = \"okay\";\n-};\n-\n-&sai3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_sai3>;\n-\tassigned-clocks = <&clk IMX8MN_CLK_SAI3>;\n-\tassigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tfsl,sai-mclk-direction-output;\n-\tstatus = \"okay\";\n-};\n-\n-&snvs_pwrkey {\n-\tstatus = \"okay\";\n-};\n-\n-&spdif1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_spdif1>;\n-\tassigned-clocks = <&clk IMX8MN_CLK_SPDIF1>;\n-\tassigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;\n-\tassigned-clock-rates = <24576000>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart2 { /* console */\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart2>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart3>;\n-\tassigned-clocks = <&clk IMX8MN_CLK_UART3>;\n-\tassigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;\n-\tuart-has-rtscts;\n-\tstatus = \"okay\";\n-};\n-\n-&usbotg1 {\n-\tdr_mode = \"otg\";\n-\thnp-disable;\n-\tsrp-disable;\n-\tadp-disable;\n-\tusb-role-switch;\n-\tdisable-over-current;\n-\tsamsung,picophy-pre-emp-curr-control = <3>;\n-\tsamsung,picophy-dc-vol-level-adjust = <7>;\n-\tstatus = \"okay\";\n-\n-\tport {\n-\t\tusb1_drd_sw: endpoint {\n-\t\t\tremote-endpoint = <&typec1_dr_sw>;\n-\t\t};\n-\t};\n-};\n-\n-&usdhc2 {\n-\tassigned-clocks = <&clk IMX8MN_CLK_USDHC2>;\n-\tassigned-clock-rates = <200000000>;\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;\n-\tpinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;\n-\tpinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;\n-\tcd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;\n-\tbus-width = <4>;\n-\tvmmc-supply = <®_usdhc2_vmmc>;\n-\tstatus = \"okay\";\n-};\n-\n-&usdhc3 {\n-\tassigned-clocks = <&clk IMX8MN_CLK_USDHC3_ROOT>;\n-\tassigned-clock-rates = <400000000>;\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc3>;\n-\tpinctrl-1 = <&pinctrl_usdhc3_100mhz>;\n-\tpinctrl-2 = <&pinctrl_usdhc3_200mhz>;\n-\tbus-width = <8>;\n-\tnon-removable;\n-\tstatus = \"okay\";\n-};\n-\n-&wdog1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_wdog>;\n-\tfsl,ext-reset-output;\n-\tstatus = \"okay\";\n-};\n-\n-&iomuxc {\n-\tpinctrl_fec1: fec1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_ENET_MDC_ENET1_MDC\t\t0x3\n-\t\t\tMX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO\t0x3\n-\t\t\tMX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3\t0x1f\n-\t\t\tMX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2\t0x1f\n-\t\t\tMX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1\t0x1f\n-\t\t\tMX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0\t0x1f\n-\t\t\tMX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3\t0x91\n-\t\t\tMX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2\t0x91\n-\t\t\tMX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1\t0x91\n-\t\t\tMX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0\t0x91\n-\t\t\tMX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC\t0x1f\n-\t\t\tMX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC\t0x91\n-\t\t\tMX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL\t0x91\n-\t\t\tMX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL\t0x1f\n-\t\t\tMX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_flexspi: flexspigrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2\n-\t\t\tMX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82\n-\t\t\tMX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82\n-\t\t\tMX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82\n-\t\t\tMX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82\n-\t\t\tMX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82\n-\t\t>;\n-\t};\n-\n-\tpinctrl_gpio_led: gpioledgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_gpio_wlf: gpiowlfgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21\t0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_ir: irgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c1: i2c1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_I2C1_SCL_I2C1_SCL\t\t0x400001c3\n-\t\t\tMX8MN_IOMUXC_I2C1_SDA_I2C1_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c2: i2c2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_I2C2_SCL_I2C2_SCL\t\t0x400001c3\n-\t\t\tMX8MN_IOMUXC_I2C2_SDA_I2C2_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c3: i2c3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_I2C3_SCL_I2C3_SCL\t\t0x400001c3\n-\t\t\tMX8MN_IOMUXC_I2C3_SDA_I2C3_SDA\t\t0x400001c3\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pmic: pmicirqgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3\t0x141\n-\t\t>;\n-\t};\n-\n-\tpinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_sai2: sai2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_sai3: sai3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6\n-\t\t\tMX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_spdif1: spdif1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SPDIF_TX_SPDIF1_OUT\t0xd6\n-\t\t\tMX8MN_IOMUXC_SPDIF_RX_SPDIF1_IN\t\t0xd6\n-\t\t>;\n-\t};\n-\n-\tpinctrl_typec1: typec1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11\t0x159\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart2: uart2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX\t0x140\n-\t\t\tMX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX\t0x140\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart3: uart3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX\t\t0x140\n-\t\t\tMX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX\t\t0x140\n-\t\t\tMX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B\t0x140\n-\t\t\tMX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B\t0x140\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_gpio: usdhc2gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15\t0x1c4\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2: usdhc2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CLK_USDHC2_CLK\t\t0x190\n-\t\t\tMX8MN_IOMUXC_SD2_CMD_USDHC2_CMD\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d0\n-\t\t\tMX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d0\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CLK_USDHC2_CLK\t\t0x194\n-\t\t\tMX8MN_IOMUXC_SD2_CMD_USDHC2_CMD\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d4\n-\t\t\tMX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d4\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_SD2_CLK_USDHC2_CLK\t\t0x196\n-\t\t\tMX8MN_IOMUXC_SD2_CMD_USDHC2_CMD\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2\t0x1d6\n-\t\t\tMX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3\t0x1d6\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t0x1d0\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc3: usdhc3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK\t\t0x40000190\n-\t\t\tMX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7\t\t0x1d0\n-\t\t\tMX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE\t\t0x190\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK\t\t0x40000194\n-\t\t\tMX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7\t\t0x1d4\n-\t\t\tMX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE\t\t0x194\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK\t\t0x40000196\n-\t\t\tMX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7\t\t0x1d6\n-\t\t\tMX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE\t\t0x196\n-\t\t>;\n-\t};\n-\n-\tpinctrl_wdog: wdoggrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B\t\t0x166\n-\t\t>;\n-\t};\n-};\n", "prefixes": [ "08/13" ] }