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GET /api/1.1/patches/2228189/?format=api
{ "id": 2228189, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2228189/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260425-imx8m-of-upstream-v1-5-07527be92e5d@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.1/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260425-imx8m-of-upstream-v1-5-07527be92e5d@nxp.com>", "date": "2026-04-25T00:36:57", "name": "[05/13] imx8mq: kontron-pitx-imx8m: Switch OF_UPSTREAM", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "73ef0be7f12ca0b5d5b75e9a14279aa89eb0a5d4", "submitter": { "id": 80723, "url": "http://patchwork.ozlabs.org/api/1.1/people/80723/?format=api", "name": "Peng Fan (OSS)", "email": "peng.fan@oss.nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260425-imx8m-of-upstream-v1-5-07527be92e5d@nxp.com/mbox/", "series": [ { "id": 501451, "url": "http://patchwork.ozlabs.org/api/1.1/series/501451/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=501451", "date": "2026-04-25T00:37:04", "name": "iMX8M: Covert to OF_UPSTREAM", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501451/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228189/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228189/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector1-NXP1-onmicrosoft-com\n header.b=x47gPRx5;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260425-imx8m-of-upstream-v1-5-07527be92e5d@nxp.com>", "References": "<20260425-imx8m-of-upstream-v1-0-07527be92e5d@nxp.com>", "In-Reply-To": "<20260425-imx8m-of-upstream-v1-0-07527be92e5d@nxp.com>", "To": "\"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>, u-boot@lists.denx.de,\n kernel@puri.sm, u-boot@dh-electronics.com", "Cc": "Stefano Babic <sbabic@nabladev.com>, Fabio Estevam <festevam@gmail.com>,\n Tom Rini <trini@konsulko.com>, \"Lukas F. Hartmann\" <lukas@mntre.com>,\n Patrick Wildt <patrick@blueri.se>, Ye Li <ye.li@nxp.com>,\n Frieder Schrempf <frieder.schrempf@kontron.de>,\n Benjamin Hahn <B.Hahn@phytec.de>, Alice Guo <alice.guo@nxp.com>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Marco Franchi <marcofrk@gmail.com>, Alifer Moraes <alifer.wsdm@gmail.com>,\n Angus Ainslie <angus@akkea.ca>, Heiko Thiery <heiko.thiery@gmail.com>,\n Olaf Mandel <o.mandel@menlosystems.com>,\n Jagan Teki <jagan@amarulasolutions.com>,\n Matteo Lisi <matteo.lisi@engicam.com>,\n Manoj Sai <abbaraju.manojsai@amarulasolutions.com>,\n Emanuele Ghidoli <emanuele.ghidoli@toradex.com>,\n Parth Pancholi <parth.pancholi@toradex.com>, Peng Fan <peng.fan@nxp.com>", "X-Mailer": "b4 0.14.3", "X-ClientProxiedBy": "SI2PR01CA0020.apcprd01.prod.exchangelabs.com\n (2603:1096:4:192::6) To PAXPR04MB8459.eurprd04.prod.outlook.com\n (2603:10a6:102:1da::15)", "MIME-Version": "1.0", "X-MS-Exchange-MessageSentRepresentingType": "1", "X-MS-PublicTrafficType": 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"=?utf-8?q?JDneVhl1IxLb8YTbtRWthHtgyarw?=\n\t=?utf-8?q?FdPp7yEQoRU+rUq+nZpSUvuivbJpsgOQKtyXm66NPDN14wMUWhtTY0gm+pcUnYCsu?=\n\t=?utf-8?q?VcBPVyXGR597We1vkYikrvWtm2rwSivRGbp5C0xBsN8rtJYPUySBCCA42qvPF/6ET?=\n\t=?utf-8?q?xiBhq7ta1PZZttSMrVvM7ELqcR0HFJMpxNVBtu+8Vr5uuLfjZNJPX7Tk3G0WQMLCZ?=\n\t=?utf-8?q?zPeywTMMgyr+h9wKYT/pgiJCNHHlK7JHSH9gaeYQt3JjO8hzxY74uPrq3rAKQzwzr?=\n\t=?utf-8?q?wd+FzGYC+Y4tT9QKJl4fcXXkqsaYQA/u17PadHOTals3anbIxXSlnqbmTiyI6Alkb?=\n\t=?utf-8?q?55T+w45BovtVW1M8pUkx8PdVhC5XeaksBHfTJFo1NT7GzF1hB+7pxu0ImEuPNmkiL?=\n\t=?utf-8?q?tD+50Jc0lYGj411L+Bd5sr3RmGFviFyjcpbkFGQ0FZ8L0UA9mGp7AiL0bG2M6RRGU?=\n\t=?utf-8?q?2ut/JJD3rfZi/o6g5snOE/pUOs7egdT4wBc4+zIsDLerk9B/ud0b1JwnvuW8U9nR7?=\n\t=?utf-8?q?zPcRL1hWcRmXGmIMIdrsMilt/UkM3yyiznLP0xwRpIHZjho+ah7/2fDhZlU8zHVfB?=\n\t=?utf-8?q?pyU7gKhrR/yJResyPIENKTaDABbfklGVnx/mpMG0rb6gR8SbfiPiOPlceJbM0bxOW?=\n\t=?utf-8?q?42d7AaZKof6LK41MJvajUwzt4VB8b5ni5gJGyfW92hm+gslGlxMdz9yN1cSeHF22Z?=\n\t=?utf-8?q?qW7ot1P1y/KwoxpPNO31D/ytYjotmYVCDG6vRr7xISRO5lgWmsjTZkDJVMCqxu18O?=\n\t=?utf-8?q?+xibTDrqrivLMnYTzzDuQWoem8YThZ7JSx8oHGefk0vhX0WEEbEbiuQtt0sBz+SWs?=\n\t=?utf-8?q?PYEpZBLVHb8gtbrG1+UjEZs4e23qfx8aVEe38mStsRRrwqv+UImFAY4aOm9KwBmNt?=\n\t=?utf-8?q?YYK5KgC6RqAlX4IJXePlHHYqFGErPZYYi8PorMXKdSH4H2bhf71QpwFr7W+cQtOGa?=\n\t=?utf-8?q?8LBKJXLXSQZWsal/Mvt4ZAmgN2N2HgE0Il284zgMq3bxcaznPYMZvxcFFyAv72bPV?=\n\t=?utf-8?q?hY6R2xmn7GsrS58YODOYQxDCxFJi/ZMuXoPXAIwHBGFvejGF9DAy3LeU1ho6Tyv1w?=\n\t=?utf-8?q?ortOikWLqq8jLp3uC7wkLlPLbzA/WTihLZ48z+iqThJTowtlz5CKc2xFg7XMFP9Pu?=\n\t=?utf-8?q?CRaQIVBVvrgFOVuYjAZCxKDLjT050tzBcVccRr07ye8BY6KKIUCbT5PieKHCucp3F?=\n\t=?utf-8?q?jP5jmC2Q7IzSW9V6mEcFhlYhCoddy9IdUZicnK98gg+2ia5sEUqfNavDfY3+j97iz?=\n\t=?utf-8?q?3MqgArkv9GuYHWOgrxGEyXyiNVAMo9X1UOIdmsTADrWkegXe+GnuRH7rHwCXlG81O?=\n\t=?utf-8?q?6nF/bbXVyo50kaMhj9MscKwVmx8qIMYialBLf4LNNm+jm9iP0c/N1xgiIYePZOlTg?=\n\t=?utf-8?q?ZfCGytJuSXPlyl9XJgV8TYi6vnyHyCFwqtihjehoEhy5ovWtUrkIgGskf8vI4qfJh?=\n\t=?utf-8?q?RS2sBdLv4YIgbFi8XYGpkLclwsfrJ1JA3nPK2tPjojy8LAJ4WsJuj3YZmgXIRol9Q?=\n\t=?utf-8?q?+a7HlhsB0xHcaoIxoINE1u0+aaCtLL3UwKdBIAHu66mq/Os4ZOcZObADardn4M3vG?=\n\t=?utf-8?q?+IGf0UKpsTfvJt08mZ+X9d/zaf+OcBKT+wZtuIolep4iO3p6WBHVpfhAv+koYtkpm?=\n\t=?utf-8?q?BQQkabn8RV5Xu7KvpsTxkyFWZ0cp/L3A=3D=3D?=", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 92be906b-6bfd-4399-75aa-08dea25820f4", "X-MS-Exchange-CrossTenant-AuthSource": "PAXPR04MB8459.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Apr 2026 23:20:52.8359 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n oIpFj2jIofNcrDxdqFHesBj5Yo5Q/XFSBD7caf70Rm41uxw1ACFLTvqmjF63V01JkIGZJpKtZoUp/VnrhEMrkw==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM8PR04MB7876", "X-OriginatorOrg": "oss.nxp.com", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Peng Fan <peng.fan@nxp.com>\n\narch/arm/dts/imx8mq-kontron-pitx-imx8m.dts is almost same as upstream Linux\ndts, so switch to OF_UPSTREAM by dropping the U-Boot copy of the dts,\nenabling OF_UPSTREAM and updating CONFIG_DEFAULT_DEVICE_TREE.\n\nSigned-off-by: Peng Fan <peng.fan@nxp.com>\n---\n arch/arm/dts/Makefile | 3 +-\n arch/arm/dts/imx8mq-kontron-pitx-imx8m.dts | 613 -----------------------------\n arch/arm/mach-imx/imx8m/Kconfig | 1 +\n board/kontron/pitx_imx8m/MAINTAINERS | 1 -\n configs/kontron_pitx_imx8m_defconfig | 2 +-\n 5 files changed, 3 insertions(+), 617 deletions(-)", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex 2cdcfa9f92e..c4360390984 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -888,8 +888,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \\\n \timx8mp-dhcom-pdk3-overlay-rev100.dtbo \\\n \timx8mp-dhcom-picoitx.dtb \\\n \timx8mp-icore-mx8mp-edimm2.2.dtb \\\n-\timx8mp-msc-sm2s.dtb \\\n-\timx8mq-kontron-pitx-imx8m.dtb\n+\timx8mp-msc-sm2s.dtb\n \n dtb-$(CONFIG_ARCH_IMX9) += \\\n \timx93-11x11-frdm.dtb \\\ndiff --git a/arch/arm/dts/imx8mq-kontron-pitx-imx8m.dts b/arch/arm/dts/imx8mq-kontron-pitx-imx8m.dts\ndeleted file mode 100644\nindex a91c136797f..00000000000\n--- a/arch/arm/dts/imx8mq-kontron-pitx-imx8m.dts\n+++ /dev/null\n@@ -1,613 +0,0 @@\n-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n-/*\n- * Device Tree File for the Kontron pitx-imx8m board.\n- *\n- * Copyright (C) 2021 Heiko Thiery <heiko.thiery@gmail.com>\n- */\n-\n-/dts-v1/;\n-\n-#include \"imx8mq.dtsi\"\n-#include <dt-bindings/net/ti-dp83867.h>\n-\n-/ {\n-\tmodel = \"Kontron pITX-imx8m\";\n-\tcompatible = \"kontron,pitx-imx8m\", \"fsl,imx8mq\";\n-\n-\taliases {\n-\t\ti2c0 = &i2c1;\n-\t\ti2c1 = &i2c2;\n-\t\ti2c2 = &i2c3;\n-\t\tmmc0 = &usdhc1;\n-\t\tmmc1 = &usdhc2;\n-\t\tserial0 = &uart1;\n-\t\tserial1 = &uart2;\n-\t\tserial2 = &uart3;\n-\t\tspi0 = &qspi0;\n-\t\tspi1 = &ecspi2;\n-\t};\n-\n-\tchosen {\n-\t\tstdout-path = \"serial2:115200n8\";\n-\t};\n-\n-\tpcie0_refclk: pcie0-clock {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <100000000>;\n-\t};\n-\n-\tpcie1_refclk: pcie1-clock {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <100000000>;\n-\t};\n-\n-\treg_usdhc2_vmmc: regulator-usdhc2-vmmc {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tpinctrl-names = \"default\";\n-\t\tpinctrl-0 = <&pinctrl_reg_usdhc2>;\n-\t\tregulator-name = \"V_3V3_SD\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tgpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;\n-\t\toff-on-delay-us = <20000>;\n-\t\tenable-active-high;\n-\t};\n-};\n-\n-&ecspi2 {\n-\t#address-cells = <1>;\n-\t#size-cells = <0>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;\n-\tcs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;\n-\tstatus = \"okay\";\n-\n-\ttpm@0 {\n-\t\tcompatible = \"infineon,slb9670\";\n-\t\treg = <0>;\n-\t\tspi-max-frequency = <43000000>;\n-\t};\n-};\n-\n-&fec1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_fec1>;\n-\tphy-mode = \"rgmii-id\";\n-\tphy-handle = <ðphy0>;\n-\tfsl,magic-packet;\n-\tstatus = \"okay\";\n-\n-\tmdio {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tethphy0: ethernet-phy@0 {\n-\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n-\t\t\treg = <0>;\n-\t\t\tti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;\n-\t\t\tti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;\n-\t\t\tti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;\n-\t\t\treset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;\n-\t\t\treset-assert-us = <10>;\n-\t\t\treset-deassert-us = <280>;\n-\t\t};\n-\t};\n-};\n-\n-&i2c1 {\n-\tclock-frequency = <400000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c1>;\n-\tstatus = \"okay\";\n-\n-\tpmic@8 {\n-\t\tcompatible = \"fsl,pfuze100\";\n-\t\tfsl,pfuze-support-disable-sw;\n-\t\treg = <0x8>;\n-\n-\t\tregulators {\n-\t\t\tsw1a_reg: sw1ab {\n-\t\t\t\tregulator-name = \"V_0V9_GPU\";\n-\t\t\t\tregulator-min-microvolt = <825000>;\n-\t\t\t\tregulator-max-microvolt = <1100000>;\n-\t\t\t};\n-\n-\t\t\tsw1c_reg: sw1c {\n-\t\t\t\tregulator-name = \"V_0V9_VPU\";\n-\t\t\t\tregulator-min-microvolt = <825000>;\n-\t\t\t\tregulator-max-microvolt = <1100000>;\n-\t\t\t};\n-\n-\t\t\tsw2_reg: sw2 {\n-\t\t\t\tregulator-name = \"V_1V1_NVCC_DRAM\";\n-\t\t\t\tregulator-min-microvolt = <1100000>;\n-\t\t\t\tregulator-max-microvolt = <1100000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tsw3a_reg: sw3ab {\n-\t\t\t\tregulator-name = \"V_1V0_DRAM\";\n-\t\t\t\tregulator-min-microvolt = <825000>;\n-\t\t\t\tregulator-max-microvolt = <1100000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tsw4_reg: sw4 {\n-\t\t\t\tregulator-name = \"V_1V8_S0\";\n-\t\t\t\tregulator-min-microvolt = <1800000>;\n-\t\t\t\tregulator-max-microvolt = <1800000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tswbst_reg: swbst {\n-\t\t\t\tregulator-name = \"NC\";\n-\t\t\t\tregulator-min-microvolt = <5000000>;\n-\t\t\t\tregulator-max-microvolt = <5150000>;\n-\t\t\t};\n-\n-\t\t\tsnvs_reg: vsnvs {\n-\t\t\t\tregulator-name = \"V_0V9_SNVS\";\n-\t\t\t\tregulator-min-microvolt = <1000000>;\n-\t\t\t\tregulator-max-microvolt = <3000000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tvref_reg: vrefddr {\n-\t\t\t\tregulator-name = \"V_0V55_VREF_DDR\";\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tvgen1_reg: vgen1 {\n-\t\t\t\tregulator-name = \"V_1V5_CSI\";\n-\t\t\t\tregulator-min-microvolt = <800000>;\n-\t\t\t\tregulator-max-microvolt = <1550000>;\n-\t\t\t};\n-\n-\t\t\tvgen2_reg: vgen2 {\n-\t\t\t\tregulator-name = \"V_0V9_PHY\";\n-\t\t\t\tregulator-min-microvolt = <850000>;\n-\t\t\t\tregulator-max-microvolt = <975000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tvgen3_reg: vgen3 {\n-\t\t\t\tregulator-name = \"V_1V8_PHY\";\n-\t\t\t\tregulator-min-microvolt = <1675000>;\n-\t\t\t\tregulator-max-microvolt = <1975000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tvgen4_reg: vgen4 {\n-\t\t\t\tregulator-name = \"V_1V8_VDDA\";\n-\t\t\t\tregulator-min-microvolt = <1625000>;\n-\t\t\t\tregulator-max-microvolt = <1875000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tvgen5_reg: vgen5 {\n-\t\t\t\tregulator-name = \"V_3V3_PHY\";\n-\t\t\t\tregulator-min-microvolt = <3075000>;\n-\t\t\t\tregulator-max-microvolt = <3625000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\n-\t\t\tvgen6_reg: vgen6 {\n-\t\t\t\tregulator-name = \"V_2V8_CAM\";\n-\t\t\t\tregulator-min-microvolt = <1800000>;\n-\t\t\t\tregulator-max-microvolt = <3300000>;\n-\t\t\t\tregulator-always-on;\n-\t\t\t};\n-\t\t};\n-\t};\n-\n-\tfan-controller@1b {\n-\t\tcompatible = \"maxim,max6650\";\n-\t\treg = <0x1b>;\n-\t\tmaxim,fan-microvolt = <5000000>;\n-\t};\n-\n-\trtc@32 {\n-\t\tcompatible = \"microcrystal,rv8803\";\n-\t\treg = <0x32>;\n-\t};\n-\n-\tsensor@4b {\n-\t\tcompatible = \"national,lm75b\";\n-\t\treg = <0x4b>;\n-\t};\n-\n-\teeprom@51 {\n-\t\tcompatible = \"atmel,24c32\";\n-\t\treg = <0x51>;\n-\t\tpagesize = <32>;\n-\t};\n-};\n-\n-&i2c2 {\n-\tclock-frequency = <100000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c2>;\n-\tstatus = \"okay\";\n-};\n-\n-&i2c3 {\n-\tclock-frequency = <100000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_i2c3>;\n-\tstatus = \"okay\";\n-};\n-\n-/* M.2 B-key slot */\n-&pcie0 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_pcie0>;\n-\treset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;\n-\tclocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,\n-\t\t <&clk IMX8MQ_CLK_PCIE1_AUX>,\n-\t\t <&clk IMX8MQ_CLK_PCIE1_PHY>,\n-\t\t <&pcie0_refclk>;\n-\tclock-names = \"pcie\", \"pcie_aux\", \"pcie_phy\", \"pcie_bus\";\n-\tstatus = \"okay\";\n-};\n-\n-/* Intel Ethernet Controller I210/I211 */\n-&pcie1 {\n-\tclocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,\n-\t\t <&clk IMX8MQ_CLK_PCIE2_AUX>,\n-\t\t <&clk IMX8MQ_CLK_PCIE2_PHY>,\n-\t\t <&pcie1_refclk>;\n-\tclock-names = \"pcie\", \"pcie_aux\", \"pcie_phy\", \"pcie_bus\";\n-\tfsl,max-link-speed = <1>;\n-\tstatus = \"okay\";\n-};\n-\n-&pgc_gpu {\n-\tpower-supply = <&sw1a_reg>;\n-};\n-\n-&pgc_vpu {\n-\tpower-supply = <&sw1c_reg>;\n-};\n-\n-&qspi0 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_qspi>;\n-\tstatus = \"okay\";\n-\n-\tflash@0 {\n-\t\tcompatible = \"jedec,spi-nor\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <1>;\n-\t\treg = <0>;\n-\t\tspi-tx-bus-width = <1>;\n-\t\tspi-rx-bus-width = <4>;\n-\t\tm25p,fast-read;\n-\t\tspi-max-frequency = <50000000>;\n-\t};\n-};\n-\n-&snvs_pwrkey {\n-\tstatus = \"okay\";\n-};\n-\n-&uart1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart1>;\n-\tassigned-clocks = <&clk IMX8MQ_CLK_UART1>;\n-\tassigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart2 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart2>;\n-\tassigned-clocks = <&clk IMX8MQ_CLK_UART2>;\n-\tassigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;\n-\tstatus = \"okay\";\n-};\n-\n-&uart3 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_uart3>;\n-\tuart-has-rtscts;\n-\tassigned-clocks = <&clk IMX8MQ_CLK_UART3>;\n-\tassigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;\n-\tstatus = \"okay\";\n-};\n-\n-&usb3_phy0 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb3_phy1 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb_dwc3_0 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_usb0>;\n-\tdr_mode = \"otg\";\n-\thnp-disable;\n-\tsrp-disable;\n-\tadp-disable;\n-\tmaximum-speed = \"high-speed\";\n-\tstatus = \"okay\";\n-};\n-\n-&usb_dwc3_1 {\n-\tdr_mode = \"host\";\n-\tstatus = \"okay\";\n-};\n-\n-&usdhc1 {\n-\tassigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;\n-\tassigned-clock-rates = <400000000>;\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc1>;\n-\tpinctrl-1 = <&pinctrl_usdhc1_100mhz>;\n-\tpinctrl-2 = <&pinctrl_usdhc1_200mhz>;\n-\tvqmmc-supply = <&sw4_reg>;\n-\tbus-width = <8>;\n-\tnon-removable;\n-\tno-sd;\n-\tno-sdio;\n-\tstatus = \"okay\";\n-};\n-\n-&usdhc2 {\n-\tassigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;\n-\tassigned-clock-rates = <200000000>;\n-\tpinctrl-names = \"default\", \"state_100mhz\", \"state_200mhz\";\n-\tpinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;\n-\tpinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;\n-\tpinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;\n-\tbus-width = <4>;\n-\tcd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;\n-\twp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;\n-\tvmmc-supply = <®_usdhc2_vmmc>;\n-\tstatus = \"okay\";\n-};\n-\n-&wdog1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_wdog>;\n-\tfsl,ext-reset-output;\n-\tstatus = \"okay\";\n-};\n-\n-&iomuxc {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_hog>;\n-\n-\tpinctrl_hog: hoggrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_NAND_CE1_B_GPIO3_IO2\t\t0x19 /* TPM Reset */\n-\t\t\tMX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4\t\t0x19 /* USB2 Hub Reset */\n-\t\t>;\n-\t};\n-\n-\tpinctrl_gpio: gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5\t\t\t0x19 /* GPIO0 */\n-\t\t\tMX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15\t\t0x19 /* GPIO1 */\n-\t\t\tMX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17\t\t0x19 /* GPIO2 */\n-\t\t\tMX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18\t\t0x19 /* GPIO3 */\n-\t\t\tMX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16\t\t0x19 /* GPIO4 */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10\t\t0x19 /* GPIO5 */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11\t\t0x19 /* GPIO6 */\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12\t\t0x19 /* GPIO7 */\n-\t\t>;\n-\t};\n-\n-\tpinctrl_pcie0: pcie0grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9\t\t0x16 /* PCIE_PERST */\n-\t\t\tMX8MQ_IOMUXC_UART4_TXD_GPIO5_IO29\t\t0x16 /* W_DISABLE */\n-\t\t>;\n-\t};\n-\n-\tpinctrl_reg_usdhc2: regusdhc2gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19\t\t0x41\n-\t\t>;\n-\t};\n-\n-\tpinctrl_fec1: fec1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_ENET_MDC_ENET1_MDC\t\t\t0x3\n-\t\t\tMX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO\t\t0x23\n-\t\t\tMX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3\t\t0x1f\n-\t\t\tMX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2\t\t0x1f\n-\t\t\tMX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1\t\t0x1f\n-\t\t\tMX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0\t\t0x1f\n-\t\t\tMX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3\t\t0x91\n-\t\t\tMX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2\t\t0x91\n-\t\t\tMX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1\t\t0x91\n-\t\t\tMX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0\t\t0x91\n-\t\t\tMX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC\t\t0x1f\n-\t\t\tMX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC\t\t0x91\n-\t\t\tMX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL\t0x91\n-\t\t\tMX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL\t0x1f\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11\t\t0x16\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO15_GPIO1_IO15\t\t0x16\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c1: i2c1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL\t\t\t0x4000007f\n-\t\t\tMX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA\t\t\t0x4000007f\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c2: i2c2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL\t\t\t0x4000007f\n-\t\t\tMX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA\t\t\t0x4000007f\n-\t\t>;\n-\t};\n-\n-\tpinctrl_i2c3: i2c3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL\t\t\t0x4000007f\n-\t\t\tMX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA\t\t\t0x4000007f\n-\t\t>;\n-\t};\n-\n-\tpinctrl_qspi: qspigrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK\t\t0x82\n-\t\t\tMX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B\t\t0x82\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0\t\t0x82\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1\t\t0x82\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2\t\t0x82\n-\t\t\tMX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3\t\t0x82\n-\t\t>;\n-\t};\n-\n-\tpinctrl_ecspi2: ecspi2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI\t\t0x19\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_MISO_ECSPI2_MISO\t\t0x19\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK\t\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_ecspi2_cs: ecspi2csgrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_ECSPI2_SS0_GPIO5_IO13\t\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart1: uart1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX\t\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart2: uart2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX\t\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_uart3: uart3grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B\t\t0x49\n-\t\t\tMX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B\t0x49\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc1: usdhc1grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK\t\t\t0x83\n-\t\t\tMX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD\t\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE\t\t0x83\n-\t\t\tMX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc1_100mhz: usdhc1-100grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK\t\t\t0x8d\n-\t\t\tMX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD\t\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE\t\t0x8d\n-\t\t\tMX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc1_200mhz: usdhc1-200grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK\t\t\t0x9f\n-\t\t\tMX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD\t\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE\t\t0x9f\n-\t\t\tMX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_gpio: usdhc2gpiogrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12\t\t0x41\n-\t\t\tMX8MQ_IOMUXC_SD2_WP_GPIO2_IO20\t\t\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2: usdhc2grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK\t\t\t0x83\n-\t\t\tMX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD\t\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3\t\t0xc3\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_100mhz: usdhc2-100grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK\t\t\t0x8d\n-\t\t\tMX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD\t\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3\t\t0xcd\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usdhc2_200mhz: usdhc2-200grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK\t\t\t0x9f\n-\t\t\tMX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD\t\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3\t\t0xdf\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT\t\t0xc1\n-\t\t>;\n-\t};\n-\n-\tpinctrl_usb0: usb0grp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO12_USB1_OTG_PWR\t\t0x19\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO13_USB1_OTG_OC\t\t0x19\n-\t\t>;\n-\t};\n-\n-\tpinctrl_wdog: wdoggrp {\n-\t\tfsl,pins = <\n-\t\t\tMX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B\t\t0xc6\n-\t\t>;\n-\t};\n-};\ndiff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig\nindex dd720b819db..0e885f97e63 100644\n--- a/arch/arm/mach-imx/imx8m/Kconfig\n+++ b/arch/arm/mach-imx/imx8m/Kconfig\n@@ -327,6 +327,7 @@ config TARGET_KONTRON_PITX_IMX8M\n \tbool \"Support Kontron pITX-imx8m\"\n \tselect IMX8MQ\n \tselect IMX8M_LPDDR4\n+\timply OF_UPSTREAM\n \n config TARGET_TORADEX_SMARC_IMX8MP\n \tbool \"Support Toradex SMARC iMX8M Plus module\"\ndiff --git a/board/kontron/pitx_imx8m/MAINTAINERS b/board/kontron/pitx_imx8m/MAINTAINERS\nindex aad84528e33..8c43526691b 100644\n--- a/board/kontron/pitx_imx8m/MAINTAINERS\n+++ b/board/kontron/pitx_imx8m/MAINTAINERS\n@@ -1,7 +1,6 @@\n Kontron pITX-imx8m Board\n M:\tHeiko Thiery <heiko.thiery@gmail.com>\n S:\tMaintained\n-F:\tarch/arm/dts/imx8mq-kontron-pitx-imx8m*\n F:\tboard/kontron/pitx_imx8m/*\n F:\tinclude/configs/kontron_pitx_imx8m.h\n F:\tconfigs/kontron_pitx_imx8m_defconfig\ndiff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig\nindex 39aeb7bf01c..3b13fea5d68 100644\n--- a/configs/kontron_pitx_imx8m_defconfig\n+++ b/configs/kontron_pitx_imx8m_defconfig\n@@ -8,7 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x300000\n CONFIG_DM_GPIO=y\n-CONFIG_DEFAULT_DEVICE_TREE=\"imx8mq-kontron-pitx-imx8m\"\n+CONFIG_DEFAULT_DEVICE_TREE=\"freescale/imx8mq-kontron-pitx-imx8m\"\n CONFIG_TARGET_KONTRON_PITX_IMX8M=y\n CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=524288\n", "prefixes": [ "05/13" ] }