Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.1/patches/2227851/?format=api
{ "id": 2227851, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2227851/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260424111330.702272-21-changhuang.liang@starfivetech.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260424111330.702272-21-changhuang.liang@starfivetech.com>", "date": "2026-04-24T11:13:30", "name": "[v1,20/20] riscv: dts: starfive: jhb100: Add pinctrl nodes", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9f7d8158a91420d6534c53f9bbd4078df48c034b", "submitter": { "id": 85771, "url": "http://patchwork.ozlabs.org/api/1.1/people/85771/?format=api", "name": "Changhuang Liang", "email": "changhuang.liang@starfivetech.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260424111330.702272-21-changhuang.liang@starfivetech.com/mbox/", "series": [ { "id": 501347, "url": "http://patchwork.ozlabs.org/api/1.1/series/501347/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501347", "date": "2026-04-24T11:13:16", "name": "Add basic pinctrl drivers for JHB100 SoC", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501347/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227851/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227851/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35485-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35485-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=139.219.17.130", "smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=starfivetech.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=starfivetech.com", "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=starfivetech.com;" ], "Received": [ "from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g29mG1K9Vz1yDD\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 24 Apr 2026 21:32:14 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id E4D3C3009398\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 24 Apr 2026 11:31:53 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6DA4C3BBA0A;\n\tFri, 24 Apr 2026 11:31:43 +0000 (UTC)", "from CHN02-BJS-obe.outbound.protection.partner.outlook.cn\n (mail-bjschn02on2130.outbound.protection.partner.outlook.cn [139.219.17.130])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 722F23BB9EF;\n\tFri, 24 Apr 2026 11:31:41 +0000 (UTC)", "from ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn\n (2406:e500:c550:17::6) by ZQ4PR01MB1156.CHNPR01.prod.partner.outlook.cn\n (2406:e500:c550:14::9) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.22; Fri, 24 Apr\n 2026 11:14:05 +0000", "from ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn\n ([fe80::e7d4:256c:b066:850d]) by\n ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn ([fe80::e7d4:256c:b066:850d%5])\n with mapi id 15.20.9846.021; Fri, 24 Apr 2026 11:14:05 +0000" ], "ARC-Seal": [ "i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777030303; cv=fail;\n b=FGXSI+V/Dp4G+r8ABla6Djhh62VK2k/f01Qs6yOMUSI4HvKIEAIORK49OI9FyaoRlAqt8j30ajGwpKN/lgobI308dVVqRn99TwbA3WiBr3SQwo1r7RIKT7aGDFZ/B7fECn/9K6OtO952CrNNRs0oBLDdaj0iAdTrySJzCPptcG8=", "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=UdKUiLDUy0Lnpc5syKYEMGZLLZ9clUvBO+Glj+Ail3oFtQ9ZlWKsKRlJ+qK3dmvUgQe+v8BL89Sv7LfqAT9NLJPGC4Hbf4CieqhSvUVHlauviRyB+Ta8FqJRW08cQdE+pYapK1MoSkqsjhze2URB0lyr1ybWNYCLsfbCLNr3uBgRieD4LTrbxos111Q2IrytfLFyQskv3tIEussQPuefwU5rlkwbXxPWnr5nDgcEhPBbhCJaVddyuBIMNwolTp344teUwzdQA5+t+iXHYR1O5hiT8eGpEYi2EZBMpn7+3f+jpe49SzZVDGkC6ALoyprCL0zJexuRAZfrq13iLxjD5w==" ], "ARC-Message-Signature": [ "i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777030303; c=relaxed/simple;\n\tbh=u4RxIPaD/sMwMmx6TkOhP5cFViqkljkque8/eEVoJMw=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t Content-Type:MIME-Version;\n b=A5khfnAHcbcfH6stTWUsT3NOb3uoKjHN0N6o/MShv0Gp2QKH7UWrTgDdxIQqighog2AyuPhciaWXzwEP84sno5m+5sBa48gvRZj6+kQOSKTKZbTL+zXiebSIGh1Zv95JnBynCYTQLeNQK+g3yCytRM92hy8hkkeE/wqUfgCz1Ew=", "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=x62Cw3kMukZ3Zlz0GV4L4ijw4W9uKalNijYhMMSyNZI=;\n b=JSapMT1jPlRAoLJWwMva23a0EkK6odUjnkWZuMr4Zl9lwswjuqhDAbZWzsoAth75RijZsK0USks+NGx3fHPigMTY3RSwic71LuGacyGwQ6bkGJisHwivSPmiAIm5cKCWcbusYZ2O5VVyd9EAHaMuMbkOanqvdshBELJA2cPFtUc7VUwse1X9C1ctJyvfKltjsMnkiqSiW+CN+flvXNrSZCW0zP2zWcMt2FG762zoUD8JlZivco9Dg4Cy3xC2UcJs0cqCgQj3yQ3k2AkjFV9m08tT96WK3OKsi50aF8vPH8IAL4JIGmlSgU6CU/yhw8L+TGOJaZj5CBmhz8lMJgnk3A==" ], "ARC-Authentication-Results": [ "i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=starfivetech.com;\n spf=pass smtp.mailfrom=starfivetech.com;\n arc=fail smtp.client-ip=139.219.17.130", "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=starfivetech.com; dmarc=pass action=none\n header.from=starfivetech.com; dkim=pass header.d=starfivetech.com; arc=none" ], "From": "Changhuang Liang <changhuang.liang@starfivetech.com>", "To": "Linus Walleij <linusw@kernel.org>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tEmil Renner Berthing <kernel@esmil.dk>,\n\tPaul Walmsley <pjw@kernel.org>,\n\tAlbert Ou <aou@eecs.berkeley.edu>,\n\tPalmer Dabbelt <palmer@dabbelt.com>,\n\tAlexandre Ghiti <alex@ghiti.fr>,\n\tPhilipp Zabel <p.zabel@pengutronix.de>,\n\tBartosz Golaszewski <brgl@kernel.org>", "Cc": "linux-gpio@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-riscv@lists.infradead.org,\n\tLianfeng Ouyang <lianfeng.ouyang@starfivetech.com>,\n\tChanghuang Liang <changhuang.liang@starfivetech.com>", "Subject": "[PATCH v1 20/20] riscv: dts: starfive: jhb100: Add pinctrl nodes", "Date": "Fri, 24 Apr 2026 04:13:30 -0700", "Message-Id": "<20260424111330.702272-21-changhuang.liang@starfivetech.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260424111330.702272-1-changhuang.liang@starfivetech.com>", "References": "<20260424111330.702272-1-changhuang.liang@starfivetech.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "SHXPR01CA0025.CHNPR01.prod.partner.outlook.cn\n (2406:e500:c311:1b::34) To ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn\n (2406:e500:c550:17::6)", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "ZQ4PR01MB1202:EE_|ZQ4PR01MB1156:EE_", "X-MS-Office365-Filtering-Correlation-Id": "68261140-260c-4332-6554-08dea1f298f8", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|7416014|52116014|376014|366016|1800799024|38350700014|921020|56012099003|18002099003|22082099003;", "X-Microsoft-Antispam-Message-Info": "\n\tF0Q1Hlpov/A9D8OgOUfGVypugThlrKkRvjE6yHxNbZaJYNpfZomgrMeOeSJWlwaRcqndc8NdLBgnT9xQpjyLzXqBxMxMmLrdDsxDidfHRDIcMVGaG9wwCD51P5G9JzOceedVYrEc1o35avJ7X5gDQK6UgwV/RxyOFDP5C6kBifFKZMljEDb7PHJQLyhlH/lU9cwZMf8xZ+nPDtrmosuIvLWh8QgjNlv//l/NlWQhbMMu33TdG34DPJam+4Lhl9yFwIAPQOgKVZNLZ7GgJCpKYc48XzwJ4n29P38qxfx7B1WrEZs2HUvJcmb6j+J/3nklklXQsK5WdybTgNVCVGdX4bk2K/aauqtjRp6E5Ev7ehM8BYE2i+XAMEFwv4gk0yDuJ17afqdVLLGsPbUEyoe5CK8cXT3Fl4KmSOjFOsp4H2731rF0QRLe4gyua22AiVRLkipYVdMJ3eQ8Z4h5VcNvuGeJfEjcgcaAdHxbnlB1Min4yJbfJaVDVTeiWzudbkVTBimxMbZngMULQCyk6qmIXkMChOX8h5MYps7TzC0sseKuQoI7HU//nv7z3kihoUSUvqcFqcbrKB/HLQJavfNHmzX8pcOfNzWwqu/QcWy3R5w=", "X-Forefront-Antispam-Report": "\n\tCIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn;PTR:;CAT:NONE;SFS:(13230040)(7416014)(52116014)(376014)(366016)(1800799024)(38350700014)(921020)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1102;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n Rx6yqdqas9bBjt0T61j7KnLZ+MgXQ7DkhxTzezc0kNqZSiDmtgaxpWZFxRDxIWe9ySxZuysM12L0o/vI2WZ2YZx3/jwS4bn7ZfUSz4cd6rjt2dEch61abcKf6z8qZSrEFAX7JQ8nFxF8ex13cF+dYBESzsrxOryJ4FlfgpIhyL4U1E+CWTYnpYyqxSCpbo2XDUmgENHUoAvZMdTXcz+i848Dao3qpn6KPbaaBL6KEnIHQDTVDShugJ6ZPenyXdEQAQ3FasaXFWX47dIIkQQyVB3wpSCovaF59GBZiRCunPGcUOHkPs9YIGczbPrT7Sqa+MafDG6aOw4Af9nquuFMrjMlpAKGQkc6RqFHjPB70yO/uhaz1rvFNJptMRYQUcxzCWxuxVW9ylGrpFkP7cRKaBumNZVDEkUYF5321EoQ+j3Lexnd1K9thXZJqajdIPoqSlmdLEEA8amsIGsu71wsCth1tmDYCU+5vSWDvltG5uA9z/xI004zbbbbCNGLQwk2Z2Tj5nqttFhz5u1CchfajyqrSGfs1w2lV5Q8wFJh/Z4J5rVtqFIu5wDGIyknmi41yfYuqT8Zonw5urpLRvWLffjipLL1GPWyw3/xM263rJGT9RLbM2D5Cn+ED4d6Zo7Y2/s6rwxqfxF/mNnNlbF48OZ2CIkdGakJWLr9Kyhf/DmadzMcngosnHxzLHXbGQkGZkgm+c7ABMMMSen0BYNRoIgUEUX9skT/15oYgWVps38E2FJ5OKhDcQpJdFStMZ00r8f/9ZDf6OVqkKDz7vwibREorWG+G+eojNDvHnpn0lCt6FHmKcXCV3EDCQFhw+Kn6DHBta2mbHjvxFBEB83YxkkB5N0t0/lqadLzWQwTExOIE78/uK5X0INN/ihN01cahZvwuMw0fDgfsJnmXz1gTqvmYqreMiqessr82yVNclb4e5dgfNc1vOQxc6kPl06JuPYta8iN3ZccMvGY7KJwj3wbDiXKB+n+iEp4duDL4j7rPcQ93rH+TOeVBqo3OVB68fBfo83yRxBklUYJE5U9uYoR7tHrIHmQ/gmXwLDHeBep0z71VAbdypsmwUFBOjvfjE86A86YmYCy4++zmYPQj46/HspVQaCX7p0MXvMv31OrE9BnMP8F/iqtG0sDhbv+oanY8dwzaukLUhF4zghWPOIa5IvXJZpFddGECDCfByp9EWT6eCkqc7GMvmlEHdu7q8Xv2qL/NOtkiBAm+MaFs2vZKbboDMxm1g7jxztxKEfvsSqhDFzIis9NYRPN2jzMqH+vfadDi3C1RpoCOlnJKm6zLOVpgNa1rrGHmb8frFRy+OTjYnDXNlLElWlnQ6dp/LlT6HYqCN/qvGF5ImdIcTp/10XUINRYa5kYLoUw4/DwNqv92KIVjwijp0OjePMNhxii+kxb4LrhMTke7exuTp9UdBlPh2531k1Ysn/g/6FkBFnST5fdcA1IDJSvPj8am3GEdfheLvw1Ow2A8dr2QqgORbE7is7svCGhx4NuzS3fzPqQoYT6HwNfqTgqRxqLnYE3m8cIoEKVD79KQ9AtIva2yZCo3Ro0PBNcvsRR6NVc7uJLvCtKDRgMImDEy5UZtiA1qHDwvLxufnws8aTYzySEYnyQRaOXD+lpaYwMpL4+SShnAkxyJzLWyXPvh3tfzhh1bDpmjFgTZNYFM4Rg26gIDeB/xHN1kuCV/xHqCX7witaoKfAhf/94ywheZypO2AncJ4H/c0ZrG9qWnazfsWPUF4JJEAPIzpgygQAS5OJxdgQfKqFoWM2vED6ojo5m", "X-OriginatorOrg": "starfivetech.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 68261140-260c-4332-6554-08dea1f298f8", "X-MS-Exchange-CrossTenant-AuthSource": "\n ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Apr 2026 11:14:05.4819\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "06fe3fa3-1221-43d3-861b-5a4ee687a85c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n 5bPdHmzQd7Dx0sxsidd3yHfstG2SFPLf4D0JlN1zn3zTxWrXLKQtAAw1bgqLHXmKVjV3ITqhneMTjjG5rHB4KFmnh2YJ0g+4GquC12BnYfKD+3sZokmi66MFLZ6K+thV", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "ZQ4PR01MB1156" }, "content": "Add pinctrl nodes for starfive JHB100 SoC. They contain\npinctrl_per0/pinctrl_per1/pinctrl_per2/pinctrl_per2pok/pinctrl_per3/\npinctrl_sys0/pinctrl_sys0h/pinctrl_sys1/pinctrl_sys2.\n\nSigned-off-by: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>\nSigned-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>\n---\n .../boot/dts/starfive/jhb100-evb1-eth.dts | 27 +++++\n arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi | 4 +\n .../boot/dts/starfive/jhb100-pinctrl.dtsi | 19 ++++\n arch/riscv/boot/dts/starfive/jhb100.dtsi | 107 ++++++++++++++++++\n 4 files changed, 157 insertions(+)\n create mode 100644 arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi", "diff": "diff --git a/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts b/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts\nindex 62cd046e1224..f7e82f9d0ff1 100644\n--- a/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts\n+++ b/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts\n@@ -4,3 +4,30 @@\n */\n \n #include \"jhb100-evb1.dtsi\"\n+\n+&pinctrl_per0 {\n+\tgpioe-i3c0-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB8-11, 32-33 */\n+\tgpioe-i3c1-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB12-15, 34-35 */\n+\tgpioe-i3c2-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB16-23 */\n+\tgpioe-i3c4-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB36-43 */\n+};\n+\n+&pinctrl_per1 {\n+\tgpioe-spi-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC0-4 */\n+\tgpioe-qspi0-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC5-11 */\n+\tgpioe-qspi1-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC12-19 */\n+\tgpioe-qspi2-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC20-27 */\n+};\n+\n+&pinctrl_per2 {\n+\tgpionw-vref = <JHB100_PINVREF_1_8V>; /* VREF for GPIOD19-30 */\n+};\n+\n+&pinctrl_per3 {\n+\tgpios-vref = <JHB100_PINVREF_1_8V>; /* VREF for GPIOE0-10 */\n+};\n+\n+&pinctrl_sys2 {\n+\tgpiow-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOA36-39 */\n+\tgpiow-inner-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOA40-43 */\n+};\ndiff --git a/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi b/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi\nindex 462b6fb7953b..acd5949bcfdb 100644\n--- a/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi\n+++ b/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi\n@@ -3,7 +3,9 @@\n * Copyright (c) 2024-2026 StarFive Technology Co., Ltd.\n */\n \n+#include \"jhb100-pinfunc.h\"\n #include \"jhb100.dtsi\"\n+#include \"jhb100-pinctrl.dtsi\"\n \n / {\n \tmodel = \"StarFive JHB100 EVB-1\";\n@@ -29,4 +31,6 @@ memory@40000000 {\n \n &uart6 {\n \tstatus = \"okay\";\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&uart6_pins>;\n };\ndiff --git a/arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi b/arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi\nnew file mode 100644\nindex 000000000000..d12b79376521\n--- /dev/null\n+++ b/arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi\n@@ -0,0 +1,19 @@\n+// SPDX-License-Identifier: GPL-2.0 OR MIT\n+/*\n+ * Copyright (c) 2025-2026 StarFive Technology Co., Ltd.\n+ */\n+\n+&pinctrl_sys2 {\n+\tuart6_pins: uart6-grp {\n+\t\tuart6-tx-pins {\n+\t\t\tpinmux = <PINMUX(PADNUM_SYS2_GPIO_A38,\n+\t\t\t\t\t FUNC_SYS2_UART6_TX)>;\n+\t\t};\n+\n+\t\tuart6-rx-pins {\n+\t\t\tpinmux = <PINMUX(PADNUM_SYS2_GPIO_A39,\n+\t\t\t\t\t FUNC_SYS2_UART6_RX)>;\n+\t\t\tinput-enable;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/riscv/boot/dts/starfive/jhb100.dtsi b/arch/riscv/boot/dts/starfive/jhb100.dtsi\nindex 700d00f800bc..74d427d7f2df 100644\n--- a/arch/riscv/boot/dts/starfive/jhb100.dtsi\n+++ b/arch/riscv/boot/dts/starfive/jhb100.dtsi\n@@ -425,6 +425,18 @@ per0crg: clock-controller@11a08000 {\n \t\t\t\t#reset-cells = <1>;\n \t\t\t};\n \n+\t\t\tpinctrl_per0: pinctrl@11a0a000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-per0-pinctrl\";\n+\t\t\t\treg = <0x0 0x11a0a000 0x0 0x1000>;\n+\t\t\t\tresets = <&per0crg JHB100_PER0RST_GPIO_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <60>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_per0 0 0 60>;\n+\t\t\t};\n+\n \t\t\tper1crg: clock-controller@11b40000 {\n \t\t\t\tcompatible = \"starfive,jhb100-per1crg\";\n \t\t\t\treg = <0x0 0x11b40000 0x0 0x1000>;\n@@ -440,6 +452,18 @@ per1crg: clock-controller@11b40000 {\n \t\t\t\t#reset-cells = <1>;\n \t\t\t};\n \n+\t\t\tpinctrl_per1: pinctrl@11b42000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-per1-pinctrl\";\n+\t\t\t\treg = <0x0 0x11b42000 0x0 0x800>;\n+\t\t\t\tresets = <&per1crg JHB100_PER1RST_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <61>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_per1 0 0 36>;\n+\t\t\t};\n+\n \t\t\tper2crg: clock-controller@11bc0000 {\n \t\t\t\tcompatible = \"starfive,jhb100-per2crg\";\n \t\t\t\treg = <0x0 0x11bc0000 0x0 0x1000>;\n@@ -461,6 +485,30 @@ per2crg: clock-controller@11bc0000 {\n \t\t\t\t#reset-cells = <1>;\n \t\t\t};\n \n+\t\t\tpinctrl_per2: pinctrl@11bc2000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-per2-pinctrl\";\n+\t\t\t\treg = <0x0 0x11bc2000 0x0 0x400>;\n+\t\t\t\tresets = <&per2crg JHB100_PER2RST_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <62>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_per2 0 0 31>;\n+\t\t\t};\n+\n+\t\t\tpinctrl_per2pok: pinctrl@11bc2400 {\n+\t\t\t\tcompatible = \"starfive,jhb100-per2pok-pinctrl\";\n+\t\t\t\treg = <0x0 0x11bc2400 0x0 0x400>;\n+\t\t\t\tresets = <&per2crg JHB100_PER2RST_POK_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <63>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_per2pok 0 0 18>;\n+\t\t\t};\n+\n \t\t\tper3crg: clock-controller@11c40000 {\n \t\t\t\tcompatible = \"starfive,jhb100-per3crg\";\n \t\t\t\treg = <0x0 0x11c40000 0x0 0x1000>;\n@@ -480,6 +528,18 @@ per3crg: clock-controller@11c40000 {\n \t\t\t\t#reset-cells = <1>;\n \t\t\t};\n \n+\t\t\tpinctrl_per3: pinctrl@11c42000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-per3-pinctrl\";\n+\t\t\t\treg = <0x0 0x11c42000 0x0 0x1000>;\n+\t\t\t\tresets = <&per3crg JHB100_PER3RST_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <64>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_per3 0 0 11>;\n+\t\t\t};\n+\n \t\t\tsys0crg: clock-controller@13000000 {\n \t\t\t\tcompatible = \"starfive,jhb100-sys0crg\";\n \t\t\t\treg = <0x0 0x13000000 0x0 0x4000>;\n@@ -513,6 +573,53 @@ sys2crg: clock-controller@13008000 {\n \t\t\t\t#clock-cells = <1>;\n \t\t\t\t#reset-cells = <1>;\n \t\t\t};\n+\n+\t\t\tpinctrl_sys0: pinctrl@13080000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-sys0-pinctrl\";\n+\t\t\t\treg = <0x0 0x13080000 0x0 0x800>;\n+\t\t\t\tresets = <&sys0crg JHB100_SYS0RST_SYS0_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <56>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_sys0 0 0 4>;\n+\t\t\t};\n+\n+\t\t\tpinctrl_sys0h: pinctrl@13080800 {\n+\t\t\t\tcompatible = \"starfive,jhb100-sys0h-pinctrl\";\n+\t\t\t\treg = <0x0 0x13080800 0x0 0x800>;\n+\t\t\t\tresets = <&sys0crg JHB100_SYS0RST_SYS0H_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <57>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_sys0h 0 0 12>;\n+\t\t\t};\n+\n+\t\t\tpinctrl_sys1: pinctrl@13081000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-sys1-pinctrl\";\n+\t\t\t\treg = <0x0 0x13081000 0x0 0x1000>;\n+\t\t\t\tresets = <&sys1crg JHB100_SYS1RST_SYS1_IOMUX_PRESETN>;\n+\t\t\t\tinterrupts = <58>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_sys1 0 0 8>;\n+\t\t\t};\n+\n+\t\t\tpinctrl_sys2: pinctrl@13082000 {\n+\t\t\t\tcompatible = \"starfive,jhb100-sys2-pinctrl\";\n+\t\t\t\treg = <0x0 0x13082000 0x0 0x1000>;\n+\t\t\t\tinterrupts = <59>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t\tgpio-ranges = <&pinctrl_sys2 0 0 37>;\n+\t\t\t};\n \t\t};\n \t};\n };\n", "prefixes": [ "v1", "20/20" ] }