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GET /api/1.1/patches/2227792/?format=api
{ "id": 2227792, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2227792/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1777017460-243543-7-git-send-email-shawn.lin@rock-chips.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<1777017460-243543-7-git-send-email-shawn.lin@rock-chips.com>", "date": "2026-04-24T07:57:39", "name": "[v4,6/7] PCI: switchtec: Replace pci_alloc_irq_vectors() with pcim_alloc_irq_vectors()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "79c0e66d63958fdf59b67b111934c5179894d57c", "submitter": { "id": 66993, "url": "http://patchwork.ozlabs.org/api/1.1/people/66993/?format=api", "name": "Shawn Lin", "email": "shawn.lin@rock-chips.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1777017460-243543-7-git-send-email-shawn.lin@rock-chips.com/mbox/", "series": [ { "id": 501313, "url": "http://patchwork.ozlabs.org/api/1.1/series/501313/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501313", "date": "2026-04-24T07:57:33", "name": "Add Devres managed IRQ vectors allocation", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/501313/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227792/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227792/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53127-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=OOveTkta;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53127-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=\"OOveTkta\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=45.254.49.224", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=rock-chips.com" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g26pK3swfz1yDD\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 24 Apr 2026 19:18:49 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id B8789300A774\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 24 Apr 2026 09:15:32 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5C2A335F197;\n\tFri, 24 Apr 2026 09:15:31 +0000 (UTC)", "from mail-m49224.qiye.163.com (mail-m49224.qiye.163.com\n [45.254.49.224])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 316F331A556\n\tfor <linux-pci@vger.kernel.org>; Fri, 24 Apr 2026 09:15:26 +0000 (UTC)", "from localhost.localdomain (unknown [61.154.14.86])\n\tby smtp.qiye.163.com (Hmail) with ESMTP id 3c022059e;\n\tFri, 24 Apr 2026 15:59:30 +0800 (GMT+08:00)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777022131; cv=none;\n b=hB8nQa5ryVJEpUPsibX2Thlamyg3VWL549iYphZ+iQAxXOQLcto78zHhlCswgrCGzXJg2YqvEvuMS0lTB2y++/Jjm89y9HWS64VulCoi2L7Eb/XQQnE3dg7k4+xY71mdTWWjMiAvyqocHJY67CUHntgJhkDeDEt6mCeOPj0ndac=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777022131; c=relaxed/simple;\n\tbh=cfWULAyqZ21m0P6B9wCMb+bIoZiQS7Sgi0RoAFHp80A=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References;\n b=U6QbATxeMwyUL9xW711S++vnJ6jsDdRxbCUREavolHAZzC8O9XjzqhW4zGnKi2aApHo3D+4RD3uqG/rqFg+s+j/P4LcJaxRzKUE+7NTOzvok7XDqOxvZS/hBi1z2ZLD24V9C16h4q7oWu5hasX24CeDqVUxWOuUWt+RYwSMSAk4=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com;\n spf=pass smtp.mailfrom=rock-chips.com;\n dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=OOveTkta; arc=none smtp.client-ip=45.254.49.224", "From": "Shawn Lin <shawn.lin@rock-chips.com>", "To": "Bjorn Helgaas <bhelgaas@google.com>", "Cc": "Nirmal Patel <nirmal.patel@linux.intel.com>,\n\tJonathan Derrick <jonathan.derrick@linux.dev>,\n\tKurt Schwemmer <kurt.schwemmer@microsemi.com>,\n\tLogan Gunthorpe <logang@deltatee.com>,\n\tPhilipp Stanner <phasta@kernel.org>,\n\tlinux-pci@vger.kernel.org,\n\tShawn Lin <shawn.lin@rock-chips.com>", "Subject": "[PATCH v4 6/7] PCI: switchtec: Replace pci_alloc_irq_vectors() with\n pcim_alloc_irq_vectors()", "Date": "Fri, 24 Apr 2026 15:57:39 +0800", "Message-Id": "<1777017460-243543-7-git-send-email-shawn.lin@rock-chips.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1777017460-243543-1-git-send-email-shawn.lin@rock-chips.com>", "References": "<1777017460-243543-1-git-send-email-shawn.lin@rock-chips.com>", "X-HM-Tid": "0a9dbe80436d09cckunm66d640875ecd1", "X-HM-MType": "1", "X-HM-Spam-Status": "e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVkaH0tDVh0fHU8aThkdHUxPSVYVFA\n\tkWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSU\n\t9PT0hVSktLVUpCS0tZBg++", "DKIM-Signature": "a=rsa-sha256;\n\tb=OOveTktaF3TfaMNFDF2SWyWFKU/EeLdpONqtKR7+OUw2HGYKYo40rHBZ0Ld8R2MVHyTzB/BsDfQb+Q6bRS06Lv2YTiKXyzOkae92cgQZWSEBDuZUhyjsuhlcoQQhtA29yn7M1PPIRZOtCRrdzIHSpaMngsq8hlSXsEslYukwOkM=;\n c=relaxed/relaxed; s=default; d=rock-chips.com; v=1;\n\tbh=A4ywhVGEVq2UT956X0EtOgl6z6pID8Z1lF+EOtlEhGc=;\n\th=date:mime-version:subject:message-id:from;", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>" }, "content": "Replace pci_alloc_irq_vectors() with pcim_alloc_irq_vectors() to\nexplicitly request devres-managed interrupt vectors. This makes the\ndriver's intention clear and avoids the ambiguous implicit management\npreviously provided by pcim_enable_device().\n\nThe change prepares the driver for the eventual removal of the hybrid\nIRQ management pattern from pcim_enable_device(), ensuring consistent\nresource management through devres.\n\nSigned-off-by: Shawn Lin <shawn.lin@rock-chips.com>\nReviewed-by: Logan Gunthorpe <logang@deltatee.com>\n---\n\nChanges in v4: None\nChanges in v3: None\nChanges in v2: None\n\n drivers/pci/switch/switchtec.c | 6 +++---\n 1 file changed, 3 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c\nindex 93ebec9..ed42661 100644\n--- a/drivers/pci/switch/switchtec.c\n+++ b/drivers/pci/switch/switchtec.c\n@@ -1493,9 +1493,9 @@ static int switchtec_init_isr(struct switchtec_dev *stdev)\n \tif (nirqs < 4)\n \t\tnirqs = 4;\n \n-\tnvecs = pci_alloc_irq_vectors(stdev->pdev, 1, nirqs,\n-\t\t\t\t PCI_IRQ_MSIX | PCI_IRQ_MSI |\n-\t\t\t\t PCI_IRQ_VIRTUAL);\n+\tnvecs = pcim_alloc_irq_vectors(stdev->pdev, 1, nirqs,\n+\t\t\t\t PCI_IRQ_MSIX | PCI_IRQ_MSI |\n+\t\t\t\t PCI_IRQ_VIRTUAL);\n \tif (nvecs < 0)\n \t\treturn nvecs;\n \n", "prefixes": [ "v4", "6/7" ] }