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GET /api/1.1/patches/2227769/?format=api
{ "id": 2227769, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2227769/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260424083837.214947-5-adityag@linux.ibm.com/", "project": { "id": 69, "url": "http://patchwork.ozlabs.org/api/1.1/projects/69/?format=api", "name": "QEMU powerpc development", "link_name": "qemu-ppc", "list_id": "qemu-ppc.nongnu.org", "list_email": "qemu-ppc@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260424083837.214947-5-adityag@linux.ibm.com>", "date": "2026-04-24T08:38:31", "name": "[v6,04/10] pnv/mpipl: Preserve memory regions as per MDST/MDDT tables", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0084154a3d295a9a8a9c05c1b17f5b661d540741", "submitter": { "id": 86610, "url": "http://patchwork.ozlabs.org/api/1.1/people/86610/?format=api", "name": "Aditya Gupta", "email": "adityag@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260424083837.214947-5-adityag@linux.ibm.com/mbox/", "series": [ { "id": 501319, "url": "http://patchwork.ozlabs.org/api/1.1/series/501319/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-ppc/list/?series=501319", "date": "2026-04-24T08:38:28", "name": "Implement MPIPL for PowerNV", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/501319/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227769/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227769/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 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:content-transfer-encoding:date:from:in-reply-to:message-id\n :mime-version:references:subject:to; s=pp1; bh=JeFVGKIGFcpfpNOuH\n jTL9zuj6m8cb7y+wh4kqiYCctg=; b=n7V9gkFjLKN3mZB5FJ60iOHwkf9rv3iVb\n J7VFUv+fVZzMkFJXXYtlrBSWADBo2VBkB4RLBLyCPOg/VPwS6gP2Dur9frREzXaa\n JoCeKGSzSLy6lR6hHOgpZtqiv6ua0/+L+a1zQ1D8tmnjgIsNLdShceg6QSSU1Q4I\n 6beFbQCizANbV2M5WiLZMwCMAXNIxbZlhtZtUk7PhUb4W/o/nW8sx25uUOc2dj5s\n k3Q+GYM4KZr8Koa93FAsZtns+KKmvHf4ZKgiqRXg9P2F5x5EtEGgZtD/fcm81CZg\n KDC0vAPENLS7McCBqrDD3BmFH9PiXFnvNP/505bmHfZ0ERnnOCx+w==", "From": "Aditya Gupta <adityag@linux.ibm.com>", "To": "<qemu-devel@nongnu.org>", "Cc": "<qemu-ppc@nongnu.org>, Hari Bathini <hbathini@linux.ibm.com>,\n Sourabh Jain <sourabhjain@linux.ibm.com>,\n Harsh Prateek Bora <harshpb@linux.ibm.com>,\n Nicholas Piggin <npiggin@gmail.com>,\n Miles Glenn <milesg@linux.ibm.com>, Chinmay Rath <rathc@linux.ibm.com>,\n Shivang Upadhyay <shivangu@linux.ibm.com>", "Subject": "[PATCH v6 04/10] pnv/mpipl: Preserve memory regions as per MDST/MDDT\n tables", "Date": "Fri, 24 Apr 2026 14:08:31 +0530", "Message-ID": "<20260424083837.214947-5-adityag@linux.ibm.com>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260424083837.214947-1-adityag@linux.ibm.com>", "References": "<20260424083837.214947-1-adityag@linux.ibm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Proofpoint-Reinject": "loops=2 maxloops=12", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDI0MDA3NiBTYWx0ZWRfXzjLTPu9o69eK\n P68JXXUWvCv82SDekbigym4HJe5lNwLhCyJqHA/5eUmrifkIiyk/787/ejs/h+KYLhvkE/AtNYb\n yZmQ9wWBsWbYbXhnpjvfSOBYHEAyPOhPe1q5PtSp3FXC/xdVkcsxD5T+Z0Xjt/O+RpHCRLGUPAb\n VZyjzwzJI2qmWR8kp30os8EoJ7Afp9Bj1ScuOtDwpKrn3Dk3XmNiOl3/M1nD4UkwlJcB00EYRwX\n cxxKXprupgCFWlvFd9jMpXM5GeQe50nLxSizQKFeZsudFlbG+lvm8qotRd+5tr1WZaiu2c8ouTN\n FXAemb5a6ClpYGAfIuUy6oMiJ904vPmfy4aHPBbkrckjYPZ6dPFcQrc1Yg8qlhzk2ia4XZ1ulzW\n YcnYtpfOLjRsdvp/2/7tRfiEuBY54zxZxOVTcQL+Zs/+i04mqxRkU3SWd9Q8kGJEV2wTL/28JnA\n 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"Received-SPF": "pass client-ip=148.163.156.1;\n envelope-from=adityag@linux.ibm.com;\n helo=mx0a-001b2d01.pphosted.com", "X-Spam_score_int": "-26", "X-Spam_score": "-2.7", "X-Spam_bar": "--", "X-Spam_report": "(-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7,\n RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-ppc@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-ppc.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-ppc>", "List-Post": "<mailto:qemu-ppc@nongnu.org>", "List-Help": "<mailto:qemu-ppc-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Implement copying of memory region, as mentioned by MDST and MDDT\ntables.\n\nCopy the memory regions from source to destination in chunks of 32MB\n\nNote, qemu can fail preserving a particular entry due to any reason,\nsuch as:\n * region length mis-matching in MDST & MDDT\n * failed copy due to access/decode/etc memory issues\n\nHDAT doesn't specify any field in MDRT to notify host about such errors.\n\nThough HDAT section \"15.3.1.3 Memory Dump Results Table (MDRT)\" says:\n The Memory Dump Results Table is a list of the memory ranges that\n have been included in the dump\n\nBased on above statement, it looks like MDRT should include only those\nregions which are successfully captured in the dump, hence, regions\nwhich qemu fails to dump, just get skipped, and will not have a\ncorresponding entry in MDRT\n\nReviewed-by: Hari Bathini <hbathini@linux.ibm.com>\nReviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com>\nSigned-off-by: Aditya Gupta <adityag@linux.ibm.com>\n---\n hw/ppc/pnv_mpipl.c | 162 +++++++++++++++++++++++++++++++++++++\n include/hw/ppc/pnv_mpipl.h | 84 +++++++++++++++++++\n 2 files changed, 246 insertions(+)", "diff": "diff --git a/hw/ppc/pnv_mpipl.c b/hw/ppc/pnv_mpipl.c\nindex d8c9b7a428b7..cef1fe2c4056 100644\n--- a/hw/ppc/pnv_mpipl.c\n+++ b/hw/ppc/pnv_mpipl.c\n@@ -5,12 +5,174 @@\n */\n \n #include \"qemu/osdep.h\"\n+#include \"qemu/log.h\"\n+#include \"qemu/units.h\"\n+#include \"system/address-spaces.h\"\n #include \"system/runstate.h\"\n #include \"hw/ppc/pnv.h\"\n #include \"hw/ppc/pnv_mpipl.h\"\n+#include <math.h>\n+\n+#define MDST_TABLE_RELOCATED \\\n+ (pnv->mpipl_state.skiboot_base + MDST_TABLE_OFF)\n+#define MDDT_TABLE_RELOCATED \\\n+ (pnv->mpipl_state.skiboot_base + MDDT_TABLE_OFF)\n+\n+/*\n+ * Preserve the memory regions as pointed by MDST table\n+ *\n+ * During this, the memory region pointed by entries in MDST, are 'copied'\n+ * as it is to the memory region pointed by corresponding entry in MDDT\n+ *\n+ * Notes: All reads should consider data coming from skiboot as big-endian,\n+ * and data written should also be in big-endian\n+ */\n+static bool pnv_mpipl_preserve_mem(PnvMachineState *pnv)\n+{\n+ g_autofree MdstTableEntry *mdst = g_malloc(MDST_TABLE_SIZE);\n+ g_autofree MddtTableEntry *mddt = g_malloc(MDDT_TABLE_SIZE);\n+ g_autofree MdrtTableEntry *mdrt = g_malloc0(MDRT_TABLE_SIZE);\n+ AddressSpace *default_as = &address_space_memory;\n+ MemTxResult io_result;\n+ MemTxAttrs attrs;\n+ uint64_t src_addr, dest_addr;\n+ uint32_t data_len;\n+ uint64_t num_chunks, chunk_id = 0;\n+ int mdrt_idx = 0;\n+\n+ /* Mark the memory transactions as privileged memory access */\n+ attrs.user = 0;\n+ attrs.memory = 1;\n+\n+ if (pnv->mpipl_state.mdrt_table) {\n+ /*\n+ * MDRT table allocated from some past crash, free the memory to\n+ * prevent memory leak\n+ */\n+ g_free(pnv->mpipl_state.mdrt_table);\n+ pnv->mpipl_state.num_mdrt_entries = 0;\n+ }\n+\n+ io_result = address_space_read(default_as, MDST_TABLE_RELOCATED, attrs,\n+ mdst, MDST_TABLE_SIZE);\n+ if (io_result != MEMTX_OK) {\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"MPIPL: Failed to read MDST table at: 0x\" TARGET_FMT_lx \"\\n\",\n+ MDST_TABLE_RELOCATED);\n+\n+ return false;\n+ }\n+\n+ io_result = address_space_read(default_as, MDDT_TABLE_RELOCATED, attrs,\n+ mddt, MDDT_TABLE_SIZE);\n+ if (io_result != MEMTX_OK) {\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"MPIPL: Failed to read MDDT table at: 0x\" TARGET_FMT_lx \"\\n\",\n+ MDDT_TABLE_RELOCATED);\n+\n+ return false;\n+ }\n+\n+ /* Try to read all entries */\n+ for (int i = 0; i < MDST_MAX_ENTRIES; ++i) {\n+ g_autofree uint8_t *copy_buffer = NULL;\n+ bool is_copy_failed = false;\n+\n+ /* Considering entry with address and size as 0, as end of table */\n+ if ((mdst[i].addr == 0) && (mdst[i].size == 0)) {\n+ break;\n+ }\n+\n+ if (mdst[i].size != mddt[i].size) {\n+ qemu_log_mask(LOG_TRACE,\n+ \"Warning: Invalid entry, size mismatch in MDST & MDDT\\n\");\n+ continue;\n+ }\n+\n+ if (mdst[i].data_region != mddt[i].data_region) {\n+ qemu_log_mask(LOG_TRACE,\n+ \"Warning: Invalid entry, region mismatch in MDST & MDDT\\n\");\n+ continue;\n+ }\n+\n+ src_addr = be64_to_cpu(mdst[i].addr) & ~HRMOR_BIT;\n+ dest_addr = be64_to_cpu(mddt[i].addr) & ~HRMOR_BIT;\n+ data_len = be32_to_cpu(mddt[i].size);\n+\n+#define COPY_CHUNK_SIZE ((size_t)(32 * MiB))\n+ copy_buffer = g_try_malloc(COPY_CHUNK_SIZE);\n+ if (copy_buffer == NULL) {\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"MPIPL: Failed allocating memory (size: %zu) for copying\"\n+ \" reserved memory regions\\n\", COPY_CHUNK_SIZE);\n+ is_copy_failed = true;\n+ continue;\n+ }\n+\n+ chunk_id = 0;\n+ num_chunks = ceil((data_len * 1.0f) / COPY_CHUNK_SIZE);\n+ while (chunk_id < num_chunks) {\n+ /* Take minimum of bytes left to copy, and chunk size */\n+ uint64_t copy_len = MIN(\n+ data_len - (chunk_id * COPY_CHUNK_SIZE),\n+ COPY_CHUNK_SIZE\n+ );\n+\n+ /* Copy the source region to destination */\n+ io_result = address_space_read(default_as, src_addr, attrs,\n+ copy_buffer, copy_len);\n+ if (io_result != MEMTX_OK) {\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"MPIPL: Failed to read region at: 0x%\" PRIx64 \"\\n\",\n+ src_addr);\n+ is_copy_failed = true;\n+ break;\n+ }\n+\n+ io_result = address_space_write(default_as, dest_addr, attrs,\n+ copy_buffer, copy_len);\n+ if (io_result != MEMTX_OK) {\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"MPIPL: Failed to write region at: 0x%\" PRIx64 \"\\n\",\n+ dest_addr);\n+ is_copy_failed = true;\n+ break;\n+ }\n+\n+ src_addr += COPY_CHUNK_SIZE;\n+ dest_addr += COPY_CHUNK_SIZE;\n+ ++chunk_id;\n+ }\n+#undef COPY_CHUNK_SIZE\n+\n+ if (is_copy_failed) {\n+ /*\n+ * HDAT doesn't specify an error code in MDRT for failed copy,\n+ * and doesn't specify how this is to be handled\n+ * Hence just skip adding an entry in MDRT, as done for size\n+ * mismatch or other inconsistency between MDST/MDDT\n+ */\n+ continue;\n+ }\n+\n+ /* Populate entry in MDRT table if preserving successful */\n+ mdrt[mdrt_idx].src_addr = cpu_to_be64(src_addr);\n+ mdrt[mdrt_idx].dest_addr = cpu_to_be64(dest_addr);\n+ mdrt[mdrt_idx].size = cpu_to_be32(data_len);\n+ mdrt[mdrt_idx].data_region = mdst[i].data_region;\n+ ++mdrt_idx;\n+ }\n+\n+ pnv->mpipl_state.mdrt_table = g_steal_pointer(&mdrt);\n+ pnv->mpipl_state.num_mdrt_entries = mdrt_idx;\n+\n+ return true;\n+}\n \n void do_mpipl_preserve(PnvMachineState *pnv)\n {\n+ pnv_mpipl_preserve_mem(pnv);\n+\n /* Mark next boot as Memory-preserving boot */\n pnv->mpipl_state.is_next_boot_mpipl = true;\n \ndiff --git a/include/hw/ppc/pnv_mpipl.h b/include/hw/ppc/pnv_mpipl.h\nindex d1d542b72488..b3d980dfefb1 100644\n--- a/include/hw/ppc/pnv_mpipl.h\n+++ b/include/hw/ppc/pnv_mpipl.h\n@@ -7,18 +7,102 @@\n #ifndef PNV_MPIPL_H\n #define PNV_MPIPL_H\n \n+#include <assert.h>\n #include <stdbool.h>\n #include <stdint.h>\n \n #include \"exec/hwaddr.h\"\n+#include \"qemu/compiler.h\"\n \n+typedef struct MdstTableEntry MdstTableEntry;\n+typedef struct MdrtTableEntry MdrtTableEntry;\n typedef struct MpiplPreservedState MpiplPreservedState;\n \n+/*\n+ * Following offsets are copied from skiboot source code.\n+ * These need to be updated if this changes in a future skiboot version\n+ */\n+/* Use 768 bytes for SPIRAH */\n+#define SPIRAH_OFF 0x00010000\n+#define SPIRAH_SIZE 0x300\n+\n+/* Use 256 bytes for processor dump area */\n+#define PROC_DUMP_AREA_OFF (SPIRAH_OFF + SPIRAH_SIZE)\n+#define PROC_DUMP_AREA_SIZE 0x100\n+\n+#define PROCIN_OFF (PROC_DUMP_AREA_OFF + PROC_DUMP_AREA_SIZE)\n+#define PROCIN_SIZE 0x800\n+\n+/* Offsets of MDST and MDDT tables from skiboot base */\n+#define MDST_TABLE_OFF (PROCIN_OFF + PROCIN_SIZE)\n+#define MDST_TABLE_SIZE 0x400\n+\n+#define MDDT_TABLE_OFF (MDST_TABLE_OFF + MDST_TABLE_SIZE)\n+#define MDDT_TABLE_SIZE 0x400\n+/*\n+ * Offset of the dump result table MDRT. Hostboot will write to this\n+ * memory after moving memory content from source to destination memory.\n+ */\n+#define MDRT_TABLE_OFF 0x01c00000\n+#define MDRT_TABLE_SIZE 0x00008000\n+\n+/* HRMOR_BIT copied from skiboot */\n+#define HRMOR_BIT (1ull << 63)\n+\n+/*\n+ * Memory Dump Source Table (MDST)\n+ *\n+ * Format of this table is same as Memory Dump Source Table defined in HDAT\n+ */\n+struct MdstTableEntry {\n+ uint64_t addr;\n+ uint8_t data_region;\n+ uint8_t dump_type;\n+ uint16_t reserved;\n+ uint32_t size;\n+} QEMU_PACKED;\n+\n+/* Memory dump destination table (MDDT) has same structure as MDST */\n+typedef MdstTableEntry MddtTableEntry;\n+\n+/*\n+ * Memory dump result table (MDRT)\n+ *\n+ * List of the memory ranges that have been included in the dump. This table is\n+ * filled by hostboot and passed to OPAL on second boot. OPAL/payload will use\n+ * this table to extract the dump.\n+ *\n+ * Note: This structure differs from HDAT, but matches the structure\n+ * skiboot uses\n+ */\n+struct MdrtTableEntry {\n+ uint64_t src_addr;\n+ uint64_t dest_addr;\n+ uint8_t data_region;\n+ uint8_t dump_type; /* unused */\n+ uint16_t reserved; /* unused */\n+ uint32_t size;\n+ uint64_t padding; /* unused */\n+} QEMU_PACKED;\n+\n+/* Maximum length of mdst/mddt/mdrt tables */\n+#define MDST_MAX_ENTRIES (MDST_TABLE_SIZE / sizeof(MdstTableEntry))\n+#define MDDT_MAX_ENTRIES (MDDT_TABLE_SIZE / sizeof(MddtTableEntry))\n+#define MDRT_MAX_ENTRIES (MDRT_TABLE_SIZE / sizeof(MdrtTableEntry))\n+\n+static_assert(MDST_MAX_ENTRIES == MDDT_MAX_ENTRIES,\n+ \"Maximum entries in MDDT must match MDST\");\n+static_assert(MDRT_MAX_ENTRIES >= MDST_MAX_ENTRIES,\n+ \"MDRT should support atleast having number of entries as in MDST\");\n+\n /* Preserved state to be saved in PnvMachineState */\n struct MpiplPreservedState {\n /* skiboot_base will be valid only after OPAL sends relocated base to SBE */\n hwaddr skiboot_base;\n bool is_next_boot_mpipl;\n+\n+ MdrtTableEntry *mdrt_table;\n+ uint32_t num_mdrt_entries;\n };\n \n #endif\n", "prefixes": [ "v6", "04/10" ] }