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GET /api/1.1/patches/2227714/?format=api
{ "id": 2227714, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2227714/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260424-parse_iommu_cells-v14-3-fd02f11b6c38@oss.qualcomm.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260424-parse_iommu_cells-v14-3-fd02f11b6c38@oss.qualcomm.com>", "date": "2026-04-24T05:56:10", "name": "[v14,3/3] of: Respect #{iommu,msi}-cells in maps", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "effade451e9182d8ed6b37636a93eeed64bdb5d9", "submitter": { "id": 92739, "url": "http://patchwork.ozlabs.org/api/1.1/people/92739/?format=api", "name": "Vijayanand Jitta", "email": "vijayanand.jitta@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260424-parse_iommu_cells-v14-3-fd02f11b6c38@oss.qualcomm.com/mbox/", "series": [ { "id": 501304, "url": "http://patchwork.ozlabs.org/api/1.1/series/501304/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501304", "date": "2026-04-24T05:56:07", "name": "of: parsing of multi #{iommu,msi}-cells in maps", "version": 14, "mbox": "http://patchwork.ozlabs.org/series/501304/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227714/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227714/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53106-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=n55RZJ6J;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=XQEv7DGN;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260424-parse_iommu_cells-v14-3-fd02f11b6c38@oss.qualcomm.com>", "References": "<20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com>", "In-Reply-To": "<20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com>", "To": "Nipun Gupta <nipun.gupta@amd.com>,\n Nikhil Agarwal <nikhil.agarwal@amd.com>, Joerg Roedel <joro@8bytes.org>,\n Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>,\n Marc Zyngier <maz@kernel.org>, Lorenzo Pieralisi <lpieralisi@kernel.org>,\n Thomas Gleixner <tglx@kernel.org>, Saravana Kannan <saravanak@kernel.org>,\n Richard Zhu <hongxing.zhu@nxp.com>, Lucas Stach <l.stach@pengutronix.de>,\n\t=?utf-8?q?Krzysztof_Wilczy=C5=84ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>,\n Frank Li <Frank.Li@nxp.com>, Sascha Hauer <s.hauer@pengutronix.de>,\n Pengutronix Kernel Team <kernel@pengutronix.de>,\n Fabio Estevam <festevam@gmail.com>, Juergen Gross <jgross@suse.com>,\n Stefano Stabellini <sstabellini@kernel.org>,\n Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>,\n Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,\n Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,\n Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>,\n Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Prakash Gupta <prakash.gupta@oss.qualcomm.com>,\n Vikash Garodia <vikash.garodia@oss.qualcomm.com>", "Cc": "linux-kernel@vger.kernel.org, iommu@lists.linux.dev,\n linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,\n linux-pci@vger.kernel.org, imx@lists.linux.dev,\n xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org,\n Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com>,\n Charan Teja Kalla <charan.kalla@oss.qualcomm.com>", "X-Mailer": "b4 0.15.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777010232; l=12022;\n i=vijayanand.jitta@oss.qualcomm.com; s=20260301; h=from:subject:message-id;\n bh=d1eDTLSvaaoV8Pjb6ssN/wlaFmWHAsxlhBaIWB039ns=;\n b=dvjmg1JeV+d2IiPPXLnSyPZS2iXakbo7vH25RJpgfxHMtQvlf6E20k//Y7tUylU/KmB5QpkoN\n p1JKaTx7QpWAoc1ISIZabpuZvStHNGLlT1s7gu6I+nkJ5BwVTldmp0L", "X-Developer-Key": "i=vijayanand.jitta@oss.qualcomm.com; a=ed25519;\n pk=Lpi7Cs3wHe8KZtqvyci7FTOLzsKpEHKGCaPNZw+1zRI=", "X-Proofpoint-ORIG-GUID": "Lz7CYQlpvSuI66uYXmH9R_f59pfv9Ils", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDI0MDA1MSBTYWx0ZWRfX4V+QfFwZ6HBe\n wjPrDdYKy3wGZixhsWiSzy/8A7xlAStx+8/EHNJdGqaTYDkIVQirwD7L51AA0KQexYZEJdElXzd\n 4c0PiLNfQ1SqEPTpyz4Me5z35IVgrjMD2COQEEEoDBcxyc2RESBkMV2n4Mx9gsS9DHdMWhzbxAP\n pjzicAveIrnfa7vynGRgd/JgCRDdaG2jA3AaDTC0ukdISyRo4h3MYZ79nBvvlYzWef0THN6pybb\n xl09OPRQSk1zirAf8ss2kB5drEGm4VkwXpoSwL0/hdr+lrLBKNilK2CrlQt6fKUS93/lhZX4W9/\n 0DLdS++quJI2tb1iIM/vaxKmxL+TJLzxuGtCZkpEIAl9vJDBlc61uFgogk8gg0Vd2A7zkUr+7P3\n KFQMLZFS7gO0KCVTG6wCvHTwd2JmG0d521iH9Tg5078dP+KaO/gDRz22lkVbeZRYI3w084kXZKD\n CM5VqMaHQ0FNoyXu82Q==", "X-Authority-Analysis": "v=2.4 cv=fP4JG5ae c=1 sm=1 tr=0 ts=69eb0665 cx=c_pps\n a=0uOsjrqzRL749jD1oC5vDA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22\n a=7CQSdrXTAAAA:8 a=EUspDBNiAAAA:8 a=klF1l1D6msg2vEcBgDUA:9 a=QEXdDO2ut3YA:10\n a=mQ_c8vxmzFEMiUWkPHU9:22 a=a-qgeE7W1pNrGK8U0ZQC:22", "X-Proofpoint-GUID": "Lz7CYQlpvSuI66uYXmH9R_f59pfv9Ils", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 clxscore=1015 priorityscore=1501 adultscore=0 suspectscore=0\n impostorscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604240051" }, "content": "From: Robin Murphy <robin.murphy@arm.com>\n\nSo far our parsing of {iommu,msi}-map properties has always blindly\nassumed that the output specifiers will always have exactly 1 cell.\nThis typically does happen to be the case, but is not actually enforced\n(and the PCI msi-map binding even explicitly states support for 0 or 1\ncells) - as a result we've now ended up with dodgy DTs out in the field\nwhich depend on this behaviour to map a 1-cell specifier for a 2-cell\nprovider, despite that being bogus per the bindings themselves.\n\nSince there is some potential use in being able to map at least single\ninput IDs to multi-cell output specifiers (and properly support 0-cell\noutputs as well), add support for properly parsing and using the target\nnodes' #cells values, albeit with the unfortunate complication of still\nhaving to work around expectations of the old behaviour too.\n\nSince there are multi-cell output specifiers, the callers of of_map_id()\nmay need to get the exact cell output value for further processing.\nUpdate of_map_id() to set args_count in the output to reflect the actual\nnumber of output specifier cells.\n\nSigned-off-by: Robin Murphy <robin.murphy@arm.com>\nSigned-off-by: Charan Teja Kalla <charan.kalla@oss.qualcomm.com>\nSigned-off-by: Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com>\n---\n drivers/of/base.c | 157 +++++++++++++++++++++++++++++++++++++++++------------\n include/linux/of.h | 6 +-\n 2 files changed, 125 insertions(+), 38 deletions(-)", "diff": "diff --git a/drivers/of/base.c b/drivers/of/base.c\nindex b3d002015192..2554e4f1a181 100644\n--- a/drivers/of/base.c\n+++ b/drivers/of/base.c\n@@ -2096,18 +2096,48 @@ int of_find_last_cache_level(unsigned int cpu)\n \treturn cache_level;\n }\n \n+/*\n+ * Some DTs have an iommu-map targeting a 2-cell IOMMU node while\n+ * specifying only 1 cell. Fortunately they all consist of value '1'\n+ * as the 2nd cell entry with the same target, so check for that pattern.\n+ *\n+ * Example:\n+ *\tIOMMU node:\n+ *\t\t#iommu-cells = <2>;\n+ *\n+ *\tDevice node:\n+ *\t\tiommu-map = <0x0000 &smmu 0x0000 0x1>,\n+ *\t\t\t <0x0100 &smmu 0x0100 0x1>;\n+ */\n+static bool of_check_bad_map(const __be32 *map, int len)\n+{\n+\t__be32 phandle = map[1];\n+\n+\tif (len % 4)\n+\t\treturn false;\n+\tfor (int i = 0; i < len; i += 4) {\n+\t\tif (map[i + 1] != phandle || map[i + 3] != cpu_to_be32(1))\n+\t\t\treturn false;\n+\t}\n+\treturn true;\n+}\n+\n /**\n * of_map_id - Translate an ID through a downstream mapping.\n * @np: root complex device node.\n * @id: device ID to map.\n * @map_name: property name of the map to use.\n+ * @cells_name: property name of target specifier cells.\n * @map_mask_name: optional property name of the mask to use.\n * @filter_np: optional device node to filter matches by, or NULL to match any.\n *\tIf non-NULL, only map entries targeting this node will be matched.\n * @arg: pointer to a &struct of_phandle_args for the result. On success,\n- *\t@arg->args[0] will contain the translated ID. If a map entry was\n- *\tmatched, @arg->np will be set to the target node with a reference\n- *\theld that the caller must release with of_node_put().\n+ *\t@arg->args_count will be set to the number of output specifier cells\n+ *\tas defined by @cells_name in the target node, and\n+ *\t@arg->args[0..args_count-1] will contain the translated output\n+ *\tspecifier values. If a map entry was matched, @arg->np will be set\n+ *\tto the target node with a reference held that the caller must release\n+ *\twith of_node_put().\n *\n * Given a device ID, look up the appropriate implementation-defined\n * platform ID and/or the target device which receives transactions on that\n@@ -2116,17 +2146,19 @@ int of_find_last_cache_level(unsigned int cpu)\n * Return: 0 on success or a standard error code on failure.\n */\n int of_map_id(const struct device_node *np, u32 id,\n-\t const char *map_name, const char *map_mask_name,\n+\t const char *map_name, const char *cells_name,\n+\t const char *map_mask_name,\n \t const struct device_node *filter_np, struct of_phandle_args *arg)\n {\n \tu32 map_mask, masked_id;\n-\tint map_len;\n+\tint map_bytes, map_len, offset = 0;\n+\tbool bad_map = false;\n \tconst __be32 *map = NULL;\n \n \tif (!np || !map_name || !arg)\n \t\treturn -EINVAL;\n \n-\tmap = of_get_property(np, map_name, &map_len);\n+\tmap = of_get_property(np, map_name, &map_bytes);\n \tif (!map) {\n \t\tif (filter_np)\n \t\t\treturn -ENODEV;\n@@ -2136,11 +2168,9 @@ int of_map_id(const struct device_node *np, u32 id,\n \t\treturn 0;\n \t}\n \n-\tif (!map_len || map_len % (4 * sizeof(*map))) {\n-\t\tpr_err(\"%pOF: Error: Bad %s length: %d\\n\", np,\n-\t\t\tmap_name, map_len);\n-\t\treturn -EINVAL;\n-\t}\n+\tif (map_bytes % sizeof(*map))\n+\t\tgoto err_map_len;\n+\tmap_len = map_bytes / sizeof(*map);\n \n \t/* The default is to select all bits. */\n \tmap_mask = 0xffffffff;\n@@ -2153,39 +2183,84 @@ int of_map_id(const struct device_node *np, u32 id,\n \t\tof_property_read_u32(np, map_mask_name, &map_mask);\n \n \tmasked_id = map_mask & id;\n-\tfor ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) {\n+\n+\twhile (offset < map_len) {\n \t\tstruct device_node *phandle_node;\n-\t\tu32 id_base = be32_to_cpup(map + 0);\n-\t\tu32 phandle = be32_to_cpup(map + 1);\n-\t\tu32 out_base = be32_to_cpup(map + 2);\n-\t\tu32 id_len = be32_to_cpup(map + 3);\n+\t\tu32 id_base, phandle, id_len, id_off, cells = 0;\n+\t\tconst __be32 *out_base;\n+\n+\t\tif (map_len - offset < 2)\n+\t\t\tgoto err_map_len;\n+\n+\t\tid_base = be32_to_cpup(map + offset);\n \n \t\tif (id_base & ~map_mask) {\n-\t\t\tpr_err(\"%pOF: Invalid %s translation - %s-mask (0x%x) ignores id-base (0x%x)\\n\",\n-\t\t\t\tnp, map_name, map_name,\n-\t\t\t\tmap_mask, id_base);\n+\t\t\tpr_err(\"%pOF: Invalid %s translation - %s (0x%x) ignores id-base (0x%x)\\n\",\n+\t\t\t np, map_name, map_mask_name, map_mask, id_base);\n \t\t\treturn -EFAULT;\n \t\t}\n \n-\t\tif (masked_id < id_base || masked_id >= id_base + id_len)\n-\t\t\tcontinue;\n-\n+\t\tphandle = be32_to_cpup(map + offset + 1);\n \t\tphandle_node = of_find_node_by_phandle(phandle);\n \t\tif (!phandle_node)\n \t\t\treturn -ENODEV;\n \n+\t\tif (bad_map) {\n+\t\t\tcells = 1;\n+\t\t} else if (of_property_read_u32(phandle_node, cells_name, &cells)) {\n+\t\t\tpr_err(\"%pOF: missing %s property\\n\", phandle_node, cells_name);\n+\t\t\tof_node_put(phandle_node);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (map_len - offset < 3 + cells) {\n+\t\t\tof_node_put(phandle_node);\n+\t\t\tgoto err_map_len;\n+\t\t}\n+\n+\t\tif (offset == 0 && cells == 2) {\n+\t\t\tbad_map = of_check_bad_map(map, map_len);\n+\t\t\tif (bad_map) {\n+\t\t\t\tpr_warn_once(\"%pOF: %s mismatches target %s, assuming extra cell of 0\\n\",\n+\t\t\t\t\t np, map_name, cells_name);\n+\t\t\t\tcells = 1;\n+\t\t\t}\n+\t\t}\n+\n+\t\tout_base = map + offset + 2;\n+\t\toffset += 3 + cells;\n+\n+\t\tid_len = be32_to_cpup(map + offset - 1);\n+\t\tif (id_len > 1 && cells > 1) {\n+\t\t\t/*\n+\t\t\t * With 1 output cell we reasonably assume its value\n+\t\t\t * has a linear relationship to the input; with more,\n+\t\t\t * we'd need help from the provider to know what to do.\n+\t\t\t */\n+\t\t\tpr_err(\"%pOF: Unsupported %s - cannot handle %d-ID range with %d-cell output specifier\\n\",\n+\t\t\t np, map_name, id_len, cells);\n+\t\t\tof_node_put(phandle_node);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tid_off = masked_id - id_base;\n+\t\tif (masked_id < id_base || id_off >= id_len) {\n+\t\t\tof_node_put(phandle_node);\n+\t\t\tcontinue;\n+\t\t}\n+\n \t\tif (filter_np && filter_np != phandle_node) {\n \t\t\tof_node_put(phandle_node);\n \t\t\tcontinue;\n \t\t}\n \n \t\targ->np = phandle_node;\n-\t\targ->args[0] = masked_id - id_base + out_base;\n-\t\targ->args_count = 1;\n+\t\tfor (int i = 0; i < cells; i++)\n+\t\t\targ->args[i] = id_off + be32_to_cpu(out_base[i]);\n+\t\targ->args_count = cells;\n \n \t\tpr_debug(\"%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, length: %08x, id: %08x -> %08x\\n\",\n-\t\t\tnp, map_name, map_mask, id_base, out_base,\n-\t\t\tid_len, id, masked_id - id_base + out_base);\n+\t\t\tnp, map_name, map_mask, id_base, be32_to_cpup(out_base),\n+\t\t\tid_len, id, id_off + be32_to_cpup(out_base));\n \t\treturn 0;\n \t}\n \n@@ -2196,6 +2271,10 @@ int of_map_id(const struct device_node *np, u32 id,\n \targ->args[0] = id;\n \targ->args_count = 1;\n \treturn 0;\n+\n+err_map_len:\n+\tpr_err(\"%pOF: Error: Bad %s length: %d\\n\", np, map_name, map_bytes);\n+\treturn -EINVAL;\n }\n EXPORT_SYMBOL_GPL(of_map_id);\n \n@@ -2205,18 +2284,21 @@ EXPORT_SYMBOL_GPL(of_map_id);\n * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform\n * stream/device ID) used as the lookup key in the iommu-map table.\n * @arg: pointer to a &struct of_phandle_args for the result. On success,\n- *\t@arg->args[0] contains the translated ID. If a map entry was matched,\n- *\t@arg->np holds a reference to the target node that the caller must\n- *\trelease with of_node_put().\n+ *\t@arg->args_count will be set to the number of output specifier cells\n+ *\tand @arg->args[0..args_count-1] will contain the translated output\n+ *\tspecifier values. If a map entry was matched, @arg->np holds a\n+ *\treference to the target node that the caller must release with\n+ *\tof_node_put().\n *\n- * Convenience wrapper around of_map_id() using \"iommu-map\" and \"iommu-map-mask\".\n+ * Convenience wrapper around of_map_id() using \"iommu-map\", \"#iommu-cells\",\n+ * and \"iommu-map-mask\".\n *\n * Return: 0 on success or a standard error code on failure.\n */\n int of_map_iommu_id(const struct device_node *np, u32 id,\n \t\t struct of_phandle_args *arg)\n {\n-\treturn of_map_id(np, id, \"iommu-map\", \"iommu-map-mask\", NULL, arg);\n+\treturn of_map_id(np, id, \"iommu-map\", \"#iommu-cells\", \"iommu-map-mask\", NULL, arg);\n }\n EXPORT_SYMBOL_GPL(of_map_iommu_id);\n \n@@ -2229,17 +2311,20 @@ EXPORT_SYMBOL_GPL(of_map_iommu_id);\n *\tto match any. If non-NULL, only map entries targeting this node will\n *\tbe matched.\n * @arg: pointer to a &struct of_phandle_args for the result. On success,\n- *\t@arg->args[0] contains the translated ID. If a map entry was matched,\n- *\t@arg->np holds a reference to the target node that the caller must\n- *\trelease with of_node_put().\n+ *\t@arg->args_count will be set to the number of output specifier cells\n+ *\tand @arg->args[0..args_count-1] will contain the translated output\n+ *\tspecifier values. If a map entry was matched, @arg->np holds a\n+ *\treference to the target node that the caller must release with\n+ *\tof_node_put().\n *\n- * Convenience wrapper around of_map_id() using \"msi-map\" and \"msi-map-mask\".\n+ * Convenience wrapper around of_map_id() using \"msi-map\", \"#msi-cells\",\n+ * and \"msi-map-mask\".\n *\n * Return: 0 on success or a standard error code on failure.\n */\n int of_map_msi_id(const struct device_node *np, u32 id,\n \t\t const struct device_node *filter_np, struct of_phandle_args *arg)\n {\n-\treturn of_map_id(np, id, \"msi-map\", \"msi-map-mask\", filter_np, arg);\n+\treturn of_map_id(np, id, \"msi-map\", \"#msi-cells\", \"msi-map-mask\", filter_np, arg);\n }\n EXPORT_SYMBOL_GPL(of_map_msi_id);\ndiff --git a/include/linux/of.h b/include/linux/of.h\nindex 8548cd9eb4f1..51ac8539f2c3 100644\n--- a/include/linux/of.h\n+++ b/include/linux/of.h\n@@ -462,7 +462,8 @@ const char *of_prop_next_string(const struct property *prop, const char *cur);\n bool of_console_check(const struct device_node *dn, char *name, int index);\n \n int of_map_id(const struct device_node *np, u32 id,\n-\t const char *map_name, const char *map_mask_name,\n+\t const char *map_name, const char *cells_name,\n+\t const char *map_mask_name,\n \t const struct device_node *filter_np, struct of_phandle_args *arg);\n \n int of_map_iommu_id(const struct device_node *np, u32 id,\n@@ -934,7 +935,8 @@ static inline void of_property_clear_flag(struct property *p, unsigned long flag\n }\n \n static inline int of_map_id(const struct device_node *np, u32 id,\n-\t\t\t const char *map_name, const char *map_mask_name,\n+\t\t\t const char *map_name, const char *cells_name,\n+\t\t\t const char *map_mask_name,\n \t\t\t const struct device_node *filter_np,\n \t\t\t struct of_phandle_args *arg)\n {\n", "prefixes": [ "v14", "3/3" ] }