get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.1/patches/2227382/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2227382,
    "url": "http://patchwork.ozlabs.org/api/1.1/patches/2227382/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260423145705.545552-2-mukesh.savaliya@oss.qualcomm.com/",
    "project": {
        "id": 35,
        "url": "http://patchwork.ozlabs.org/api/1.1/projects/35/?format=api",
        "name": "Linux I2C development",
        "link_name": "linux-i2c",
        "list_id": "linux-i2c.vger.kernel.org",
        "list_email": "linux-i2c@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260423145705.545552-2-mukesh.savaliya@oss.qualcomm.com>",
    "date": "2026-04-23T14:55:48",
    "name": "[v7,1/4] dt-bindings: i2c: qcom,i2c-geni: Document multi-owner controller support",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "c3348a30232bee8f4ea1fd83b67f5ec66b62822e",
    "submitter": {
        "id": 91179,
        "url": "http://patchwork.ozlabs.org/api/1.1/people/91179/?format=api",
        "name": "Mukesh Kumar Savaliya",
        "email": "mukesh.savaliya@oss.qualcomm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260423145705.545552-2-mukesh.savaliya@oss.qualcomm.com/mbox/",
    "series": [
        {
            "id": 501206,
            "url": "http://patchwork.ozlabs.org/api/1.1/series/501206/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=501206",
            "date": "2026-04-23T14:55:48",
            "name": "Enable multi-owner I2C support for QCOM GENI controllers",
            "version": 7,
            "mbox": "http://patchwork.ozlabs.org/series/501206/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2227382/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2227382/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-i2c+bounces-17148-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-i2c@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=o0upl1Sy;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-i2c+bounces-17148-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"o0upl1Sy\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=qualcomm.com"
        ],
        "Received": [
            "from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1fNF0tbxz1yD5\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 24 Apr 2026 00:58:05 +1000 (AEST)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 91C2D301D18A\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 23 Apr 2026 14:57:35 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id D719635AC3D;\n\tThu, 23 Apr 2026 14:57:29 +0000 (UTC)",
            "from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id CF09135CB89;\n\tThu, 23 Apr 2026 14:57:27 +0000 (UTC)",
            "from pps.filterd (m0279869.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63N8uN7A1565720;\n\tThu, 23 Apr 2026 14:57:24 GMT",
            "from apblrppmta02.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dq16wvkfx-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n\tThu, 23 Apr 2026 14:57:23 +0000 (GMT)",
            "from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1])\n\tby APBLRPPMTA02.qualcomm.com (8.18.1.7/8.18.1.7) with ESMTP id\n 63NEvJTJ010858;\n\tThu, 23 Apr 2026 14:57:20 GMT",
            "from pps.reinject (localhost [127.0.0.1])\n\tby APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4dm31k24a9-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n\tThu, 23 Apr 2026 14:57:20 +0000 (GMT)",
            "from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com\n [127.0.0.1])\n\tby pps.reinject (8.18.1.12/8.18.1.12) with ESMTP id 63NEvJsU010851;\n\tThu, 23 Apr 2026 14:57:19 GMT",
            "from hu-devc-hyd-u24-a.qualcomm.com (hu-msavaliy-hyd.qualcomm.com\n [10.147.246.140])\n\tby APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 63NEvJX7010848\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n\tThu, 23 Apr 2026 14:57:19 +0000 (GMT)",
            "by hu-devc-hyd-u24-a.qualcomm.com (Postfix, from userid 429934)\n\tid 1B59721C47; Thu, 23 Apr 2026 20:27:18 +0530 (+0530)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776956249; cv=none;\n b=rBV+RN/bRtuty/oPzKqnXQr4mYGvjlWHI9vcj9KT1Q3HkNneFXLukRS6wahwX+gsqD1qkV74MEGeDY8L4lOP4K6sa0rKCbVFn09+EZjRQxTlnkxpZdu4IrCHpt59Jb3mpo4U9t63GDUhblzYVYs6wxauO01Q0hgCZ6d0s0CPBEM=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776956249; c=relaxed/simple;\n\tbh=1lCxQiOyX8NlNUlBXXqPzc/TAeshReaRt3/gRTPwcmk=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=OpQ2vYPZQx3ZWNY52RVPaAEHcDvrFf2tSexlcYJ9mHooIy31CWqzK/OVhHUn4tkwlBIo1YeQC/ei0kkJ22d6avmvHy4bpchPY407VfK7uT46JqBEkgTL+pHub3ZFgzMM4GHYzszNCYo/zZEMFy6RrCYvH5xTtZG/JyuxB9dXA4Y=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=o0upl1Sy; arc=none smtp.client-ip=205.220.180.131",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:date:from:in-reply-to:message-id\n\t:mime-version:references:subject:to; s=qcppdkim1; bh=rM7GAu+3vsO\n\t6bUBWuQYh1+164AM80heJ0y1xmJjvzEI=; b=o0upl1Sywc8TbG4FGc5It00u9I7\n\tdYNlbQY/xwkUXTQhqFSQKQWLyy/NzsMOh2tFAGHWNXLsppKlXMPQ+0qk76EeSYzP\n\t9htqkjG4ppaOxX1wkJpmmmcWBOzVK0uxWyVdRJUvai6umHbGzqhy9t5QjhnJQjb/\n\t0Q6d7Si8p0kquohs52vohsmtuFOWA/DRs8cKSRXGWy9v/dAy/dtyiTaxWPaI+Pqe\n\ttGpZ0NXk4O3xjFdoV1l41Ne0aaZd/JczJHzRYGzS+uSpWxu2NaBIQQEv0a95H32q\n\tYlNqkNU1Zey2OrbSOcJE7OlM8ptdgXdovF+4EZ7pr0FXRIACiHpwFwEVDyQ==",
        "From": "Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>",
        "To": "viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org,\n        krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,\n        Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org,\n        dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com,\n        quic_jseerapu@quicinc.com, agross@kernel.org,\n        linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org,\n        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n        dmaengine@vger.kernel.org",
        "Cc": "krzysztof.kozlowski@oss.qualcomm.com,\n bartosz.golaszewski@oss.qualcomm.com,\n        bjorn.andersson@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com,\n        Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>",
        "Subject": "[PATCH v7 1/4] dt-bindings: i2c: qcom,i2c-geni: Document multi-owner\n controller support",
        "Date": "Thu, 23 Apr 2026 20:25:48 +0530",
        "Message-ID": "<20260423145705.545552-2-mukesh.savaliya@oss.qualcomm.com>",
        "X-Mailer": "git-send-email 2.43.0",
        "In-Reply-To": "<20260423145705.545552-1-mukesh.savaliya@oss.qualcomm.com>",
        "References": "<20260423145705.545552-1-mukesh.savaliya@oss.qualcomm.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-i2c@vger.kernel.org",
        "List-Id": "<linux-i2c.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-QCInternal": [
            "smtphost",
            "smtphost"
        ],
        "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIzMDE0OSBTYWx0ZWRfXwVSasqSQacK2\n vBhkENQd7WCXaAws6RAP9WjY8kG2w8hliA0dQm5rcUrM76fNh8McDy/2yvr8dMJC+qnX5G0pqdD\n 95xy2svL2pPAewtEL8PhZYxc+e3+yt3zuUS4DRnkNCNeT5NUN68P0KRukbKyWAQwiToKKFCH9lJ\n lkR2D/qVbyYRQ6REy4wBzOXQSRjJBwMLlBUiTbvhfaF0Z6mj7elab3+ZExtGQBTdCjM3bR83Adb\n sWCPYhNkIhsO1MCC7I3zKv4KXXq610doimtvgZUNezZ0YJUpN4/fQWDaSw7+d6nNpoWt/zjxj75\n W40L0cCk8HN8OY1i3vz5/zEekgAYWOPdYBlAotj7Cggysxd36Ie3j/KrEMQA2RsbSF+5Nb7jY1V\n NS4Onwv+6pQjpYkHrUM1Mn/2Ipi5FmXOA9PBpfr8he3mdjPzNRgVpscjjvvSdrura977F6OPbII\n lC0YJK5SAxe4GHX45+A==",
        "X-Authority-Analysis": "v=2.4 cv=dL+WXuZb c=1 sm=1 tr=0 ts=69ea3354 cx=c_pps\n a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22\n a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8\n a=yG_STSell-aZfaz4LqIA:9",
        "X-Proofpoint-GUID": "AvTQKP4MHy-e4Uh3TqYYgjxSt41jbgqH",
        "X-Proofpoint-ORIG-GUID": "AvTQKP4MHy-e4Uh3TqYYgjxSt41jbgqH",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01",
        "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n impostorscore=0 bulkscore=0 spamscore=0 priorityscore=1501 malwarescore=0\n adultscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604230149"
    },
    "content": "Document a DeviceTree property to describe QUP-based I2C controllers that\nare shared with one or more other system processors.\n\nOn some Qualcomm platforms, a QUP-based I2C controller may be accessed by\nmultiple system processors (for example, APPS and DSP). In such\nconfigurations, the operating system must not assume exclusive ownership\nof the controller or its associated hardware resources.\n\nThe new qcom,qup-multi-owner property indicates that the controller is\nexternally shared and that the operating system must avoid operations\nwhich rely on sole control of the hardware.\n\nAcked-by: Rob Herring (Arm) <robh@kernel.org>\nSigned-off-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>\n---\n .../devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml        | 7 +++++++\n 1 file changed, 7 insertions(+)",
    "diff": "diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml\nindex 51534953a69c..9401dc2d5052 100644\n--- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml\n+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml\n@@ -60,6 +60,13 @@ properties:\n   power-domains:\n     maxItems: 1\n \n+  qcom,qup-multi-owner:\n+    type: boolean\n+    description:\n+      Indicates that the QUP-based controller is shared with one or more\n+      other system processors and must not be assumed to have exclusive\n+      ownership by the operating system.\n+\n   reg:\n     maxItems: 1\n \n",
    "prefixes": [
        "v7",
        "1/4"
    ]
}