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GET /api/1.1/patches/2227197/?format=api
{ "id": 2227197, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2227197/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260423100229.2941820-27-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260423100229.2941820-27-peter.maydell@linaro.org>", "date": "2026-04-23T10:01:56", "name": "[PULL,26/59] target/arm/tcg/arm_ldst.h: merge in translate.c", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "983b8386d9a945e70c2ea6509c39f89189b0d5ac", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/1.1/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260423100229.2941820-27-peter.maydell@linaro.org/mbox/", "series": [ { "id": 501172, "url": "http://patchwork.ozlabs.org/api/1.1/series/501172/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501172", "date": "2026-04-23T10:01:35", "name": "[PULL,01/59] target/arm/tcg: increase cache level for cpu=max", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501172/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227197/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227197/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=GecMn9ly;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1Wt54dcRz1yD5\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 23 Apr 2026 20:05:01 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wFquW-0007Ag-D9; Thu, 23 Apr 2026 06:03:52 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wFqtj-0006TF-Bv\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 06:03:08 -0400", "from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1wFqth-000287-GY\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 06:03:03 -0400", "by mail-wr1-x42d.google.com with SMTP id\n ffacd0b85a97d-4411e1eba51so3072003f8f.3\n for <qemu-devel@nongnu.org>; Thu, 23 Apr 2026 03:03:01 -0700 (PDT)", "from lanath.. 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::42d;\n envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Pierrick Bouvier <pierrick.bouvier@linaro.org>\n\nOnly translate.c uses those functions, thus move them back to this file.\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nMessage-id: 20260407222208.271838-18-pierrick.bouvier@linaro.org\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n target/arm/tcg/arm_ldst.h | 47 --------------------------------------\n target/arm/tcg/translate.c | 24 ++++++++++++++++++-\n 2 files changed, 23 insertions(+), 48 deletions(-)", "diff": "diff --git a/target/arm/tcg/arm_ldst.h b/target/arm/tcg/arm_ldst.h\nindex cee0548a1c..e69de29bb2 100644\n--- a/target/arm/tcg/arm_ldst.h\n+++ b/target/arm/tcg/arm_ldst.h\n@@ -1,47 +0,0 @@\n-/*\n- * ARM load/store instructions for code (armeb-user support)\n- *\n- * Copyright (c) 2012 CodeSourcery, LLC\n- *\n- * This library is free software; you can redistribute it and/or\n- * modify it under the terms of the GNU Lesser General Public\n- * License as published by the Free Software Foundation; either\n- * version 2.1 of the License, or (at your option) any later version.\n- *\n- * This library is distributed in the hope that it will be useful,\n- * but WITHOUT ANY WARRANTY; without even the implied warranty of\n- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU\n- * Lesser General Public License for more details.\n- *\n- * You should have received a copy of the GNU Lesser General Public\n- * License along with this library; if not, see <http://www.gnu.org/licenses/>.\n- */\n-\n-#ifndef ARM_LDST_H\n-#define ARM_LDST_H\n-\n-#include \"exec/translator.h\"\n-#include \"qemu/bswap.h\"\n-\n-/* Load an instruction and return it in the standard little-endian order */\n-static inline uint32_t arm_ldl_code(CPUARMState *env, DisasContextBase *s,\n- target_ulong addr, bool sctlr_b)\n-{\n- return translator_ldl_swap(env, s, addr, bswap_code(sctlr_b));\n-}\n-\n-/* Ditto, for a halfword (Thumb) instruction */\n-static inline uint16_t arm_lduw_code(CPUARMState *env, DisasContextBase* s,\n- target_ulong addr, bool sctlr_b)\n-{\n-#ifndef CONFIG_USER_ONLY\n- /* In big-endian (BE32) mode, adjacent Thumb instructions have been swapped\n- within each word. Undo that now. */\n- if (sctlr_b) {\n- addr ^= 2;\n- }\n-#endif\n- return translator_lduw_swap(env, s, addr, bswap_code(sctlr_b));\n-}\n-\n-#endif\ndiff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c\nindex 0b3b4ab86b..b6abaff490 100644\n--- a/target/arm/tcg/translate.c\n+++ b/target/arm/tcg/translate.c\n@@ -25,7 +25,6 @@\n #define TCG_ADDRESS_BITS 32\n #include \"tcg/tcg-op-mem.h\"\n #include \"qemu/log.h\"\n-#include \"arm_ldst.h\"\n #include \"semihosting/semihost.h\"\n #include \"cpregs.h\"\n #include \"exec/target_page.h\"\n@@ -6281,6 +6280,22 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)\n }\n }\n \n+/* Ditto, for a halfword (Thumb) instruction */\n+static uint16_t arm_lduw_code(CPUARMState *env, DisasContextBase* s,\n+ target_ulong addr, bool sctlr_b)\n+{\n+#ifndef CONFIG_USER_ONLY\n+ /*\n+ * In big-endian (BE32) mode, adjacent Thumb instructions have been swapped\n+ * within each word. Undo that now.\n+ */\n+ if (sctlr_b) {\n+ addr ^= 2;\n+ }\n+#endif\n+ return translator_lduw_swap(env, s, addr, bswap_code(sctlr_b));\n+}\n+\n static bool insn_crosses_page(CPUARMState *env, DisasContext *s)\n {\n /* Return true if the insn at dc->base.pc_next might cross a page boundary.\n@@ -6515,6 +6530,13 @@ static void arm_post_translate_insn(DisasContext *dc)\n }\n }\n \n+/* Load an instruction and return it in the standard little-endian order */\n+static uint32_t arm_ldl_code(CPUARMState *env, DisasContextBase *s,\n+ target_ulong addr, bool sctlr_b)\n+{\n+ return translator_ldl_swap(env, s, addr, bswap_code(sctlr_b));\n+}\n+\n static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)\n {\n DisasContext *dc = container_of(dcbase, DisasContext, base);\n", "prefixes": [ "PULL", "26/59" ] }