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GET /api/1.1/patches/2226458/?format=api
{ "id": 2226458, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2226458/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422125250.1303100-12-alex.bennee@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260422125250.1303100-12-alex.bennee@linaro.org>", "date": "2026-04-22T12:52:28", "name": "[v3,11/32] target/arm: migrate debug syndromes to registerfields", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "ecdb26468f68b6033c008f884d888d2f0f8dcb04", "submitter": { "id": 39532, "url": "http://patchwork.ozlabs.org/api/1.1/people/39532/?format=api", "name": "Alex Bennée", "email": "alex.bennee@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422125250.1303100-12-alex.bennee@linaro.org/mbox/", "series": [ { "id": 501008, "url": "http://patchwork.ozlabs.org/api/1.1/series/501008/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501008", "date": "2026-04-22T12:52:20", "name": "target/arm: fully model WFxT instructions for A-profile", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/501008/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226458/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226458/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=EyQ184mO;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::336;\n envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x336.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Migrate syn_swstep, syn_watchpoint and syn_breakpoint to the\nregisterfields API.\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\n---\n target/arm/syndrome.h | 54 ++++++++++++++++++++++++++++++++++++++-----\n 1 file changed, 48 insertions(+), 6 deletions(-)", "diff": "diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h\nindex 2031b3704fb..2ad6b97aea5 100644\n--- a/target/arm/syndrome.h\n+++ b/target/arm/syndrome.h\n@@ -595,22 +595,64 @@ static inline uint32_t syn_data_abort_vncr(int ea, int wnr, int fsc)\n return res;\n }\n \n+/*\n+ * ISS encoding for an exception from a Software Step exception.\n+ */\n+FIELD(SOFTSTEP_ISS, IFSC, 0, 6)\n+FIELD(SOFTSTEP_ISS, EX, 6, 1)\n+FIELD(SOFTSTEP_ISS, ISV, 24, 1)\n+\n static inline uint32_t syn_swstep(int same_el, int isv, int ex)\n {\n- return (EC_SOFTWARESTEP << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)\n- | ARM_EL_IL | (isv << 24) | (ex << 6) | 0x22;\n+ uint32_t res = syn_set_ec(0, EC_SOFTWARESTEP + same_el);\n+ res = FIELD_DP32(res, SYNDROME, IL, 1);\n+\n+ res = FIELD_DP32(res, SOFTSTEP_ISS, ISV, isv);\n+ res = FIELD_DP32(res, SOFTSTEP_ISS, EX, ex);\n+ res = FIELD_DP32(res, SOFTSTEP_ISS, IFSC, 0x22);\n+\n+ return res;\n }\n \n+/*\n+ * ISS encoding for an exception from a Watchpoint exception\n+ */\n+FIELD(WATCHPOINT_ISS, DFSC, 0, 6)\n+FIELD(WATCHPOINT_ISS, WNR, 6, 1)\n+FIELD(WATCHPOINT_ISS, CM, 8, 1)\n+FIELD(WATCHPOINT_ISS, FnV, 10, 1)\n+FIELD(WATCHPOINT_ISS, VNCR, 13, 1) /* FEAT_NV2 */\n+FIELD(WATCHPOINT_ISS, FnP, 15, 1)\n+FIELD(WATCHPOINT_ISS, WPF, 16, 1)\n+/* bellow mandatory from FEAT_Debugv8p9 */\n+FIELD(WATCHPOINT_ISS, WPTV, 17, 1) /* FEAT_Debugv8p2 - WPT valid */\n+FIELD(WATCHPOINT_ISS, WPT, 18, 6) /* FEAT_Debugv8p2 - missing WP number */\n+\n static inline uint32_t syn_watchpoint(int same_el, int cm, int wnr)\n {\n- return (EC_WATCHPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)\n- | ARM_EL_IL | (cm << 8) | (wnr << 6) | 0x22;\n+ uint32_t res = syn_set_ec(0, EC_WATCHPOINT + same_el);\n+ res = FIELD_DP32(res, SYNDROME, IL, 1);\n+\n+ res = FIELD_DP32(res, WATCHPOINT_ISS, CM, cm);\n+ res = FIELD_DP32(res, WATCHPOINT_ISS, WNR, wnr);\n+ res = FIELD_DP32(res, WATCHPOINT_ISS, DFSC, 0x22);\n+\n+ return res;\n }\n \n+/*\n+ * ISS encoding for an exception from a Breakpoint or a Vector Catch\n+ * debug exception.\n+ */\n+FIELD(BREAKPOINT_ISS, IFSC, 0, 6)\n+\n static inline uint32_t syn_breakpoint(int same_el)\n {\n- return (EC_BREAKPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)\n- | ARM_EL_IL | 0x22;\n+ uint32_t res = syn_set_ec(0, EC_BREAKPOINT + same_el);\n+ res = FIELD_DP32(res, SYNDROME, IL, 1);\n+ res = FIELD_DP32(res, BREAKPOINT_ISS, IFSC, 0x22);\n+\n+ return res;\n }\n \n static inline uint32_t syn_wfx(int cv, int cond, int ti, bool is_16bit)\n", "prefixes": [ "v3", "11/32" ] }